CA3272A, CA3292A Quad-Gated Inverting Power Drivers with Fault Mode Diagnostic Flag Output July 1997 Features Description • Load Current Switching 600mA The CA3272A and CA3292A are Quad-Gated Inverting Power Drivers for interfacing low-level logic to inductive and resistive loads such as: relays, solenoids, AC and DC motors and resistive loads such as incandescent lamps and other power drivers. Each output is an open collector protected power transistor driver. The CA3292A is similar to the CA3272A, except for an added collector-to-base Zener diode that provides over-voltage clamping protection on each power switching output. The CA3292A block diagram is shown for one switching channel with fault detection logic plus the output fault driver circuit for all four switching channels. The FAULT output pin provides a flag output when a fault condition occurs. All four Output Power Driver stages are shown in the Block Diagrams. • Suitable for Resistive or Inductive Loads • Fault Mode Diagnostic Flag Output • CA3292A Over-Voltage Zener Clamp • Independent Over-Current Limiting • Independent Over-Temperature Shutdown • Temperature Shutdown Hysteresis • 5V CMOS or TTL Input Logic • High Dissipation Power-Frame Package • Operating Temperature Range -40oC to 125oC Applications System Applications • • • • • • • • • • Solenoids Relays Lamps Steppers Injectors Motors The ENABLE input is common to each of the four power switches and when low, disables the FAULT output. From the Input to Output, each switch is inverting. When IN is high, OUT is low and the transistor switch is “ON” (conducting). The block diagram shows the functional logic associated with fault detection. The Fault Sense circuit detects the IN and OUT states and switches QF “ON” if a fault is detected. When a fault is detected, transistor QF activates a current sink pull-down at the FAULT pin. A resistive load from the FAULT pin to the power supply is used to detect a fault as a low state. Both shorted and open load conditions are detected. Automotive Appliance Industrial Control Robotics Ordering Information PART NUMBER TEMP. RANGE (oC) PKG. NO. PACKAGE CA3272AQ -40 to 125 28 Ld PLCC N28.45 CA3292AQ -40 to 125 28 Ld PLCC N28.45 CA3272AM -40 to 125 28 Ld SOIC M28.3 CA3292AM -40 to 125 28 Ld SOIC M28.3 Note: The CA3272A replaces the CA3272 for new designs. Refer to the Fault Sink Current specifications when making design changes. The CA3272A and CA3292A have increased pull-down current drive from the FAULT output pin. Pinouts CA3272A, CA3292A (SOIC) TOP VIEW ENABLE 2 1 28 27 26 IN B IN A 3 OUT A NC 4 FAULT OUT B CA3272A, CA3292A (PLCC) TOP VIEW INDEX OUT B 1 28 NC 2 27 FAULT NC 3 26 IN A OUT A NC 4 25 IN B GND 5 25 GND NC 5 24 ENABLE GND 6 24 GND GND 6 23 GND GND 7 23 GND GND 7 22 GND GND 8 22 GND GND 8 21 GND GND 9 21 GND GND 9 20 GND GND 10 20 GND NC 10 19 NC GND 11 19 GND NC 11 18 VCC NC 12 17 IN C NC 13 16 IN D OUT C 14 15 OUT D VCC IN C IN D NC OUT D NC OUT C 12 13 14 15 16 17 18 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 1 File Number 2223.7 CA3272A, CA3292A Block Diagram of the CA3272A VCC ENABLE F OUT D TLIM QD IN D ILIM 0.02Ω F OUT C TLIM QC IN C ILIM 0.02Ω F OUT B TLIM QB IN B ILIM 0.02Ω F QA IN A ILIM TRUTH TABLE OUT A TLIM 0.02Ω FAULT ENABLE IN OUT H H L H L H L X H H = High, L = Low, X = Don’t Care Block Diagram of the CA3292A (1 of 4 Outputs Shown with Expanded Fault Logic) ENABLE LINE TO B, C AND D INPUTS AND FAULT OUTPUT NOTE: The CA3292A is identical to the CA3272A except for the collector-to-base Zener diode on each low side power output driver (shown here as ZA). The Zener diode clamp is used as an overvoltage clamp to protect the output when switching inductive loads. When the output voltage exceeds the Zener threshold, QA conducts to suppress further increase in output voltage. The fault sense and ENABLE fault flag logic circuits are the same in the CA3272A and CA3292A. FAULT FLAG LOGIC FAULT FAULT INPUT FROM B, C, D CHANNELS QF FAULT SENSE CHANNEL A 4V OUT A TLIM ZA IN A QA CHANNEL A 1 OF 4 OUTPUTS 2 ILIM 0.02Ω CA3272A, CA3292A Absolute Maximum Ratings Thermal Information Output Voltage, VO (CA3272A) . . . . . . . . . . . . . . . . . . . . . . . . +60V Output Sustaining Voltage, VCE(SUS) (CA3272A) . . . . . . . . . . . 40V Output Voltage, VO (CA3292A) . . . . . . . . . . . . . . . . . . . . . VCLAMP Maximum Output Clamp Energy (CA3292A) . . . . . . . . . . . (Note 8) Output Transient Current, (Note 1) . . . . . . . . . . . . . . . . . . 1.6A Max. Output Load Current, (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7A Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V Logic Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V FAULT Output Voltage, VF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16V Thermal Resistance (Typical, Note 3) θJA (oC/W) For surface mount without added copper ground area: CA3272AQ, CA3292AQ (PLCC) . . . . . . . . . . . . . . 45oC/W CA3272AM, CA3292AM (SOIC). . . . . . . . . . . . . . . 56oC/W For surface mount with 2 sq. in. of added copper ground area: CA3272AQ, CA3292AQ (PLCC) . . . . . . . . . . . . . . 36oC/W CA3272AM, CA3292AM (SOIC). . . . . . . . . . . . . . . 35oC/W See Maximum Power Dissipation vs Temperature Curves, Figures 6 and 7. Maximum Junction Temperature (Plastic Packages) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC, PLCC - Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 125oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications TA = -40oC to 125oC, VCC = 5.5V, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS - 30 100 µA OUTPUT PARAMETERS Output (OFF) Current ICEX VIN = 0.8V; VEN = 5.5V; (Note 4) VCE = 60V for CA3272A VCE = 24V for CA3292A Output Sustaining Voltage: CA3272A VCE(SUS) Note 7 40 - - V Output Clamp Voltage: CA3292A VCLAMP IC = 300µA; VEN = 0.8V 28 32 36 V Collector-to-Emitter Saturation Voltage VCE(SAT) VIN = 2V, VCC = 4.75V, IC = 400mA, TA = 125oC - - 0.3 V IC = 500mA, TA = 25oC - - 0.4 V IC = 600mA, TA = -40oC - - 0.5 V - - 0.8 V 2 - - V LOGIC INPUT THRESHOLDS Input Low Voltage VIL VCC = 3.5V Input High Voltage VIH Input Low Current IIL VIN = VEN = 0.8V; VCC = 4.75V 10 45 70 µA Input High Current IIH VIN = VEN = 5.5V 10 45 70 µA SUPPLY CURRENT All Outputs ON ICC(ON) VIN = VEN = 5.5V; IOUTA = IOUTB = IOUTC = IOUTD = 400mA - - 65 mA All Outputs OFF ICC(OFF) VIN = 0V - - 10 mA PROPAGATION DELAY Turn-ON Delay tPHL ILOAD = 500mA - 3 10 µs Turn-OFF Delay tPLH ILOAD = 500mA - 3 10 µs Output Low Current, IF(SINK) (with Fault) IOL VIN = 0.8V; VEN = 2.0V; VF = 4V VOUT = Low = 1V; (Note 5) 1 2 4 mA Output High Current, IF(LK) IOH No Fault (Note 5) - - 20 µA Output Low Voltage VOL External Load Equal Min. IOL - 0.2 0.4 V VHTHD VIN = 0.8V; VEN = 2V (Note 6) 3 4 5.5 V FAULT PARAMETERS Output Driver Fault Sense, High Threshold (Open) 3 CA3272A, CA3292A Electrical Specifications TA = -40oC to 125oC, VCC = 5.5V, Unless Otherwise Specified (Continued) PARAMETER SYMBOL Output Driver Fault Sense, Low Threshold (Short) VLTHD TEST CONDITIONS VIN = VEN = 2V (Note 6) MIN TYP MAX UNITS 3 4 5.5 V 0.7 - Note 1 A PROTECTION PARAMETERS Over-Current Limiting ILIM VIN = VEN = 2V, VOUT = 4Ω to 16V Over-Temperature Limiting (Junction Temperature) TLIM - 165 - oC Over-Temperature Limiting, Hysteresis THYS - 15 - ∆oC Input Capacitance CIN - 3 - pF Enable Capacitance CEN - 4.6 - pF DESIGN PARAMETERS NOTES: 1. Output Transient Currents are controlled by on-chip limiting for each output. Under short-circuit conditions with voltage applied to the collector of the output transistor and with the output transistor turned ON, the current will increase to 1.2A, typical. Over-Current Limiting protects a short circuit condition for a normal operating range of output supply voltage. During a short circuit condition, the output driver will shortly thereafter (approximately 5ms) go into Over-Temperature Shutdown. While Over-Current Limiting may range to peak currents as high as 1.6A, each output will typically withstand a direct short circuit at normal single battery supply levels. Excessive dissipation before thermal shutdown occurs may cause damage to the chip for supply voltages greater than 16V. When sequentially switched, the outputs are rated to withstand peak current, cold turn-on conditions of lamp loads such as #168 or #194 lamps. 2. The total DC current with all 4 outputs ON should not exceed the total of (4 x 0.7A + Max. ICC) ~ 2.85A. This level of current will significantly increase the chip temperature due to increased dissipation and may cause thermal shutdown in high ambient temperature conditions (See Absolute Maximum Ratings for Dissipation). Any one output may be allowed to exceed 0.7A but may be subject to OverCurrent Limiting above the ILIM minimum limit of 0.7A. No single output should be loaded to more than Over-Current Limiting above the ILIM minimum limit of 0.7A. As a practical limit, no single output should be loaded to more than 1A maximum. 3. The PLCC and SOIC packages have power lead frame construction through the ground pins to conduct heat from the frame to the PC Board ground area. Thermal resistance, θJA is given for a surface mount of the 28 lead PLCC and the 28 lead SOIC packages on a 1 oz. copper PC board with minimal ground area and with a 2 square inches of ground area. 4. ICEX is the static leakage current at each output when that output is OFF (ENABLE Low). Refer to the Figure 3 illustration of an output stage. The value of ICEX is both the leakage into the output driver and a pull-down current sink, IO(SINK). The purpose of the current sink is to detect open load conditions. 5. The IOL value of “Output Low Current, IF(SINK)” at the FAULT pin is both the static leakage of the output driver QF and the current sink, IF(SINK). The current sink is active only when a fault exists. When no fault exists, the IOH current at the FAULT pin is the maximum leakage current, IF(LK). Refer to Figure 2 for an illustration of the FAULT output and associated external components. Refer to FAULT LOGIC TABLE for Fault Modes. 6. The Voltages, VHTHD, VLTHD are the comparator threshold reference values (Min. and Max. Range) sensed as a high and low state transitions for voltage forced at the outputs. VHTHD indicates an open load fault when the output is decreased to less than the threshold. VLTHD indicates a shorted load when the output is increased greater than the threshold. The output voltage is changed until the FAULT pin indicates a Low (Fault). Refer to Figure 2 for test value of external resistor. Refer to IOL and IOH FAULT PARAMETERS Test Limits to determine VOL and VOH at the FAULT pin. 7. Tested with 120mA switched off in a Load of 70mH and 32Ω series resistance; CA3272A: Outputs clamped with an external Zener diode, limiting VOUT to the VCE(SUS) maximum rating of +40V. CA3292A: Outputs limited to the VCLAMP voltage by the internal collector-to-base Zener diode and output transistor clamp. 8. The single pulse clamp energy rating for the CA3292A is defined over a range of operating conditions. The Clamp Energy is a function of the Load Inductance, Load Resistance, Clamp Voltage, Supply Voltage, the Saturated ON Resistance (VSAT) and the Steady State Load Current at the instant of Turn-OFF. Refer to Figure 5 for the Safe Operating Area when driving inductive loads. Rating limits for Energy vs Single Pulse Width Time are plotted for different coil values. Refer to Application Note - AN9416 for pulse energy calculation methods. 4 CA3272A, CA3292A Applications The Fault Logic circuit, as shown in the Block Diagram for the CA3292A, applies to both the CA3272A and CA3292A. The Fault Sense circuits do not override or control the power switching circuits of the IC. Their primary function is to provide an external diagnostic fault flag output. Each Power Switching Channel has diagnostic fault sensing input to the Fault Logic. The Fault Logic block of the functional Block Diagram illustrates the logic functions associated with Fault detection. The diagnostic output for each of the four channels of switching is processed through the fault logic circuit associated with each channel. It is then passed to an OR gate which controls the FAULT flag output transistor, QF thru A 2 input AND gate. The CA3272A and CA3292A are quad-gated inverting lowside power drivers with a fault diagnostic flag output. Both circuits are rated for 125 oC ambient temperature applications and have current limiting and thermal shutdown. While functionally similar to the CA3262AQ, they differ in the mode of over-voltage protection and have the added feature of a FAULT flag output. Also, as shown in Figure 1, the inputs to channels A, B, C, D and ENABLE have internal pulldowns to turn “OFF” the outputs when the inputs are floating. VCC CONSTANT CURRENT SOURCE INPUT VCC = +5V ENABLE IN REFERENCE 1.2 VOLTS RX B, C AND D FAULT MODE INPUTS IF(SINK) TO PREDRIVER AND OUTPUT STAGES ENABLE 1 FAULT FLAG DIAGNOSTIC OUTPUT, VF FAULT LOGIC OUTPUT CX QF TX = RXCX ≈ 0.5 TO 1ms FIGURE 1. SCHEMATIC OF ONE INPUT STAGE As noted in the Block Diagrams, the CA3292A is equivalent to the CA3272A except that it has internal clamp diodes on the outputs to handle inductive switching pulses from the output load. The structure of each CA3292A output includes a Zener diode from collector-to-base of the output transistor. This is a different form of protection from other quad drivers with current steering clamp diodes on each output, paired to one of two “CLAMP” output pins. The CA3292A output transistor will turn-on at the Zener diode clamp voltage threshold which is typically 32V and the output transistor will dump the pulse energy through the output driver to ground. FAULT MODE INPUT CHANNEL “A” FIGURE 2. EXTERNAL FAULT OUTPUT CIRCUIT AND IF(SINK) AS FAULT SINK PULLDOWN CURRENT, WHICH IS ACTIVATED BY TRANSISTOR, QF , WHEN A FAULT EXISTS The ENABLE input is common to each of the 4 power switches and also disables the FAULT flag output at the 2 input AND gate when it is low. The Fault Logic circuit senses the IN and OUT states and switches QF “ON” if a fault is detected. Transistor QF activates a sink current source to pull-down the FAULT pin to a 0 (low) state when the fault is detected. Both shorted and open load conditions are detected. Each output driver is capable of switching 600mA load currents and operate at 125oC ambient temperature without interaction between the outputs. The CA3272A and CA3292A can drive four incandescent lamp loads without modulating their brilliance when the “cold” lamps are energized. The outputs can be connected in parallel to drive larger loads. Over-current or short circuit output load conditions are fault protected by current limiting with a typical limit value of 1.2A. The current limiting range is set for 0.6A to 1.6A. The output stage does not change state (oscillate) when in the current limit mode. It is normal for thermal shutdown and current limiting to occur sequentially during a short circuit fault condition. A precaution applies for potential damage from high transient dissipation during thermal shutdown. (See Note 1 following the Electrical Specifications Table). Each of the outputs are independently protected with overcurrent limiting and over-temperature shutdown with thermal hysteresis. If an output is shorted, the remaining outputs function normally unless the temperature rise of the other output devices can be made to exceed their shutdown temperature of 165oC typical. When the junction temperature of a driver exceeds the 165 oC thermal shutdown value, that output is turned off. When an output is shutdown, the resulting decrease in power dissipation allows the junction temperature to decrease. When the junction temperature decreases by approximately 15oC, the output is turned on. FAULT LOGIC TABLE IN OUT FAULT MODE H L H Normal H H L L L L Over Current, Over Temperature Open Load or Short to Power Supply L H H Normal Any one output that faults (see Fault Logic Table) will switch the FAULT output at pin 1 to a constant current pull-down. 5 CA3272A, CA3292A The FAULT output diagram of Figure 2 shows the circuit component interface for sensing a diagnostic fault condition. As noted, the time constant of TX = RXCX should be greater than the ON-OFF output switching times to avoid false fault readings during switching. For applications requiring fast period repetition rates, the maximum time constant should be significantly less than the period of switching. The shortest practical time constant is preferred to limit the duration of a fault condition. The output will continue to turn on and off for as long as the shorted condition exists or until shutdown by the input logic. The resulting frequency and duty cycle of the output current flow is determined by the ambient temperature, the thermal resistance of the package in the application and the total power dissipation in the package. Since each output is independently protected, the frequency and duty cycle of the current flow into multiple shorted outputs will not be related in time. Long lead lengths in the load circuit may lead to oscillatory behavior if more than two output loads are shorted. FAULT SENSE THRESHOLD, VTHD 4V To match a standard CMOS or TTL interface, the switched current at the FAULT pin must be converted to VIH and VIL voltage levels using the RX external pullup resistor. The minimum specified IOL limit at the FAULT output defines the Low (Fault) state which is used to test for a VOL maximum limit of 0.4V. This makes the calculation for the VIL input level relatively simple. Where VF is the FAULT output voltage, VCC is the power supply voltage, RX is the pullup resistor to VCC from the FAULT pin and IOL is the fault condition sink current, IO(SINK), the low state equation is: VBATT RLOAD ZENER CLAMP 2 OUT A ZA TLIM QA ILIM VF = VCC - RXIOL ≤ VIL IO(SINK) (EQ. 1) As an example: Since TTL is the worst case for a low state, VIL = 0.8V. Using VCC = 5V, maximum VF = VOL = 0.4V and minimum IOL = 1mA for the CA3272A and CA3292A. At the worst case limit, the minimum value of RX is: 0.02Ω FIGURE 3. OUTPUT OPEN LOAD DETECTION WHERE IO(SINK) IS AN ACTIVE CURRENT SINK PULLDOWN FOR OPEN-LOAD FAULT DETECTION. THE CURRENT ICEX IS IO(SINK) PLUS LEAKAGE CURRENTS OF THE OUTPUT DRIVER RX = (VCC - VIL)/IOL = (5 - 0.4)V/0.001mA = 4.6kΩ The preferred value for RX would be greater than the values calculated. For the logic VIH High (normal state), Since a diagnostic flag indicates when an output is shorted, this information can be used as input to a microprocessor or dedicated logic circuit to provide a fast switch-off when a short occurs and, by sequence action, can be used to determine which output is shorted. A fault condition in any output load will cause the FAULT output to switch to a logic “low”. Since a fault condition may be detected during switching, use of an appropriate size capacitor to filter the FAULT output is recommended. The recommended FAULT output circuit is shown in Figure 2. This will prevent the FAULT output voltage from reaching a logic level “0” within the maximum switching time. VF = VCC - RXIOH ≥ VIH (EQ. 2) Where the IOH current is the specified leakage current, IF(LK) at the FAULT pin, it remains to check the calculated value for RX as a leakage current times the chosen pullup resistance. To determine that the minimum VOH from the FAULT pin is greater than VIH to an external logic match, VF is calculated using Equation 2. For example, using the minimum RX resistor value calculated for the CA3272A, VF = [5 - (4.6kΩ x 20µA)] = 4.9V which is more than suitable for CMOS or TTL Input switching levels; suggesting that a larger value of RX (such as 10kΩ) could be used for a better noise margin in the Low fault state. The FAULT detection circuitry compares the state of the input and the state of the output for each A, B, C and D channel. The output is considered to be in a high state if the voltage exceeds the typical FAULT threshold reference voltage, VTHD of 4V. If the output voltage is less than VTHD , the output is considered to be in a low state. For example, if the input is high and the output is less than VTHD , a normal “ON” condition exists and the FAULT output is high. If the input is high and the output is greater than VTHD , a shorted load condition is indicated and the FAULT output is low. When the input is low and the output is greater than VTHD , a normal “OFF” condition is indicated and the FAULT output is high. If the input is low and the output is less than VTHD , an open load condition exists and the FAULT output is low. The Output Driver Fault Sense state is determined by high and low comparator threshold limits which are defined in the Fault Parameters section of the Electrical Specifications. To detect an open load, each output has an internal low-level current sink, shown in Figure 3, which acts as a pull-down under open load fault conditions and is always active. The magnitude of this current plus any leakage associated with the output transistor will always be less than 100µA. (The data sheet specification for ICEX includes this internal low-level sink current). The output load resistance must be chosen such that the voltage at the output will not be less than VTHD when the ICEX sink current flows through it under worse case conditions with minimum supply voltage. For example, assume a 6.5V minimum driver output supply voltage, a FAULT threshold reference voltage of VTHD = 5.5V and an output current sink of ICEX = 100µA. Calculate the maximum load resistance that will not result in a FAULT output low state when the output is OFF. 6 CA3272A, CA3292A RLOAD(max) = [VSUPPLY(min) - VTHD(max)] / ICEX(max) (EQ. 3) RLOAD(max) = (6.5V - 5.5V) / 100µA = 10kΩ (EQ. 4) The CA3272A and CA3292A are supplied in specially configured power packages to conduct heat from the junction through the mounting structure and device leads to the PC Board. The ground leads are directly connected to the mounting pad of the chip. The junction-to-air thermal resistance, θJA may be significantly improved by suitable layout design of the PC board to which the package is soldered. Two or more square inches of PC Board ground area next to the device ground pins is recommended. The PC Board ground layer should be on the device side of the board with open space for heat radiation. Since the CA3272A do not have on-chip diodes to clamp voltage spikes which may be generated during inductive switching of the load circuit, an external Zener diode (30V or less is recommended) should be connected between the output terminal and ground. Only those outputs used to switch inductive loads require this protection. Note that since the rate of change of output current is very high, even small values of inductance can generate voltage spikes of considerable amplitude on the output terminals which may require clamping. External free-wheeling diodes returned to the supply voltage are generally not acceptable as inductive clamps if the supply voltage exceeds 30V during transients. Typical loads for either the CA3272A or CA3292A are shown in the application circuit of Figure 4A. Where inductive loads are driven from outputs A and B, no external Zener diode clamp is needed for the CA3292A but is required for the CA3272A as shown in Figure 4B. Refer to Application Note AN9416 for additional thermal information. Further information is provided on pulse energy calculation methods for inductive load applications with detail explaining the Safe Operating Area shown in Figure 5. The SOA area for single energy transients is below the dotted lines for the given ambient temperature conditions. The energy locus plots of the three inductive coils were made for arbitrarily chosen values of inductance and are shown here for reference information. The RL time constant, ambient temperature, clamp voltage and the stored energy in the coil determine the SOA limits. RELAY OUT A FAULT ZA TLIM QA +VBATT ILIM OUT B FAULT SOLENOID ZB TLIM +VBATT QB ILIM INDUCTIVE LOAD +VBATT HIGH CURRENT HIGH SIDE DR OUT C FAULT ZC OUT A FAULT MOTOR TLIM TLIM QC QA ILIM ILIM OUT D ZD CA3272A (1 OF 4 CHANNELS) +VBATT FAULT VZ(EXT) LAMP TLIM EXTERNAL ZENER DIODE CLAMP PROTECTION FROM POSITIVE VOLTAGE SPIKE (INDUCTIVE KICK PULSE) AT TURN-OFF QD ILIM CA3292A NOTE: The internal drive circuit with self protection and fault output is the CA3292A with the over voltage Zener diode clamp. NOTE: The VCE(SUS) voltage rating is the maximum voltage for full load switching. FIGURE 4A. TYPICAL APPLICATION CIRCUIT SHOWING OUTPUT LOAD CONTROL CAPABILITY OF THE CA3272A OR CA3292A FIGURE 4B. CA3272A OVER-VOLTAGE PROTECTION IS AN EXTERNAL ZENER DIODE CLAMP WHERE VZ(EXT) ≤ VCE(SUS) 7 CA3272A, CA3292A SINGLE PULSE ENERGY (mJ) 200 550mH COIL - LINE 1 265mH COIL - LINE 2 136mH COIL - LINE 3 100 25oC MAX LIMIT 125oC MAX LIMIT DO NOT OPERATE ABOVE THE DOTTED LINES SAFE OPERATING AREA - BELOW DOTTED LINES 50 VCLAMP = VZ +VBE VZ 1 OUT x L VBATT R QX 2 3 10 1 10 SINGLE PULSE TIME (ms) 100 FIGURE 5. CA3292A SINGLE PULSE INDUCTIVE FLYBACK CLAMP ENERGY SOA RATING CHART FOR EACH OUTPUT DRIVER 2.0 PACKAGE DISSIPATION (W) PACKAGE DISSIPATION (W) 2.0 1.5 SOIC 1 PLCC 0.5 0 -50oC 0 oC 50oC 100oC 1.5 SOIC/PLCC 1 0.5 0 -50oC 150oC AMBIENT TEMPERATURE (οC) 0oC 50oC 100oC 150oC AMBIENT TEMPERATURE (οC) FIGURE 6. MAXIMUM POWER DISSIPATION RATING vs TEMPERATURE FOR THE CA3272AQ, CA3292AQ PLCC PACKAGE AND THE CA3272AM, CA3292AM SOIC PACKAGE WITH NO ADDITIONAL PC BOARD AREA FOR HEAT SINKINGS FIGURE 7. MAXIMUM POWER DISSIPATION RATING vs TEMPERATURE FOR THE CA3272AQ, CA3292AQ PLCC PACKAGE AND THE CA3272AM, CA3292AM SOIC PACKAGE WITH 2 SQ. IN. OF 1 OZ. COPPER PC BOARD AREA FOR HEAT SINKING 8 CA3272A, CA3292A Small Outline Plastic Packages (SOIC) M28.3 (JEDEC MS-013-AE ISSUE C) 28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE N INDEX AREA H 0.25(0.010) M B M INCHES E SYMBOL -B1 2 3 L SEATING PLANE -A- h x 45o A D -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M B S MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.6969 0.7125 17.70 18.10 3 E 0.2914 0.2992 7.40 7.60 4 0.05 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.01 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 8o 0o N α NOTES: MILLIMETERS MAX A1 e α MIN 28 0o 28 7 8o Rev. 0 12/93 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 9 CA3272A, CA3292A Plastic Leaded Chip Carrier Packages (PLCC) 0.042 (1.07) 0.048 (1.22) 0.042 (1.07) 0.056 (1.42) PIN (1) IDENTIFIER 0.004 (0.10) C C L INCHES D2/E2 C L D2/E2 VIEW “A” D1 D 0.020 (0.51) MAX 3 PLCS 28 LEAD PLASTIC LEADED CHIP CARRIER PACKAGE 0.025 (0.64) R 0.045 (1.14) 0.050 (1.27) TP E1 E N28.45 (JEDEC MS-018AB ISSUE A) 0.020 (0.51) MIN A1 A MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.165 0.180 4.20 4.57 - A1 0.090 0.120 2.29 3.04 - D 0.485 0.495 12.32 12.57 - D1 0.450 0.456 11.43 11.58 3 D2 0.191 0.219 4.86 5.56 4, 5 E 0.485 0.495 12.32 12.57 - E1 0.450 0.456 11.43 11.58 3 E2 0.191 0.219 4.86 5.56 4, 5 N 28 28 6 Rev. 1 3/95 -C- SEATING PLANE 0.026 (0.66) 0.032 (0.81) 0.045 (1.14) MIN 0.013 (0.33) 0.021 (0.53) 0.025 (0.64) MIN VIEW “A” TYP. NOTES: 1. Controlling dimension: INCH. Converted millimeter dimensions are not necessarily exact. 2. Dimensions and tolerancing per ANSI Y14.5M-1982. 3. Dimensions D1 and E1 do not include mold protrusions. Allowable mold protrusion is 0.010 inch (0.25mm) per side. 4. To be measured at seating plane -C- contact point. 5. Centerline to be determined where center leads exit plastic body. 6. “N” is the number of terminal positions. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 10