ONSEMI CAT823ZSDI-GT3

CAT823, CAT824, CAT825
System Supervisory Voltage Reset with
Watchdog and Manual Reset
FEATURES
DESCRIPTION
n Automatically restarts microprocessor after
Power failure
The CAT823, CAT824, and CAT825 provide basic
reset and monitoring functions for the electronic
systems. Each device monitors the system voltage
and maintains a reset output until that voltage reaches
the device’s specified trip value and then maintains
the reset output active condition until the device’s
internal timer, after a minimum timer of 140ms; to
allow the systems power supply to stabilize.
n Monitors pushbutton for external override
n Accurate under voltage system monitoring
n Brownout detection system reset for use with
3.0, 3.3, and 5.0 volt systems
n Pin and function compatible with the
MAX823/24/25 products
The CAT823 and CAT824 also have a watchdog input
which can be used to monitor a system signal and
cause a reset to be issued if the signal fails to change
state prior to a timeout condition.
n Operating Range from -40°C to +85°C
n Available in TSOT-23 5-lead and SC-70 packages
For Ordering Information details, see page 13 & 14.
The CAT823 and CAT825 also provide a manual
reset input which can be used to initiate reset if pulled
low. This input can be directly attached to a pushbutton or a processor signal.
APPLICATIONS
n Microprocessor and Microcontroller based
systems
n Intelligent Instruments
n Control Systems
n Critical µP Monitors
n Portable Equipment
PIN FUNCTIONS
PIN CONFIGURATION
Pin Name
TSOT-23 5-Lead
SC-70 5-Lead
RESET
1
GND
2
MR
3
5
VCC
CAT823
4
RESET
1
GND
2
RESET
WDI
¯¯¯¯¯¯
RESET
RESET
1
GND
2
RESET
3
5
5
VCC
WDI
Ground
¯¯¯
MR
Manual Reset input – Pulled high
Internally by a 52kΩ resistor designed
to be driven low by a mechanical
pushbutton, open drain output or CMOS
output.
RESET
VCC
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
4
Watchdog Timer Input – Designed to be
driven by a processor output or can be
disabled by tri-stating or leaving open.
VCC
Power Supply
MR
1
CMOS Push-Pull Active High Reset
Output
WDI
CAT825
3
CMOS Push-Pull Active Low Reset
Output
GND
CAT824
4
Function
Doc. No. MD-3027, Rev. D
CAT823, CAT824, CAT825
BLOCK DIAGRAM
VCC
TIMEOUT
COMPARATOR
LEVEL SENSE
&
TIMER
WDI*
RESET
VCC
TOLERANCE
BIAS
VCC
DIGITAL
DELAY
+
VCC
–
VCC
VOLTAGE
REFERENCE
RESET*
52kΩ
LEVEL SENSE
&
DEBOUNCE
MR*
* Functions Available by Device
Device
¯¯¯¯¯¯
RESET
CAT823
x
CAT824
x
x
CAT825
x
x
Doc. No. MD-3027, Rev. D
RESET
¯¯¯
MR
WDI
x
x
x
x
2
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT823, CAT824, CAT825
ABSOLUTE MAXIMUM RATINGS (1)
Parameters
Ratings
Units
6
V
-0.3 to (VCC + 0.3)
V
Input Current, VCC
20
mA
¯¯¯¯¯¯
Output Current RESET, RESET
20
mA
SC-70 5-lead (derate 3.1mW/ºC above +70ºC)
247
mW
TSOT-23 5-lead (derate 7.1mW/ºC above +70ºC)
571
mW
Storage Temperature
-65 to 150
ºC
Operating Ambient Temperature
-40 to +85
ºC
Lead Soldering (10 seconds max)
+300
ºC
ESD Rating: Low Voltage Pins
Human Body Model
2000
V
200
V
Range
Units
VCC (TA = 0ºC to +70ºC)
1.0 to 5.5
V
VCC (TA = -40ºC to +85ºC)
1.2 to 5.5
V
-0.1 to (VCC + 0.1)
V
-40 to +85
ºC
Supply Voltage
All other pins
Continuous Power Dissipations (TA = +70ºC)
Machine Model
RECOMMENDED OPERATING CONDITIONS
Parameter
All Other Pins
Ambient Temperature
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
3
Doc. No. MD-3027, Rev. D
CAT823, CAT824, CAT825
ELECTRICAL OPERATING CHARACTERISTICS
DC Characteristics: VCC = 3.0V to 5.5V for L/M versions; VCC = 2.0V to 3.6V for the R/S/T/Y/Z version,
-40ºC ≤ T A ≤ +85ºC unless otherwise noted. Typical Values at TA = 25ºC and VCC = 5V for L/M versions;
(1)
VCC = 3.3V for the T/S versions; VCC = 3.0V for the R version; and VCC = 2.5V for the Y/Z versions.
Symbol Parameter
ICC
VRST
Conditions
Supply Current
Reset Threshold
Min
Typ
Max
Units
CAT823 (L/M Versions)
CAT824 (L/M Versions)
6
17
µA
CAT823 (R/S/T/Y/Z Versions)
CAT824 (R/S/T/Y/Z Versions)
4
12
µA
CAT825 (L/M Versions)
3
8
µA
CAT825 (R/S/T/Y/Z Versions)
2
6
µA
CAT82_L at -40ºC ≤ TA ≤ +85ºC
4.50
4.63
4.75
V
CAT82_M at -40ºC ≤ TA ≤ +85ºC
4.25
4.38
4.50
V
CAT82_T at -40ºC ≤ TA ≤ +85ºC
3.00
3.08
3.15
V
CAT82_S at -40ºC ≤ TA ≤ +85ºC
2.85
2.93
3.00
V
CAT82_R at -40ºC ≤ TA ≤ +85ºC
2.55
2.63
2.70
V
CAT82_Z at -40ºC ≤ TA ≤ +85ºC
2.25
2.32
2.38
V
CAT82_Y at -40ºC ≤ TA ≤ +85ºC
2.13
2.19
2.25
V
Reset Threshold
Tempco
Reset Threshold
Hysteresis
tRD
VCC to Reset Delay
tRP
Reset Active
Timeout Period
VOH
VOL
ISOURCE
¯¯¯¯¯¯ Output High
RESET
Voltage
¯¯¯¯¯¯ Output Low
RESET
Voltage
ppm/ºC
CAT82_L/M
10
mV
CAT82_R/S/T/Y/Z
5
mV
VCC = VTH to (VTH - 100mV)
20
µs
140
200
CAT82_L/M, VCC = VRST max,
ISOURCE = -120µA
VCC - 1.5V
CAT82_T/S/R/Z/Y, VCC = VRST max,
ISOURCE = -30µA
0.8 x VCC
0.4
CAT82_T/S/R/Z/Y, VCC = VRST min,
ISINK = 1.2mA
0.3
TA = 0ºC to +70ºC, VCC = 1V,
VCC falling, ISINK = 50µA
0.3
TA = TMIN to TMAX, VCC = 1.2V,
VCC falling, ISINK = 100µA
0.3
VCC > 1.8V, ISOURCE = -150µA
Reset Output
Voltage
400
CAT82_L/M, VCC = VRST min,
ISINK = 3.2mA
ms
V
CAT82_L/M, Reset = 0V, VCC = 5.5V
¯¯¯¯¯¯ Output
RESET
Short-Circuit Current CAT82_L/M, Reset = 0V, VCC = 3.6V
VOH
VOL
(2)
40
1.5
0.8
mA
0.8 x VCC
CAT824L/M & CAT825L/M,
VCC = VRST max, ISINK = 3.2mA
0.4
CAT824R/S/T/Y/Z & CAT825R/S/T/Y/Z,
VCC = VRST max, ISINK = 1.2mA
0.3
V
Notes:
(1) Over-temperature limits are guaranteed by design and not production tested.
(2) The RESET short-circuit current is the maximum pull-up current when reset is driven low by a bidirectional output.
Doc. No. MD-3027 Rev. D
4
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT823, CAT824, CAT825
ELECTRICAL OPERATING CHARACTERISTICS (continued)
DC Characteristics: VCC = 3.0V to 5.5V for L/M versions; VCC = 2.0V to 3.6V for the R/S/T/Y/Z version,
-40ºC ≤ T A ≤ +85ºC unless otherwise noted. Typical Values at TA = 25ºC and VCC = 5V for L/M versions;
VCC = 3.3V for the T/S versions; VCC = 3.0V for the R version; and VCC = 2.5V for the Y/Z versions.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
1.12
1.60
3.20
s
WATCHDOG INPUT (CAT823 & CAT824)
tWD
Watchdog Timeout Period
tWDI
WDI Pulse Width
VIL
VIH
VIL = 0.4V, VIH = 0.8 x VCC
WDI Input Voltage
WDI Input Current
50
ns
0.3 x VCC
(3)
(4)
0.7 x VCC
WDI = VCC, Time Average
WDI = 0V, Time Average
120
-20
160
-15
V
µA
MANUAL RESET INPUT(CAT823 & CAT825)
VIL
VIH
tPB
tPDLY
0.3 x VCC
¯¯¯
MR Input Voltage
0.7 x VCC
¯¯¯
MR Pulse Width
¯¯¯
MR low to Reset Delay
¯¯¯
MR Noise Immunity
¯¯¯
MR Pullup Resistance (internal)
1
µs
5
Pulse Width with No Reset
100
35
V
52
µs
ns
75
kΩ
Notes:
(3) WDI is internally serviced within the watchdog period if WDI is left open.
(4)
The WDI input current is specified as an average input current when the WDI input is driven high or low. The WDI input if connected to a
three-stated output device can be disabled in the tristate mode as long as the leakage current is less than 10µA and a maximum
capacitance of less than 200pF. To clock the WDI input in the active mode the drive device must be able to source or sink at least 200µA
when active.
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
5
Doc. No. MD-3027, Rev. D
CAT823, CAT824, CAT825
TYPICAL ELECTRICAL OPERATING CHARACTERISTICS
Normalized Reset Threshold
Voltage vs. Temperature
VCC Supply Current vs. Temperature
NORMALIZED RESET THRESHOLD (V)
SUPPLY CURRENT (µA)
9
8
7
6
5
4
3
2
1
-40 -20
0
20
40
60
80 100 120
1.04
1.02
1.00
0.98
0.96
0.94
-40
-20
0
20
40
60
80
100
TEMPERATURE (ºC)
TEMPERATURE
(°C)
TEMPERATURE (ºC)
Doc. No. MD-3027 Rev. D
1.06
6
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT823, CAT824, CAT825
FUNCTIONAL DESCRIPTION
PROCESSOR RESET
MANUAL RESET
The CAT823-825 detect supply voltage (VCC)
conditions that are below the specified voltage trip
value (VRST) and provide a reset output to maintain
¯¯¯¯¯¯ (and
correct system operation. On power-up, RESET
RESET if available) are kept active for a minimum
delay tRP of 140ms after the supply voltage (VCC) rises
above VRST to allow the power supply and processor
to stabilize. When VCC drops below the voltage trip
¯¯¯¯¯¯ (and
value (VRST), the reset output signals RESET
¯¯¯¯¯¯
RESET) are pulled active. RESET (and RESET if
available) is specifically designed to provide the reset
input signals for processors. This provides reliable
and consistent operation as power is turned on, off or
during brownout conditions by maintaining the
processor operation in known conditions.
The CAT823 and CAT825 each have a Manual Reset
¯¯¯) input to allow for alternative control of the reset
(MR
outputs. The ¯¯¯
MR input is designed for direct connection to a pushbutton (see Figure 1). The ¯¯¯
MR input
is internally pulled up by 52kΩ resistor and must be
pulled low to cause the reset outputs to go active.
Internally, this input is debounced and timed such that
¯¯¯¯¯¯ (and RESET) signals of at least 140ms
RESET
minimum will be generated. The min 140ms tRP delay
commences as the Manual Reset input is released
from the low level. (see Figure 2)
Figure 1. Pushbutton RESET
MR
Supply
Voltage
RESET
CAT825
VCC
GND
RESET
Figure 2. Timing Diagram – Pushbutton RESET
tPB
MR
tPDLY
VIH
VIL
tRP
RESET
VOH
VOL
RESET
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
7
Doc. No. MD-3027, Rev. D
CAT823, CAT824, CAT825
WATCHDOG TIMER
The CAT823 and CAT824 provide a Watchdog input
¯¯¯¯¯¯
(WDI). The watchdog timer function forces RESET
(and RESET in the CAT824) signals active when the
WDI input does not have a transition from low-to-high
or high-to-low within 1.12 seconds. Timeout of the
¯¯¯¯¯¯ (RESET on the
watchdog starts when RESET
CAT824) becomes inactive. If a transition occurs on
the WDI input pin prior to the watchdog time-out, the
watchdog timer is reset and begins to time-out again.
If the watchdog timer is allowed to time-out, then the
reset output(s) will go active for tRP and once released
will repeat the watchdog timeout process.
The watchdog can be disabled by floating (or tristating) the WDI input (see Figure 4). If the watchdog
is disabled the WDI pin will be pulled low for the first
th
7/8 ’s of the watchdog period (tWD) and pulled high for
th
the last 1/8 of the watchdog period. This pulling low
of the WDI input and then high is used to detect an
open or tri-state condition and will continue to repeat
until the WDI input is driven high or low.
Figure 3 below shows a typical implementation of a
watchdog function. Any processor signal that repeats
dependant on the normal operation of the processor
or directed by the software operating on the processor
For most efficient operation of devices with the
watchdog function the WDI input should be held low
the majority of the time and only strobed high as
required to reset the watchdog timer.
can be used to strobe the watchdog input. The most
reliable is a dedicated I/O output transitioned by a
specific software instruction.
Figure 3. Watchdog Timer
WDI
MR
Supply
Voltage
CAT823
VCC
PIC
µC
GND
ADDRESS
DECODER
RESET
MCLR
Figure 4. Watchdog Disable Circuit
Tristate
VCC
VCC
RESET
GND
150kΩ
CAT823
µC
OUTPUT
MR
WDI
110kΩ
Doc. No. MD-3027 Rev. D
8
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT823, CAT824, CAT825
Figure 5. Timing Diagram – Strobe Input
INVALID
STROBE
VALID
STROBE
INDETERMINATE
STROBE
WDI
tWD
MIN.
MAX.
RESET
Figure 6. Timing Diagram – Power Down
VCC
VRST (MAX)
VRST
VRST (MIN)
tRD
RESET
VOH
RESET Slews with VCC
VOL
RESET (CAT824 & CAT825)
Figure 7. Timing Diagram – Power Up
VRST (MAX)
VRST
VRST (MIN)
VCC
tRP
RESET
VOH
VOL
RESET
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
9
RESET (CAT824 & CAT825)
Doc. No. MD-3027, Rev. D
CAT823, CAT824, CAT825
OUTPUT VALID CONDITIONS
APPLICATION NOTES
¯¯¯¯¯¯ output uses a push-pull output which can
The RESET
maintain a valid output down to a VCC of 1.0 volts. To
sink current below 0.8V a resistor can be connected
¯¯¯¯¯¯ to Ground (see Figure 8.)
from RESET
This
¯¯¯¯¯¯
arrangement will maintain a valid value on the RESET
output during both power up and down but will draw
¯¯¯¯¯¯ output is in the high state. A
current when the RESET
resistor value of about 100kΩ should be adequate in
most situations to maintain a low condition valid
output down to VCC equal to 0V.
µP’s with Bidirectional Reset Pins
¯¯¯¯¯¯ output can be pulled low by processors
The RESET
like the 68HC11 allowing for a system reset issued by
the processor. The maximum pullup current that can
be sourced by the CAT82_L/M is 1.5mA (and by the
CAT82_T/R/S/Z/Y is 800µA) allowing the processor to
pull the output low even when the CAT82x is pulling it
high.
Power Transients
Generally short duration negative-going transients of
less than 2µs on the power supply at VRST minimum
will not cause a reset condition. However the lower
the voltage of the transient the shorter the required
time to cause a reset output. These issues can
usually be remedied by the proper location of bypass
capacitance on the circuit board.
¯¯¯¯¯¯ Valid to 0 Volts VCC
Figure 8. RESET
WDI
MR
CAT823
VCC
Doc. No. MD-3027 Rev. D
100kΩ
GND
µC
RESET
RESET
10
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT823, CAT824, CAT825
PACKAGE OUTLINE DRAWINGS
TSOT-23 5-Lead (TD)
(1)(2)
SYMBOL
D
MIN
NOM
A
e
E1
E
MAX
1.00
A1
0.01
0.05
0.10
A2
0.80
0.87
0.90
b
0.30
c
0.12
0.45
0.15
D
2.90 BSC
E
2.80 BSC
E1
1.60 BSC
e
0.95 TYP
L
0.30
L1
0.40
0.20
0.50
0.60 REF
L2
0.25 BSC
θ
0º
8º
TOP VIEW
A2 A
b
θ
L
A1
c
L2
L1
SIDE VIEW
END VIEW
Notes:
(1) All dimensions in millimeters. Angles in degrees.
(2) Complies with JEDEC standard MO-193.
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
11
Doc. No. MD-3027, Rev. D
CAT823, CAT824, CAT825
SC-70 5-Lead (SD)
(1)(2)
SYMBOL
D
e
e
E1 E
MIN
MAX
A
0.80
1.10
A1
0.00
0.10
A2
0.80
1.00
b
0.15
0.30
c
0.10
0.18
D
1.80
2.00
2.20
E
1.80
2.10
2.40
E1
1.15
1.25
1.35
e
L
TOP VIEW
NOM
0.65 BSC
0.26
0.36
L1
0.42 REF
L2
0.15 BSC
0.46
θ
0°
8°
θ1
4°
10°
θ1
A2 A
θ
θ1
b
L
L1
A1
SIDE VIEW
c
L2
END VIEW
Notes:
(1) All dimensions in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-203.
Doc. No. MD-3027 Rev. D
12
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT823, CAT824, CAT825
EXAMPLE OF ORDERING INFORMATION (1)
Prefix
Device #
CAT
823
Optional
Company ID
Product
Number
Suffix
823
824
825
L
TD
I
Package
TD: TSOT-23 5-Lead
SD: SC-70 5-Lead
Reset Threshold
Voltage
L: 4.63V
M: 4.38V
T: 3.08V
S: 2.93V
R: 2.63V
Z: 2.32V
Y: 2.19V
-G
T3
Lead Finish
G:NiPdAu
Tape & Reel
T: Tape & Reel
3: 3,000/Reel
Temperature Range
I = Industrial (-40ºC to 85ºC)
TOP MARKING INFORMATION (FOR ALL THRESHOLDS)
Device #
CAT823
CAT824
CAT825
CAT823
CAT824
Package
TSOT-23
TSOT-23
TSOT-23
SC-70
SC-70
Top Marking
TS
TB
TD
RG
TB
CAT825
SC-70
TD
Notes:
(1) All packages are RoHS-compliant (Lead-free, Halogen-free).
(2)
The standard lead finish is NiPdAu.
(3)
This device used in the above example is a CAT823LTDI -GT3 (4.63V, TSOT-23 5-Lead, Industrial Temperature, NiPdAu, Tape & Reel,
3,000/Reel,
(4)
Contact factory for package availability.
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
13
Doc. No. MD-3027, Rev. D
CAT823, CAT824, CAT825
ORDERING INFORMATION
Device
Reset
Threshold
CAT823LTDI-GT3
CAT823MTDI-GT3
CAT823TTDI-GT3
CAT823STDI-GT3
CAT823RTDI-GT3
CAT823ZTDI-GT3
CAT823YTDI-GT3
CAT823LSDI-GT3
CAT823MSDI-GT3
CAT823TSDI-GT3
CAT823SSDI-GT3
CAT823RSDI-GT3
CAT823ZSDI-GT3
CAT823YSDI-GT3
4.63V
4.38V
3.08V
2.93V
2.63V
2.32V
2.19V
4.63V
4.38V
3.08V
2.93V
2.63V
2.32V
2.19V
CAT824LTDI-GT3
CAT824MTDI-GT3
CAT824TTDI-GT3
CAT824STDI-GT3
CAT824RTDI-GT3
CAT824ZTDI-GT3
CAT824YTDI-GT3
CAT824LSDI-GT3
CAT824MSDI-GT3
CAT824TSDI-GT3
CAT824SSDI-GT3
CAT824RSDI-GT3
CAT824ZSDI-GT3
CAT824YSDI-GT3
4.63V
4.38V
3.08V
2.93V
2.63V
2.32V
2.19V
4.63V
4.38V
3.08V
2.93V
2.63V
2.32V
2.19V
CAT825LTDI-GT3
CAT825MTDI-GT3
CAT825TTDI-GT3
CAT825STDI-GT3
CAT825RTDI-GT3
CAT825ZTDI-GT3
CAT825YTDI-GT3
CAT825LSDI-GT3
CAT825MSDI-GT3
CAT825TSDI-GT3
CAT825SDI-GT3
CAT825RSDI-GT3
CAT825ZSDI-GT3
CAT825YSDI-GT3
4.63V
4.38V
3.08V
2.93V
2.63V
2.32V
2.19V
4.63V
4.38V
3.08V
2.93V
2.63V
2.32V
2.19V
Doc. No. MD-3027, Rev. D
Inputs
Outputs
Package
¯¯¯
MR
WDI
RESET
¯¯¯¯¯¯
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
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·
·
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·
·
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·
·
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·
·
·
·
·
·
·
·
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·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
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·
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·
·
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·
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·
·
·
·
·
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·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
14
RESET
TSOT-23-5
SC-70-5
TSOT-23-5
SC-70-5
TSOT-23-5
SC-70-5
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT823, CAT824, CAT825
REVISION HISTORY
Date
10-Sep-07
Rev.
A
Reason
Initial Release
23-May-08
B
Update Package Outline Drawings
Update Top Mark Information
5-Nov-08
C
Change logo and fine print to ON Semiconductor
01-July-10
D
Update Ordering Information Table
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to
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Doc. No. MD-3027, Rev. D