CD40160BM/CD40160BC Decade Counter with Asynchronous Clear CD40161BM/CD40161BC Binary Counter with Asynchronous Clear CD40162BM/CD40162BC Decade Counter with Synchronous Clear CD40163BM/CD40163BC Binary Counter with Synchronous Clear General Description Features These (synchronous presettable up) counters are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They feature an internal carry look-ahead for fast counting schemes and for cascading packages without additional gating. A low level at the load input disables counting and causes the outputs to agree with the data input after the next positive clock edge. The clear function for the CD40162B and CD40163B is synchronous and a low level at the clear input sets all four outputs low after the next positive clock edge. The clear function for the CD40160B and CD40161B is asynchronous and a low level at the clear input sets all four outputs low, regardless of the state of the clock. Counting is enabled when both count enable inputs are high. Input T is fed forward to also enable the carry out. The carry output is a positive pulse with a duration approximately equal to the positive portion of QA and can be used to enable successive cascaded stages. Logic transitions at the enable P or T inputs can occur when the clock is high or low. Y Y Y Y Y Y Y Y Y Wide supply voltage range 3.0V to 15V High noise immunity 0.45 VDD (typ.) Low power TTL fan out of 2 driving 74L compatibility or 1 driving 74LS Internal look-ahead for fast counting schemes Carry output for N-bit cascading Load control line Synchronously programmable Equivalent to MC14160B, MC14161B, MC14162B, MC14163B Equivalent to MM74C160, MM74C161, MM74C162, MM74C163 Connection Diagram Dual-In-Line Package Order Number CD40160B, CD40161B, CD40162B or CD40163B TL/F/5986 – 1 Top View C1995 National Semiconductor Corporation TL/F/5986 RRD-B30M105/Printed in U. S. A. CD40160BM/BC Decade Counter with Asynchronous, CD40162BM/BC Synchronous Clear CD40161BM/BC Binary Counter with Asynchronous, CD40163BM/BC Synchronous Clear March 1988 Absolute Maximum Ratings Recommended Operating Conditions (Note 2) (Notes 1 & 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (Soldering, 10 seconds) DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD40XXXBM CD40XXXBC b 0.5 to a 18 VDC b 0.5 to VDD a 0.5 VDC b 65§ C to a 150§ C 3V to 15 VDC 0V to VDD VDC b 55§ C to a 125§ C b 40§ C to a 85§ C 700 mW 500 mW 260§ C DC Electrical Characteristics CD40160BM/CD40161BM/CD40162BM/CD40163BM (Note 2) Limits Symbol Parameter b 55§ C Conditions Min a 25§ C Max Min a 125§ C Typ Max Min Units Max IDD Quiescent Device Current VDD e 5V VDD e 10V VDD e 15V 5 10 20 5 10 20 150 300 600 mA mA mA VOL Low Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 V V V High Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V VIL Low Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1V or 9V VDD e 15V, VO e 1.5V or 13.5V VIH High Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1V or 9V VDD e 15V, VO e 1.5V or 13.5V 3.5 7.0 11.0 3.5 7.0 11.0 IOL Low Level Output Current (Note 3) VDD e 5V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 0.64 1.6 4.2 0.51 1.3 3.4 IOH High Level Output Current (Note 3) VDD e 5V, VO e 4.6V VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V b 0.64 b 1.6 b 4.2 b 0.51 b 1.3 b 3.4 IIN Input Current VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V VOH 4.95 9.95 14.95 4.95 9.95 14.95 5 10 15 4.95 9.95 14.95 1.5 3.0 4.0 1.5 3.0 4.0 V V V 1.5 3.0 4.0 V V V 3.5 7.0 11.0 V V V 0.88 2.25 8.8 0.36 0.9 2.4 mA mA mA b 0.88 b 2.25 b 8.8 b 0.36 b 0.9 b 2.4 mA mA mA b 0.10 b 10 b 5 b 0.10 b 1.0 0.10 10b5 0.10 1.0 mA mA DC Electrical Characteristics CD40160BC/CD40161BC/CD40162BC/CD40163BC (Note 2) Limits Symbol Parameter b 40§ C Conditions Min Max a 25§ C Min Typ a 85§ C Max Min Units Max IDD Quiescent Device Current VDD e 5V VDD e 10V VDD e 15V 20 40 80 20 40 80 150 300 600 mA mA mA VOL Low Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 V V V High Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V Low Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1V or 9V VDD e 15V, VO e 1.5V or 13.5V VOH VIL 4.95 9.95 14.95 2 4.95 9.95 14.95 1.5 3.0 4.0 5 10 15 4.95 0.95 14.95 1.5 3.0 4.0 V V V 1.5 3.0 4.0 V V V DC Electrical Characteristics CD40160BC/CD40161BC/CD40162BC/CD40163BC (Note 2) (Continued) Limits Symbol Parameter b 40§ C Conditions Min Max a 25§ C Min VIH High Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1V or 9V VDD e 15V, VO e 1.5V or 13.5V 3.5 7.0 11.0 3.5 7.0 11.0 IOL Low Level Output Current (Note 3) VDD e 5V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 0.52 1.3 3.6 0.44 1.1 3.0 IOH High Level Output Current (Note 3) VDD e 5V, VO e 4.6V VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V b 0.52 b 1.3 b 3.6 b 0.44 b 1.1 b 3.0 IIN Input Current VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V a 85§ C Typ Max Min Units Max 3.5 7.0 11.0 V V V 0.88 2.25 8.8 0.36 0.9 2.4 mA mA mA b 0.88 b 2.25 b 8.8 b 0.36 b 0.9 b 2.4 mA mA mA b 0.30 b 10 b 5 b 0.30 b 1.0 0.30 10b5 0.30 1.0 mA mA AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, RL e 200k, unless otherwise specified. Symbol Parameter Typ Max Units 250 100 80 400 160 130 ns ns ns VDD e 5V VDD e 10V VDD e 15V 290 120 100 450 190 160 ns ns ns Propagation Delay Time from T Enable to Carry Out VDD e 5V VDD e 10V VDD e 15V 180 70 60 290 130 110 ns ns ns tPHL Propagation Time from Clear to Q (CD40160B, CD40161B Only) VDD e 5V VDD e 10V VDD e 15V 190 80 70 300 150 120 ns ns ns tSU Minimum Time Prior to Clock that Data or Load must be Present VDD e 5V VDD e 10V VDD e 15V 120 30 25 tSU Minimum Time Prior to Clock that Enable P or T must be Present VDD e 5V VDD e 10V VDD e 15V 170 70 60 280 120 100 ns ns ns tSU Minimum Time Prior to Clock that Clear must be Present (CD40162B, CD40163B Only) VDD e 5V VDD e 10V VDD e 15V 120 50 40 190 80 70 ns ns ns tWL or tWH Maximum Clock Pulse Width VDD e 5V VDD e 10V VDD e 15V 125 45 35 250 90 70 ns ns ns tRCL or tFCL Maximum Clock Rise or Fall Time VDD e 5V VDD e 10V VDD e 15V 15 5.0 5.0 ms ms ms fCL Maximum Clock Frequency VDD e 5V VDD e 10V VDD e 15V tTHL or tTLH Transition Time All Outputs VDD e 5V VDD e 10V VDD e 15V 100 50 40 200 100 80 ns ns ns 7.5 pF tPHL or tPLH Propagation Delay Time from Clock to Q tPHL or tPLH Propagation Delay Time from Clock to Carry Out tPHL or tPLH Conditions VDD e 5V VDD e 10V VDD e 15V Min 2 5.5 7 ns ns ns 4 11 14 CIN Average Input Capacitance Any Input 5.0 CPD Power Dissipation Capacity (Note 4) 95 MHz MHz MHz pF *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: VSS e 0V unless otherwise specified. Note 3: IOH and IOL are tested one output at a time. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note, AN-90. 3 Logic Diagram CD40160B, CD40162B Clear is Synchronous for the CD40162B TL/F/5986 – 2 CD40161B, CD40163B Clear is Synchronous for the CD40163B TL/F/5986 – 3 4 Logic Waveforms CD40160B, . . . CD40162B Decade Counters CD40161B, . . . CD40163B Binary Counters TL/F/5986 – 5 TL/F/5986 – 4 Switching Time Waveforms TL/F/5986 – 6 Note 1: All input pulses are from generators having the following characteristics: tr e tf e 20 ns, PRR s 1 MHz, duty cycle s 50%, ZOUT & 50X. Note 2: All times are measured from 50% to 50%. Cascading Packages TL/F/5986 – 7 5 6 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD40160BMJ, CD40160BCJ, CD40161BMJ, CD40161BCJ, CD40162BMJ, CD40162BCJ, CD40163BMJ or CD40163BCJ NS Package Number J16A 7 CD40160BM/BC Decade Counter with Asynchronous, CD40162BM/BC Synchronous Clear CD40161BM/BC Binary Counter with Asynchronous, CD40163BM/BC Synchronous Clear Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number CD40160BMN, CD40160BCN, CD40161BMN, CD40161BCN, CD40162BMN, CD40162BCN, CD41063BMN or CD40163BCN NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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