CD4000BMS, CD4001BMS CD4002BMS, CD4025BMS CMOS NOR Gate November 1994 Features Pinouts • High-Voltage Types (20V Rating) CD4000BMS TOP VIEW • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V NC 1 14 VDD • Buffered Inputs and Outputs NC 2 13 F • Standard Symmetrical Output Characteristics A 3 12 E • 100% Tested for Maximum Quiescent Current at 20V B 4 11 D C 5 10 K = D + E + F • 5V, 10V and 15V Parametric Ratings • Maximum Input Current of 1µA at 18V Over Full Package-Temperature Range; 100nA at 18V and +25oC 8 G VSS 7 NC = NO CONNECTION • Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Meets All Requirements of JEDEC Tentative Standards No. 13B, “Standard Specifications for Description of “B” Series CMOS Device’s 9 L=G H=A+B+C 6 CD4001BMS TOP VIEW A 1 14 VDD B 2 13 H J=A+B 3 12 G K=C+D 4 11 M = G + H Description C 5 10 L = E + F CD4000BMS - Dual 3 Plus Inverter D 6 9 F CD4001BMS - Quad 2 Input VSS 7 8 E CD4002BMS - Dual 4 Input CD4025BMS - Triple 3 Input NC = NO CONNECTION CD4002BMS TOP VIEW CD4000BMS, CD4001BMS, CD4002BMS, and CD4025BMS NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. J=A+B+C+D 1 The CD4000BMS, CD4001BMS, CD4002BMS and the CD4025BMS is supplied in these 14 lead outline packages: CD4000B CD4001B CD4002B CD4025B Braze Seal DIP H4X H4Q H4Q H4Q Frit Seal DIP H1B H1B H1B H1B Ceramic Flatpack H3W H3W H3W H3W 14 VDD A 2 13 K = E + F + G + H B 3 12 H C 4 11 G D 5 10 F NC 6 9 E 8 NC NC = NO CONNECTION VSS 7 CD4025BMS TOP VIEW A 1 14 VDD B 2 13 G D 3 12 H E 4 11 I F 5 10 L = G + H + I K=D+E+F 6 VSS 7 9 J=A+B+C 8 C NC = NO CONNECTION CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 7-649 File Number 3289 CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Functional Diagrams 14 VDD A 1 2 13 F B 2 3 12 E J 3 NC 1 NC A K=D+E+F M=G+H J=A+B 14 VDD 13 H 12 G K=C+D B 4 11 D K 4 11 M C 5 10 K C 5 10 L H 6 9 L D 6 9 F VSS 7 8 G VSS 7 8 E H=A+B+C L=G L=E+F CD4000BMS J 1 CD4001BMS 14 VDD A 1 2 14 VDD 13 G J=A+B+C+D A 2 13 K B B 3 12 H D 3 12 H C 4 11 G E 4 11 I D 5 10 F F 5 10 L NC 6 9 E K 6 9 J 8 C L=G+H+I K=D+E+F VSS 7 K=E+F+G+H 8 NC VSS 7 J=A+B+C CD4002BMS CD4025BMS 7-650 Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Absolute Maximum Ratings Reliability Information DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND Input Leakage IIL VIN = VDD or GND VDD = 20 VDD = 18V Input Leakage IIH VIN = VDD or GND VDD = 20 GROUP A SUBGROUPS LIMITS TEMPERATURE MIN MAX 1 +25 - 0.5 µA +125oC - 50 µA 3 -55oC - 0.5 µA 1 +25o C -100 - nA 2 +125oC -1000 - nA 3 -55oC -100 - nA 1 +25oC - 100 nA 2 +125oC - 1000 nA - 100 nA - 50 mV - V 3 -55oC Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 VDD = 18V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V UNITS 2 oC 1 +25oC 0.53 - mA Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA 1 +25oC - -0.53 mA 1 +25oC - -1.8 mA Output Current (Source) Output Current (Source) IOH5A IOH5B VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA 1 +25oC -2.8 -0.7 V 1 +25oC 0.7 2.8 V N Threshold Voltage P Threshold Voltage Functional VNTH VPTH F VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 2.8V, VIN = VDD or GND 7 +25oC VDD = 20V, VIN = VDD or GND 7 +25oC VDD = 18V, VIN = VDD or GND 8A +125oC VDD = 3V, VIN = VDD or GND 8B -55oC VOH > VOL < VDD/2 VDD/2 V Input Voltage Low (Note 2) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V Input Voltage High (Note 2) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V Input Voltage Low (Note 2) VIL VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC - 4 V Input Voltage High (Note 2) VIH VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC 11 - V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs 7-651 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Propagation Delay Transition Time SYMBOL TPHL TPLH CONDITIONS (NOTE 1, 2) GROUP A SUBGROUPS TEMPERATURE VDD = 5V, VIN = VDD or GND 9 10, 11 TTHL TTLH VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC +25oC +125oC, -55oC LIMITS MIN MAX UNITS - 250 ns - 338 ns - 200 ns - 270 ns NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS NOTES VDD = 5V, VIN = VDD or GND 1, 2 TEMPERATURE o o -55 C, +25 C VDD = 15V, VIN = VDD or GND Output Voltage VOL VDD = 5V, No Load 1, 2 1, 2 1, 2 MAX UNITS - 0.25 µA +125 C - 7.5 µA -55oC, +25oC - 0.5 µA +125oC - 1.5 µA o VDD = 10V, VIN = VDD or GND MIN - 0.5 µA +125oC - 3.0 µA +25oC, +125oC, - 50 mV -55oC, +25oC -55oC Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC - 50 mV Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC, -55oC 4.95 - V Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC 9.95 - V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA -55oC 0.64 - mA Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) Input Voltage Low IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VIL VDD = 10V, VOUT = 0.5V 1, 2 VDD = 15V, VOUT = 1.5V 1, 2 VDD = 5V, VOUT = 4.6V 1, 2 VDD = 5V, VOUT = 2.5V 1, 2 VDD = 10V, VOUT = 9.5V 1, 2 VDD =15V, VOUT = 13.5V 1, 2 o +125 C 0.9 - mA -55oC 1.6 - mA +125oC 2.4 - mA -55oC 4.2 - mA +125oC - -0.36 mA -55oC - -0.64 mA +125oC - -1.15 mA -55oC - -2.0 mA +125oC - -0.9 mA -55oC - -1.6 mA +125oC - -2.4 mA -55oC - -4.2 mA +25oC, +125oC, - 3 V VDD = 10V, VOH > 9V, VOL < 1V 1, 2 VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, -55oC 7 - V 1, 2, 3 +25oC - 120 ns -55oC Input Voltage High VIH Propagation Delay TPHL TPLH VDD = 10V VDD = 15V 1, 2, 3 +25oC - 90 ns TTHL TTLH VDD = 10V 1, 2, 3 +25oC - 100 ns VDD = 15V 1, 2, 3 +25oC - 80 ns Transition Time 7-652 Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER SYMBOL Input Capacitance CIN CONDITIONS Any Input NOTES TEMPERATURE MIN MAX UNITS 1, 2 +25oC - 7.5 pF NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC - 2.5 µA 1, 4 +25oC -2.8 -0.2 V VDD = 10V, ISS = -10µA 1, 4 +25o - ±1 V VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V 1, 4 +25oC - ±1 V 1 +25oC VOH > VDD/2 VOL < VDD/2 V 1, 2, 3, 4 +25oC - 1.35 x +25oC Limit ns Supply Current N Threshold Voltage VNTH N Threshold Voltage Delta ∆VNTH P Threshold Voltage VPTH P Threshold Voltage Delta ∆VPTH Functional F VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 18V, VIN = VDD or GND C VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 3. See Table 2 for +25oC limit. NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER SYMBOL DELTA LIMIT Supply Current - SSI IDD ±0.1µA Output Current (Sink) IOL5 ± 20% x Pre-Test Reading IOH5A ± 20% x Pre-Test Reading Output Current (Source) TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 METHOD GROUP A SUBGROUPS Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5 Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5 Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5 100% 5004 1, 7, 9, Deltas CONFORMANCE GROUP PDA (Note 1) Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 100% 5004 1, 7, 9, Deltas 100% 5004 2, 3, 8A, 8B, 10, 11 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample 5005 1, 7, 9 Sample 5005 1, 2, 3, 8A, 8B, 9 PDA (Note 1) Final Test Group A Group B Group D NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. 7-653 READ AND RECORD IDD, IOL5, IOH5A Subgroups 1, 2, 3, 9, 10, 11 Subgroups 1, 2 3 Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS Group E Subgroup 2 TEST READ AND RECORD MIL-STD-883 METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD 5005 1, 7, 9 Table 4 1, 9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND VDD 9V ± -0.5V 50kHz 6, 9, 10 3 - 5, 8, 11 - 13 3, 4, 10, 11 1, 2, 5, 6, 8, 9, 12, 13 1, 13 2 - 5, 9 - 12 6, 9, 10 1 - 5, 8, 11 - 13 25kHz PART NUMBER CD4000BMS Static Burn-In 1 Note 1 1, 2, 6, 9, 10 3 - 5, 7, 8, 11 - 13 14 Static Burn-In 2 Note 1 1, 2, 6, 9, 10 7 3 - 5, 8, 11 - 14 Dynamic BurnIn Note 1 1, 2 7 14 1, 2, 6, 9, 10 7 3 - 5, 8, 11 - 14 Irradiation Note 2 PART NUMBER CD4001BMS Static Burn-In 1 Note 1 3, 4, 10, 11 1, 2, 5 - 9, 12, 13 14 Static Burn-In 2 Note 1 3, 4, 10, 11 7 1, 2, 5, 6, 8, 9, 12 - 14 Dynamic BurnIn Note 1 - 7 14 3, 4, 10, 11 7 1, 2, 5, 6, 8, 9, 12 - 14 Irradiation Note 2 PART NUMBER CD4002BMS Static Burn-In 1 Note 1 1, 6, 8, 13 2 - 5, 7, 9 - 12 14 Static Burn-In 2 Note 1 1, 6, 8, 13 7 2 - 5, 9 - 12, 14 Dynamic BurnIn Note 1 6, 8 7 14 1, 6, 8, 13 7 2 - 5, 9 - 12, 14 Irradiation Note 2 PART NUMBER CD4025BMS Static Burn-In 1 Note 1 6, 9, 10 1 - 5, 7, 8, 11 - 13 14 Static Burn-In 2 Note 1 6, 9, 10 7 1 - 5, 8, 11 - 14 Dynamic BurnIn Note 1 - 7 14 6, 9, 10 7 1 - 5, 8, 11 - 14 Irradiation Note 2 NOTE: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 654 Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Schematic and Logic Diagrams 14 p VDD p *ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK p p p 6(10) n p p p n n n n 9 8* 5* n p (12) 14 p n VDD p 3* n (11) p VSS p 1* p n INVERTER AND 1 OF 2 GATES (NUMBERS IN PARENTHESES ARE TERMINAL NUMBERS FOR SECOND GATE) 4* n (13) VDD (8, 6, 13) 3 n n n (10, 4, 11) p n 2* 7 n VSS (9, 5, 12) 5(12) 7 VSS 6 3(11) 1 OF 4 GATES (NUMBERS IN PARANTHESES ARE TERMINAL NUMBERS FOR OTHER GATES) (10) LOGIC DIAGRAM 4(13) 1(8, 6,13) 3 8 (10, 4, 11) 9 2(9, 5, 12) CD4000BMS p LOGIC DIAGRAM CD4001BMS 14 VDD p p p p p 14 VDD 1 n n p p p (13) p 2* n (12) p n 3* n (11) 6 p n 3* p n n (1, 11) p n 4* n (10) 4* p n n (2, 12) p n 5* n (9) 5* n (8, 13) 1 OF 2 GATES (NUMBERS IN PARENTHESES ARE TERMINAL 7 NUMBERS FOR SECOND GATE) VSS 1 OF 3 GATES (NUMBERS IN PARENTHESES ARE TERMINAL NUMBERS FOR OTHER GATES) 2(12) 7 VSS 3(1, 11) 3(11) 1 (13) 4(10) 5(9) n 6 4(2, 12) (9, 10) LOGIC DIAGRAM 5(8, 13) CD4002BMS LOGIC DIAGRAM CD4025BMS 7-655 (9, 10) CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Typical Performance Characteristics POWER DISSIPATION PER GATE (PD) (µW) OUTPUT VOLTAGE (VO) (V) AMBIENT TEMPERATURE (TA) = +25oC SUPPLY VOLTAGE (VDD) = 15V 15 10V 10 5V 5 105 AMBIENT TEMPERATURE (TA) = +25oC 8 6 4 SUPPLY VOLTAGE (VDD) = 15V 2 104 10V 8 6 4 103 10V 5V 2 8 6 4 2 102 8 6 4 CL = 50pF CL = 15pF 2 10 2 5 10 15 INPUT VOLTAGE (VI) (V) 20 25 1 AMBIENT TEMPERATURE (TA) = +25oC 30 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 25 20 15 10V 10 5V 5 0 5 10 -20 -25 -30 OUTPUT HIGH (SINK) CURRENT (IOH) (mA) -5 -15 -15V 4 6 8 104 15 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10 7.5 10V 5 2.5 5V 5 -15 -10 -10V 2 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) 0 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V 4 6 8 FIGURE 4. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -5 2 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -10 4 6 8 AMBIENT TEMPERATURE (TA) = +25oC 0 15 FIGURE 3. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS -15 2 103 10 102 INPUT FREQUENCY (fI) (kHz) FIGURE 2. TYPICAL POWER DISSIPATION vs FREQUENCY OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) FIGURE 1. TYPICAL VOLTAGE TRANSFER CHARACTERISTICS 4 68 -10 AMBIENT TEMPERATURE (TA) = -5 0 +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 -10V -15V FIGURE 5. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS -10 -15 OUTPUT HIGH (SINK) CURRENT (IOH) (mA) 0 FIGURE 6. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 7-656 CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Typical Performance Characteristics (Continued) 200 PROPAGATION DELAY TIME PER GATE (tPHL, tPLH) (ns) TRANSITION TIME (tTHL, tTLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC 200 SUPPLY VOLTAGE (VDD) = 5V 150 100 10V 15V 50 0 20 175 150 SUPPLY VOLTAGE (VDD) = 5V 125 100 10V 75 50 15V 25 0 10 40 60 80 100 LOAD CAPACITANCE (CL) (pF) AMBIENT TEMPERATURE (TA) = +25oC 20 30 40 50 60 70 80 90 100 LOAD CAPACITANCE (CL) (pF) FIGURE 7. TYPICAL TRANSITION TIME vs LOAD CAPACITANCE FIGURE 8. TYPICAL PROPAGATION DELAY TIME vs LOAD CAPACITANCE Chip Dimensions and Pad Layouts CD4000BMS CD4001BMS CD4002BMS CD4025BMS Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch) 7-657