CED4311/CEU4311 P-Channel Enhancement Mode Field Effect Transistor FEATURES -30V, -33A, RDS(ON) = 18mΩ @VGS = -10V. RDS(ON) = 30mΩ @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. D Lead free product is acquired. TO-251 & TO-252 package. G D G S CEU SERIES TO-252(D-PAK) ABSOLUTE MAXIMUM RATINGS Parameter G D S CED SERIES TO-251(I-PAK) Tc = 25 C unless otherwise noted Symbol Limit -30 Units V VGS ±20 V ID -33 A IDM -100 A 36 W Drain-Source Voltage VDS Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed S a Maximum Power Dissipation @ TC = 25 C PD - Derate above 25 C Operating and Store Temperature Range 0.29 W/ C TJ,Tstg -55 to 150 C Thermal Characteristics Symbol Limit Units Thermal Resistance, Junction-to-Case Parameter RθJC 3.5 C/W Thermal Resistance, Junction-to-Ambient RθJA 50 C/W Specification and data are subject to change without notice . 1 Rev 2. 2010.July http://www.cetsemi.com CED4311/CEU4311 Electrical Characteristics Parameter TA = 25 C unless otherwise noted Symbol Test Condition Min Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID = -250µA -30 Zero Gate Voltage Drain Current IDSS Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse Typ Max Units VDS = -30V, VGS = 0V -1 µA IGSSF VGS = 20V, VDS = 0V 100 nA IGSSR VGS = -20V, VDS = 0V -100 nA Off Characteristics V On Characteristics c Gate Threshold Voltage Static Drain-Source On-Resistance VGS(th) RDS(on) VGS = VDS, ID = -250µA -3 V VGS = -10V, ID = -10A -1 14 18 mΩ VGS = -4.5V, ID = -9A 23 30 mΩ Dynamic Characteristics d Forward Transconductance gFS Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss VDS = -5V, ID = -11A VDS = -15V, VGS = 0V, f = 1.0 MHz 21 S 1690 pF 285 pF 210 pF Switching Characteristics d Turn-On Delay Time td(on) Turn-On Rise Time tr Turn-Off Delay Time td(off) VDD = -10V, ID = -1A, VGS = -10V, RGEN = 6Ω 15 30 ns 9 18 ns 60 120 ns Turn-Off Fall Time tf 20 40 ns Total Gate Charge Qg 19 25 nC Gate-Source Charge Qgs Gate-Drain Charge Qgd VDS = -15V, ID = -7A, VGS = -4.5V 5 nC 7 nC Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current b IS Drain-Source Diode Forward Voltage c VSD VGS = 0V, IS = -3.2A Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. 2 -3.2 A -1.2 V CED4311/CEU4311 50 -VGS=10,8,7,6,5V 40 30 -ID, Drain Current (A) -ID, Drain Current (A) 50 -VGS=4V 20 10 -VGS=3V 0 0.0 0.5 1.0 1.5 2.0 2.5 0 1 2 -55 C 3 4 5 6 Figure 1. Output Characteristics Figure 2. Transfer Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) 1200 800 400 Coss Crss 0 5 10 15 20 25 2.2 1.9 ID=-10A VGS=-10V 1.6 1.3 1.0 0.7 0.4 -100 -50 0 50 100 150 200 -VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature( C) Figure 3. Capacitance Figure 4. On-Resistance Variation with Temperature VDS=VGS -IS, Source-drain current (A) C, Capacitance (pF) VTH, Normalized Gate-Source Threshold Voltage TJ=125 C -VGS, Gate-to-Source Voltage (V) Ciss ID=-250µA 1.1 1.0 0.9 0.8 0.7 0.6 -50 25 C 10 -VDS, Drain-to-Source Voltage (V) 1600 1.2 20 0 2000 1.3 30 3.0 2400 0 40 -25 0 25 50 75 100 125 150 VGS=0V 10 2 10 1 10 0 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) -VSD, Body Diode Forward Voltage (V) Figure 5. Gate Threshold Variation with Temperature Figure 6. Body Diode Forward Voltage Variation with Source Current 3 5 VDS=-15V ID=-7A 4 -ID, Drain Current (A) -VGS, Gate to Source Voltage (V) CED4311/CEU4311 3 2 1 0 0 4 8 12 16 20 24 10 3 10 2 10 1 10 0 10 -1 RDS(ON)Limit 100ms 1ms 10ms DC TC=25 C TJ=150 C Single Pulse 10 -2 10 -1 10 0 10 1 10 Qg, Total Gate Charge (nC) -VDS, Drain-Source Voltage (V) Figure 7. Gate Charge Figure 8. Maximum Safe Operating Area VDD t on RL V IN D VGS RGEN toff tr td(on) td(off) tf 90% 90% VOUT VOUT 10% INVERTED 10% G 90% S VIN 50% 50% 10% PULSE WIDTH Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance Figure 9. Switching Test Circuit 10 0 D=0.5 0.2 10 -1 PDM 0.1 t1 0.05 0.02 0.01 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 Single Pulse 10 -2 10 -2 t2 10 -1 10 0 10 1 10 2 Square Wave Pulse Duration (msec) Figure 11. Normalized Thermal Transient Impedance Curve 4 10 3 10 4 2