Central CMLDM7005 1306 Surface mount silicon dual n-channel enhancement-mode mosfet Datasheet

CMLDM7005
SURFACE MOUNT SILICON
DUAL N-CHANNEL
ENHANCEMENT-MODE
MOSFET
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CMLDM7005
consists of dual N-Channel enhancement-mode silicon
MOSFETs designed for high speed pulsed amplifier
and driver applications. These MOSFETs offer very low
rDS(ON) and low threshold voltage.
MARKING CODE: CC7
SOT-563 CASE
APPLICATIONS:
• Load switch/Level shifting
• Battery charging
• Boost switch
• Electro-luminescent backlighting
FEATURES:
• ESD protection up to 2kV (Human Body Model)
• 350mW power dissipation
• Very low rDS(ON)
• Low threshold voltage
• Logic level compatible
• Small, SOT-563 surface mount package
• Complementary dual P-Channel device: CMLDM8005
MAXIMUM RATINGS: (TA=25°C)
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (Steady State - Note 1)
Continuous Source Current (Body Diode)
Maximum Pulsed Drain Current
Power Dissipation (Note 1)
Power Dissipation (Note 2)
Power Dissipation (Note 2)
Operating and Storage Junction Temperature
Thermal Resistance (Note 1)
SYMBOL
VDS
VGS
ID
IS
IDM
PD
PD
PD
TJ, Tstg
ΘJA
20
8.0
650
280
1.3
350
300
150
-65 to +150
357
ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
IGSSF, IGSSR VGS=4.5V, VDS=0
1.0
IDSS
VDS=16V, VGS=0
100
BVDSS
VGS=0, ID=250μA
20
VGS(th)
VDS=VGS, ID=250μA
0.5
1.1
VSD
VGS=0, IS=200mA
1.1
rDS(ON)
VGS=4.5V, ID=600mA
0.14
0.23
rDS(ON)
VGS=2.5V, ID=500mA
0.2
0.275
rDS(ON)
VGS=1.8V, ID=350mA
0.7
gFS
VDS=10V, ID=400mA
1.0
UNITS
V
V
mA
mA
A
mW
mW
mW
°C
°C/W
UNITS
μA
nA
V
V
V
Ω
Ω
Ω
S
Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm2
(2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm2
(3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mm2
R3 (10-June 2013)
CMLDM7005
SURFACE MOUNT SILICON
DUAL N-CHANNEL
ENHANCEMENT-MODE
MOSFET
ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued: (TA=25°C unless otherwise noted)
SYMBOL TEST CONDITIONS
TYP
MAX
UNITS
Crss
VDS=16V, VGS=0, f=1.0MHz
18
pF
Ciss
VDS=16V, VGS=0, f=1.0MHz
100
pF
Coss
VDS=16V, VGS=0, f=1.0MHz
16
pF
Qg(tot)
VDS=10V, VGS=4.5V, ID=500mA
1.58
nC
Qgs
VDS=10V, VGS=4.5V, ID=500mA
0.17
nC
Qgd
VDS=10V, VGS=4.5V, ID=500mA
0.24
nC
ton
VDD=10V, VGS=4.5V, ID=200mA, RG=10Ω
10
ns
toff
VDD=10V, VGS=4.5V, ID=200mA, RG=10Ω
25
ns
SOT-563 CASE - MECHANICAL OUTLINE
PIN CONFIGURATION
LEAD CODE:
1) Source Q1
2) Gate Q1
3) Drain Q2
4) Source Q2
5) Gate Q2
6) Drain Q1
MARKING CODE: CC7
R3 (10-June 2013)
w w w. c e n t r a l s e m i . c o m
CMLDM7005
SURFACE MOUNT SILICON
DUAL N-CHANNEL
ENHANCEMENT-MODE
MOSFET
N-CHANNEL TYPICAL ELECTRICAL CHARACTERISTICS
R3 (10-June 2013)
w w w. c e n t r a l s e m i . c o m
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