SiP12107 www.vishay.com Vishay Siliconix 5 V, 3 A Current-Mode Constant On-Time Synchronous Buck Regulator DESCRIPTION FEATURES The SiP12107 is a high frequency current-mode constant on-time (CM-COT) synchronous buck regulator with integrated high-side and low-side power MOSFETs. Its power stage is capable of supplying 3 A continuous current at 4 MHz switching frequency. This regulator produces an adjustable output voltage down to 0.6 V from 2.8 V to 5.5 V input rail to accommodate a variety of applications, including computing, consumer electronics, telecom, and industrial. • Halogen-free According to IEC 61249-2-21 Definition • 2.8 V to 5.5 V input voltage • Adjustable output voltage down to 0.6 V • 3 A continuous output current • Programmable switching frequency up to 4 MHz • 95 % peak efficiency • Supports all ceramic capacitors No external ESR required • Ultrafast transient response • Selectable power saving mode or force current mode • ± 1 % accuracy • Pulse-by-pulse current limit • Scalable with SiP12108 - 5A • Fully protected with OTP, SCP, UVP, OVP • PGood Indicator • Compliant to RoHS Directive 2011/65/EU SiP12107’s CM-COT architecture delivers ultra-fast transient response with minimum output capacitance and tight ripple regulation at very light load. No ESR or external ESR network is required for loop stability purpose. The device also incorporates a power saving scheme that significantly increases light load efficiency. The regulator integrates a full protection feature set, including output overvoltage protection (OVP), output under voltage protection (UVP) and thermal shutdown (OTP). It also has UVLO for input rail and internal soft-start ramp. APPLICATIONS The SiP12107 is available in lead (Pb)-free power enhanced MLP-16L package in 3 mm x 3 mm dimension. • • • • • • Notebook computers Desktop PCs and servers Handheld devices POLs for telecom Consumer electronics Industrial and automation TYPICAL APPLICATION CIRCUIT AND PACKAGE OPTIONS PWR_SAVE_MODE ENABLE POWER GOOD PGD INPUT = 2.8 V to 5.5 V EN AUTO VIN VOUT LX VOUT VFB AVIN PGND GMO AGND RON Fig. 1 - Typical Application Circuit for SiP12107 S12-0412-Rev. B, 20-Feb-12 1 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix ABSOLUTE MAXIMUM RATINGS ELECTRICAL PARAMETER CONDITIONS LIMIT VIN Reference to PGND - 0.3 to 6 AVIN Reference to AGND - 0.3 to 6 LX Reference to PGND UNIT V - 0.3 to 6 AGND to PGND - 0.3 to + 0.3 All Logic Inputs Reference to AGND - 0.3 to AVIN + 0.3 TEMPERATURE Max. Operating Junction Temperature 150 Storage Temperature °C - 65 to 150 POWER DISSIPATION Junction to Ambient Thermal Impedance (RthJA) Maximum Power Dissipation 36.3 Ambient Temperature = 25 °C 3.4 Ambient Temperature = 100 °C 1.3 HBM 2 °C/W W ESD PROTECTION kV Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE ELECTRICAL PARAMETER MINIMUM TYPICAL MAXIMUM VIN 2.8 - 5.5 AVIN 2.8 - 5.5 LX -1 - 5.5 VOUT 0.6 - 0.85 x VIN Ambient Temperature S12-0412-Rev. B, 20-Feb-12 - 40 to 85 2 UNIT V °C Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix ELECTRICAL SPECIFICATIONS PARAMETER SYMBOL TEST CONDITION UNLESS OTHERWISE SPECIFIED VIN = AVIN = 3.3 V, TA = - 40 °C to 85 °C LIMITS MIN. TYP. MAX. VIN 2.8 - 5.5 AVIN 2.8 - 5.5 UNIT POWER SUPPLY Power Input Voltage Range Bias Input Voltage Range V IVIN_NOLOAD Device switching, IO = 0 A, Ron = 100 k, AUTO = Low - 1000 - IVIN_SHDN EN = 0 V - 6 12 AVIN UVLO Threshold AVIN, UVLO AVIN rising edge - 2.55 - V AVIN UVLO Hysteresis UVLOHYS - 300 - mV TA = 0 °C to + 70 °C 0.594 0.600 0.606 TA = - 40 °C to + 85 °C 0.591 0.600 0.609 VFB Input Bias Current - 2 200 nA Transconductance - 1 - mS COMP Source Current - 50 - COMP Sink Current - 50 - Input Current Shutdown Current μA PWM CONTROLLER Feedback Reference VFB Switching Frequency Range Guaranted by design 0.2 - 4 Minimum On-Time Guaranted by design - 50 - Minimum Off-Time VOUT = 1.2 V, RON = 100 k - 120 - - 1.5 - - 56 - - 33 - - 4.5 - - 20 - - - 25 - Rising temperature - 160 - Hysteresis - 35 - Soft Start Time V μA MHz ns ms INTEGRATED MOSFETS High-Side On Resistance Low-Side On Resistance VIN = 3.3 V m FAULT PROTECTIONS Over Current Limit Output OVP Threshold Output UVP Threshold Over Temperature Protection Inductor valley current VFB with respect to 0.6 V reference A % °C POWER GOOD VFB rising above 0.6 V reference - 20 - VFB falling below 0.6 V reference - - 10 - Power Good On Resistance - 30 - Power Good Delay Time - 6 - μs Power Good Output Threshold % ENABLE THRESHOLD Logic High Level 1.5 - - Logic Low Level - - 0.4 S12-0412-Rev. B, 20-Feb-12 3 V Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM 2 7 6 AVIN GMO AGND PGOOD 5 AUTO 3 1,16 EN VIN 8 OTP VIN 0.6 V REFERENCE UVLO SOFT START VIN + + OTA 9 + ON-TIME GENERATOR VFB CONTROL LOGIC SECTION LX ANTI-XCOND CONTROL 11,12,13 VIN PWM COMPARATOR I-V Converter Isense ZCD PGND RON 4 14,15 - OCP + VOUT UV Comparator 0.45 V 10 Current Mirror + VFB 0.72 V PAD - OV Comparator Isense Fig. 2 - SiP12107 Functional Block Diagram ORDERING INFORMATION PART NUMBER PACKAGE SIP12107DMP-T1-GE3 QFN33-16L SIP12107DB MARKING (LINE 2: P/N) 2107 Reference Board P/N AA W11B Format: Line 1: Dot Line 2: P/N Line 2: Siliconix Logo + ESD Symbol Line 3: Factory Code + Year Code + Work Week Code + Lot Code S12-0412-Rev. B, 20-Feb-12 4 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix PGND LX 16 PGND VIN PIN CONFIGURATION 15 14 13 1 12 LX AVIN 2 11 LX VIN 4 9 VFB 5 6 7 8 AGND RON GMO 10 VOUT PGD 3 AUTO EN MLPQ 3 x 3 - 16L Fig. 3 - SiP12107 Pin Configuration (Top View) PIN CONFIGURATION PIN NUMBER NAME FUNCTION 1 VIN Input supply voltage for power MOS. VIN = 2.8 V to 5.5 V 2 AVIN Input supply voltage for internal circuitry. AVIN = 2.8 V to 5.5 V 3 EN Enable pin. Enable > 1.5 V 4 RON An external resistor between RON and GND sets the switching on time. Sets switching mode AUTO to AVIN = PWM, AUTO to GND = light load mode 5 AUTO 6 PGD Power good output. Open drain. 7 GMO Connect to an external RC network for loop compensation and droop function 8 AGND Analog ground 9 VFB Feedback voltage. 0.6 V (typ.) 10 VOUT VOUT, output voltage sense connection 11 LX Switching output, inductor connection point 12 LX Switching output, inductor connection point 13 LX Switching output, inductor connection point 14 PGND Power ground 15 PGND Power ground 16 VIN Input supply voltage for power MOS. VIN = 2.8 V to 5.5 V S12-0412-Rev. B, 20-Feb-12 5 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 3.3 V, L = 1 μH, C = 3 x 22 μF, fSW = 1.2 MHz unless noted otherwise) 1.2 V PWM 1.8 V PWM Efficiency vs. IOUT (PSM) Efficiency vs. IOUT (PWM) Load Regulation: % of VOUT vs. IOUT (PSM) Load Regulation: % of VOUT vs. IOUT (PWM) 1.2 V PWM 1.8 V PWM Line Regulation 1.2 VOUT Nominal 0 A Load (PSM) S12-0412-Rev. B, 20-Feb-12 Line Regulation 1.2 VOUT at 3 A Load (PWM) 6 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix FSW Variation vs. IOUT (PWM) FSW Variation vs. IOUT (PSM) CH1: VOUT 20 mV/Div CH2: LX 2 V/Div CH1: VOUT 20 mV/Div CH2: LX 2 V/Div Output Ripple PSM: 0 A Load Output Ripple PSM: 0 A Load Output Ripple PWM: 0 A Load Output Ripple PWM: 3 A Load S12-0412-Rev. B, 20-Feb-12 7 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix VIN = 2 V/div VOUT = 1 V/div PGOOD = 2 V/div LX = 2 V/div VIN = 2 V/div VOUT = 1 V/div PGOOD = 2 V/div LX = 2 V/div Shutdown PSM: 0 A Load Startup PSM: 0 A Load VIN = 2 V/div VOUT = 1 V/div PGOOD = 2 V/div LX = 2 V/div VIN = 2 V/div VOUT = 1 V/div PGOOD = 2 V/div LX = 2 V/div Shutdown PSM: 3 A Load Startup PSM: 3 A Load VIN = 2 V/div VOUT = 1 V/div PGOOD = 2 V/div LX = 2 V/div VIN = 2 V/div VOUT = 1 V/div PGOOD = 2 V/div LX = 2 V/div Shutdown PWM: 0 A Load Startup PWM: 0 A Load S12-0412-Rev. B, 20-Feb-12 8 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix VIN = 2 V/div VOUT = 1 V/div PGOOD = 2 V/div LX = 2 V/div VIN = 2 V/div VOUT = 1 V/div PGOOD = 2 V/div LX = 2 V/div Startup PWM: 3 A Load Shutdown PWM: 3 A Load VOUT = 100 mV/div ILOAD = 1 A/div LX = 2 V/div VOUT = 100 mV/div ILOAD = 1 A/div LX = 2 V/div Load Step PSM: 0 A to 1.5 A Load (undershoot) Load Step PSM 0 A to 1.5 A Load (overshoot) VOUT = 200 mV/div ILOAD = 5 A/div LX = 2 V/div VOUT = 200 mV/div ILOAD = 5 A/div LX = 2 V/div Load Step PSM: 0 A to 3 A Load (undershoot) S12-0412-Rev. B, 20-Feb-12 Load Step PSM: 0 A to 3 A Load (overshoot) 9 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix VOUT = 50 mV/div ILOAD = 2 A/div LX = 2 V/div VOUT = 50 mV/div ILOAD = 2 A/div LX = 2 V/div Load Step PWM: 0 A to 1.5 A Load (undershoot) Load Step PWM 0 A to 1.5 A Load (overshoot) VOUT = 100 mV/div ILOAD = 5 A/div LX = 2 V/div VOUT = 100 mV/div ILOAD = 5 A/div LX = 2 V/div Load Step PWM: 0 A to 3 A Load (undershoot) S12-0412-Rev. B, 20-Feb-12 Load Step PWM 0 A to 3 A Load (overshoot) 10 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix OPERATIONAL DESCRIPTION Device Overview Power Stage SiP12107 is a high-efficiency monolithic synchronous buck regulator capable of delivering up to 3 A continuous current. The device has programmable switching frequency up to 4 MHz. The control scheme is based on current-mode constant-on-time architecture, which delivers fast transient response and minimizes external components. Thanks to the internal current ramp information, no high-ESR output bulk or virtual ESR network is required for the loop stability. This device also incorporates Power-Saving feature by enabling diode emulation mode and frequency foldback as load decrease. SiP12107 integrates a high-performance power stage with a ~ 64 m p-channel MOSFET and a ~ 33 m n-channel MOSFET. The MOSFETs are optimized to achieve 95 % efficiency at 2 MHz switching frequency. The power input voltage (VIN) can go up to 5.5 V and down as low as 2.8 V for the power conversion. The logic bias voltage (AVIN) ranges from 2.8 V to 5.5 V. PWM Control Mechanism SiP12107 employs a state-of-the-art current-mode COT control mechanism. During steady-state operation, output voltage is compared with internal reference (0.6 V typ.) and the amplified error signal (VCOMP) is generated on the COMP pin. In the meantime, inductor valley current is sensed, and its slope (Isense) is converted into a voltage signal (Vcurrent) to be compared with VCOMP. Once Vcurrent is lower than VCOMP, a single shot on-time is generated for a fixed time programmed by the external RON. Figure 4 illustrates the basic block diagram for CM-COT architecture and figure 5 demonstrates the basic operational principle: SiP12107 has a full set of protection and monitoring features: - Over current protection in pulse-by-pulse mode - Output over voltage protection - Output under voltage protection with device latch - Over temperature protection with hysteresis - Dedicated enable pin for easy power sequencing - Power Good open drain output This device is available in MLPQ 3 x 3-16L package to deliver high power density and minimize PCB area. RON Bandgap VOUT VOUT Vref HG + OTA VIN - VIN V comp HG ON-TIME Generator Control Logic & MOSFET Driver LG + - + Current Mirror V current Isense I-AMP - PWM COMPARATOR LS FET LG Fig. 4 - CM-COT Block Diagram S12-0412-Rev. B, 20-Feb-12 11 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix Vcurrent vcomp Fixed ON-time PWM Fig. 5 - CM-COT Operational Principle Once on-time is set, the pseudo constant frequency is then determined by the following equation: The following equation illustrates the relationship between on-time, VIN, VOUT and RON value: TON = RON x K x VOUT D VIN 1 ࢌ sw = = = RON x K VOUT TON x RON x K VIN VOUT , where K = 9.6 x 10-12 a constant set internally VIN Loop Stability and Compensator Design Due to the nature of current mode control, a simple RC network (type II compensator) is required between COMP and AGND for loop stability and transient response purpose. General concept of this loop design is to introduce a single zero through the compensator to determine the crossover frequency of overall close loop system. The overall loop can be broken down into following segments. Output feedback divider transfer function Hfb: R fb2 H fb = -----------------------------R fb1 x R fb2 Voltage compensator transfer function GCOMP (s): R O x 1 + sC COMP R COMP G COMP (s) = ------------------------------------------------------------------------- gm 1 + sR O C COMP Modulator transfer function Hmod (s): R load x 1 + sC O R ESR 1 H mod (s) = ----------------------------------- x -------------------------------------------------------------AV 1 x R DS(on) 1 + sC O R load The complete loop transfer function is given by: R fb2 R O x 1 + sC COMP R COMP R load x 1 + sC O R ESR 1 H mod (s) = ------------------------------ x -------------------------------------------------------------------------gm x ----------------------------------- x -------------------------------------------------------------R fb1 x R fb2 1 + sR O C COMP AV 1 x R DS(on) 1 + sC O R load When: CCOMP = Compensation capacitor RDS(on) = LS switch resistance RCOMP = Compensation resistor Rfb1 = Feedback resistor connect to LX gm = Error amplifier transconductance Rfb2 = Feedback resistor connect to ground Rload = Load resistance RO = Output impedance of error amplifier = 20 M CO = Output capacitor AV1 = Voltage to current gain = 3 S12-0412-Rev. B, 20-Feb-12 12 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix Power-Saving Mode Operation To further improve efficiency at light-load condition, SiP12107 provides a set of innovative implementations to eliminate LS recirculating current and switching losses. The internal Zero Crossing Detector (ZCD) monitors LX node voltage to determine when inductor current starts to flow negatively. In power saving mode (PSM), as soon as inductor valley current crosses zero, the device first deploys diode emulation mode by turning off LS FET. If load further decreases, switching frequency is further reduced proportional to load condition to save switching losses while keeping output ripple within tolerance. The switching frequency is set by the controller to maintain regulation. At zero load this frequency can go as low as hundreds of Hz. Whenever fixed frequency PWM operation is required over the entire load span, power saving mode feature can be disabled by connecting AUTO pin to VIN or AVIN. OUTPUT MONITORING AND PROTECTION FEATURES Output Over-Current Protection (OCP) SiP12107 has pulse-by-pulse over-current limit control. The inductor valley current is monitored during LS FET turn-on period through RDS(on) sensing. After a pre-defined time, the valley current is compared with internal threshold (5 A typ.) to determine the threshold for OCP. If monitored current is higher than threshold, HS turn-on pulse is skipped and LS FET is kept on until the valley current returns below OCP limit. In the severe over-current condition, pulse-by-pulse current limit eventually triggers output under-voltage protection (UVP), which latches the device off to prevent catastrophic thermal-related failure. UVP is described in the next section. OCP is enabled immediately after AVIN passes UVLO level. Figure 6 illustrates the OCP operation. OCPthreshold Iload Iinductor GH Skipped GH Pulse Fig. 6 - Over-Current Protection Illustration Output Under-Voltage Protection (UVP) Over-Temperature Protection (OTP) UVP is implemented by monitoring output through VFB pin. Once the voltage level at VFB is below 0.45 V for more than 20 μs, then UVP event is recognized and both HS and LS MOSFETs are turned off. UVP latches the device off until either AVIN or EN is recycled. SiP12017 has internal thermal monitor block that turns off both HS and LS FETs when junction temperature is above 160 °C (typ.). A hysteresis of 30 °C is implemented, so when junction temperature drops below 130 °C, the device restarts by initiating the soft-start sequence again. UVP is only active after the completion of soft-start sequence. Soft Startup SiP12107 deploys an internally regulated soft-start sequence to realize a monotonic startup ramp without any output overshoot. Once AVIN is above UVLO level (2.55 V typ.). Both the reference and VOUT will ramp up slowly to regulation in 1 ms (typ.) with the reference going from 0 V to 0.6 V and VOUT rising monotonically to the programmed output voltage. Output Over-Voltage Protection (OVP) For OVP implementation, output is monitored through FB pin. After soft-start, if the voltage level at FB is above 20 % (typ.), OVP is triggered with HS FET turning off and LS FET turning on immediately to discharge the output. Normal operation is resumed once FB voltage drops back to 0.6 V. During soft-start period, OCP is activated. OVP and short-circuit protection are not active until soft-start is complete. OVP is active immediately after AVIN passes UVLO level. S12-0412-Rev. B, 20-Feb-12 13 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix Pre-bias Startup Power Good (PG) In case of pre-bias startup, output is monitored through FB pin. If the sensed voltage on FB is higher than the internal reference ramp value, control logic prevents HS and LS FET from switching to avoid negative output voltage spike and excessive current sinking through LS FET. SiP12107’s Power Good is an open-drain output. Pull PG pin high up to 5 V through a 10K resistor to use this signal. Power Good window is shown in the below diagram. If voltage level on FB pin is out of this window, PG signal is de-asserted by pulling down to GND. VFB_Rising_Vth_OV (Typ. = 0.725 V) VFB_Falling_Vth_OV (Typ. = 0.675 V) Vref (0.6 V) VFB VFB_Falling_Vth_UV (Typ. = 0.525 V) VFB_Rising_Vth_UV (Typ. = 0.575 V) Pull-high PG Pull-low Fig. 7 - PG Window and Timing Diagram DESIGN PROCEDURE The design process of the SiP12107 is quite straight forward. Only few passive components such as output capacitors, inductor and Ron resistor need to be selected. Setting Switching Frequency Selection of the switching frequency requires making a trade-off between the size and cost of the external filter components (inductor and output capacitor) and the power conversion efficiency. The desired switching frequency, 1 MHz was chosen based on optimizing efficiency while maintaining a small footprint and minimizing component cost. The following paragraph describes the selection procedure for these peripheral components for a given operating conditions. In the next example the following definitions apply: VINmax.: the highest specified input voltage In order to set the design for 1 MHz switching frequency, (RON) resistor which determines the on-time (indirectly setting the frequency) needs to be calculated using the following equation. VINmin.: the minimum effective input voltage subject to voltage drops due to connectors, fuses, switches, and PCB traces There are two values of load current to evaluate - continuous load current and peak load current. 1 1 - 105 k R ON = ---------------------- = ------------------------------------------------------6 -12 F SW x K 1 x 10 x 9.6 x 10 Continuous load current relates to thermal stress considerations which drive the selection of the inductor and input capacitors. Peak load current determines instantaneous component stresses and filtering requirements such as inductor saturation, output capacitors, and design of the current limit circuit. The following specifications are used in this design: • VIN = 3.3 V ± 10 % • VOUT = 1.2 V ± 1 % • FSW = 1 MHz • Load = 3 A maximum S12-0412-Rev. B, 20-Feb-12 14 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix INDUCTOR SELECTION Assuming a peak voltage VPEAK of 1.3 V (100 mV rise upon load release), and a 3 A load release, the required capacitance is shown by the next equation. In order to determine the inductance, the ripple current must first be defined. Cost, PCB size, output ripple, and efficiency are all used in the selection process. Low inductor values result in smaller size and allow faster transient performance but create higher ripple current which can reduce efficiency. Higher inductor values will reduce the ripple current while compromising the efficiency (higher DCR) and transient response. COUTmin. = 1 μH x (3 A + 0.5 x (81 A))2 = 46.37 μF (1.3 V)2 - (1.2 V)2 If the load release is relatively slow, the output capacitance can be reduced. Using MLCC ceramic capacitors we will use 3 x 22 μF or 66 μF as the total output capacitance. The ripple current will also set the boundary for power-save operation. The switcher will typically enter power-save mode when the load current decreases to 1/2 of the ripple current. For example, if ripple current is 1 A then power-save operation will typically start at loads approaching 0.5 A. Alternatively, if ripple current is set at 40 % of maximum load current, then power-save will start for loads less than ~ 20 % of maximum current. STABILITY CONSIDERATIONS Using the output capacitance as a starting point for compensation values. Then, taking Bode plots and transient response measurements we can fine tune the compensation values. Setting the ripple current 20 % to 50 % of the maximum load current provides an optimal trade-off of the areas mentioned above. Setting the crossover frequency to 1/5 of the switching frequency: F0 = Fsw/5 = 1 MHz/5 = 200 kHz Setting the compensation zero at 1/5 to 1/10 the crossover frequency for the phase boost: The equation for determining inductance is shown next. Example In this example, the inductor ripple current is set equal to 30 % of the maximum load current. Thus ripple current will be 30 % x 3 A or 0.9 A. To find the minimum inductance needed, use the VIN and TON values that correspond to VINmax. T ON L = V IN - V OUT x ---------i FZ = F 1 = 0 2π x RC x CC 5 Setting CC = 1 nF and solve for RC RC = 5 2π x CC x F0 = 5 = 4K 2π x 1 nF x 200K Plugging numbers into the above equation we get SWITCHING FREQUENCY VARIATIONS -9 330 x 10 s L = 3.63 V - 1.2 V x -------------------------------- = 0.891 μH 0.9 A The switching frequency variation in COT can be mainly attributed to the increase in conduction losses as the load increases. The on time is “ideally constant” so the controller must account for losses by reducing the off time which increases the overall duty cycle. Hence the FSW will tend to increase with load. A slightly larger value of 1 μH is selected which is a standard value. This will decrease the maximum ripple current by 10 %. Note that the inductor must be rated for the maximum DC load current plus 1/2 of the ripple current. The actual ripple current using the chosen 1 μH inductor comes out to be. In power save mode (PSM) the IC will run in pulse skip mode at light loads. As the load increases the FSW will increase until it reaches the nominal set FSW. This transition occurs approximately when the load reaches to 20 % of the full load current. 330 ns i = 3.63 V - 1.2 V x ------------------ = 0.8 A 1 μH Output Capacitance Calculation The output capacitance is usually chosen to meet transient requirements. A worst-case load release, from maximum load to no load at the exact moment when inductor current is at the peak, determines the required capacitance. If the load release is instantaneous (load changes from maximum to zero in < 1/FSW μs), the output capacitor must absorb all the inductor’s stored energy. This will approximately cause a peak voltage on the capacitor according to the following equation. 2 1 L x I OUT + --- x I RIPPLEmax. 2 C OUTmin. = -----------------------------------------------------------------------2 2 V peak - V OUT S12-0412-Rev. B, 20-Feb-12 15 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix Fig. 8 - Reference Board Schematic S12-0412-Rev. B, 20-Feb-12 16 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix BILL OF MATERIALS ITEM QTY. REFERENCE PART VOLTAGE PCB FOOTPRINT PART NUMBER MANUFACTURER 1 4 C1, C2, C3, C4 22 μF 16 V SM/C_1210 GRM32ER71C226ME18L Murata 2 1 C5 DNP 50 V SM/C_0603 - - 3 2 C7, C13 220 μF 25 V 594D-R TYPE 594D227X0016R2T Vishay 4 3 C8, C19, C21 0.1 μF 50 V SM/C_0603 VJ0603Y104KXACW1BC Vishay 5 3 C9, C10, C11 22 μF 6.3 V SM/C_1210 GCM32ER70J476KE19L Murata 6 3 C12, C29, C30 DNP 6.3 V SM/C_1210 - - 7 2 C14, C20 10 μF 16 V SM/C_1206 C1206C106K4RACTU Taiyo Yuden 8 1 C15 0.1 μF 50 V SM/C_0402 VJ0603Y104KXACW1BC Vishay 9 1 C16 68 pF 50 V SM/C_0603 VJ0402A680JNAAJ Vishay 10 1 C17 0.1 μF 50 V SM/C_0402 VJ0402Y104KXACW1BC Vishay 11 1 C18 68 pF 50 V SM/C_0402 VJ0402A680JNAAJ Vishay 12 1 C23 2.2 μF 10 V SM/C_0603 GRM188R71A225KE15D Murata 13 1 C26 DNP 50 V SM/C_0402 - - 14 1 C27 1 nF 50 V SM/C_0402 VJ0402Y102KXACW1BC Vishay 29 1 L1 1μH - IHLP2525 IHLP2525DZER1R0M01 Vishay 30 1 Q1 - 30 V SO-8 Si4812BDY Vishay 31 1 R1 3R01 200 V C_2512 CRCW25123R01FKTA Vishay 32 4 R2, R3, R5, R9 100K 50 V SM/C_0603 CRCW0603100KFKEA Vishay 33 1 R6 100 50 V SM/C_0402 TNPW0402100RBEED Vishay 34 1 R7 5K11 50 V SM/C_0603 CRCW06035K11FKEA Vishay 35 1 R8 0R 50 V SM/C_0402 CRCW04020000FKTA Vishay 36 1 R10 5K11 - SM/C_0603 CRCW06035K11FKEA - 37 1 R11 100 50 V SM/C_0603 TNPW0402100RBEED Vishay 38 1 R12 10K 50 V SM/C_0603 CRCW060310K0FKEA Vishay 39 1 R14 100K 50 V SM/C_0603 CRCW0603100KFKEA Vishay Vishay 40 1 R42 2K 50 V SM/C_0603 CRCW06032K00FKEA 41 1 R43 DNP - SM/C_0805 - 42 1 R44 0R 50 V SM/C_0603 CRCW06030000Z0EA 43 1 R45 0R 50 V SM/C_0402 CRCW04020000FKTA Vishay 44 1 U1 - - QFN3X3_16 L SiP12107 Vishay 45 1 J1 VIN PROBE PIN PK007-015 Lecroy 46 1 J2 LX PROBE PIN PK007-015 Lecroy 47 1 J3 VIN Power connector 575-6 Keystone 48 1 J4 VOUT Power connector 575-6 Keystone 49 1 J5 VOUT PROBE PIN PK007-015 Lecroy 50 1 J6 VIN_GND Power connector 575-6 Keystone Vishay 51 1 J7 VO_GND Power connector 575-6 Keystone 52 1 J8 EN Control PIN 1573-3 Keystone 53 1 J9 MODE Control PIN 1573-3 Keystone 54 1 J10 PGD Probe PIN 1573-3 Keystone Keystone 55 1 J11 Step_I_Sense Probe PIN 1573-3 56 1 J12 LDT SMA test connector PK007-015 Lecroy 57 1 J13 CH2 Test point 1573-3 Keystone 58 1 J14 CH1 Test point 1573-3 Keystone S12-0412-Rev. B, 20-Feb-12 17 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP12107 www.vishay.com Vishay Siliconix PCB LAYOUT OF REFERENCE BOARD Fig. 9 - Top Layer Fig. 11 - Bottom Layer Fig. 10 - Inner Layer1 Fig. 12 - Inner Layer2 Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?63395. S12-0412-Rev. B, 20-Feb-12 18 Document Number: 63395 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000