CSPPT CALIFORNIA MICRO DEVICES Chip Scale Parallel Termination Array Features Applications • 8,16 or 32 integrated high frequency bussed terminations • Parallel resistive bus termination • Bussed resistor array • Ultra small footprint Chip Scale Package • Ceramic substrate • 0.35mm Eutectic Solder Bumps, 0.65mm pitch Product Description The Chip Scale Package provides an ultra small footprint for this IPD and provides minimal parasitics compared to conventional packaging. Typical bump inductance is less than 25pH. The large solder bumps and ceramic substrate allow for standard attachment to laminate printed circuit boards without the use of underfill. The CSPPT is a high performance Integrated Passive Device (IPD) which provides parallel terminations suitable for use in high speed bus applications. Eight (8), sixteen (16), or thirty-two (32) parallel termination versions are provided. These resistors provide excellent high frequency performance in excess of 3GHz and are manufactured to an absolute tolerance as low as ±1%. SCHEMATIC DIAGRAMS B R1 R1 R1 R1 R1 R1 R1 R1 A 1 2 3 4 5 CSPPT08 D D R1 R1 R1 R1 R1 R1 R1 R1 C R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 C B B R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 A R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 R1 A 1 2 3 4 5 1 2 3 CSPPT16 4 5 6 7 215 Topaz Street, Milpitas, California 95035 8 9 10 CSPPT32 C1290700 © 2000 California Micro Devices Corp. All rights reserved. 11/10/2000 R1 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 1 CSPPT CALIFORNIA MICRO DEVICES S TA N D A R D VA L U E S Re s i s t o r Va l u e R1 = 47Ω, 50Ω, 56Ω, 6 8 Ω, 90Ω, 100Ω, Ab s o l u t e To l e ra n c e R ± 1 %, ± 5 % TCR of Resi st or s ±100ppm Powe r Ra t i n g / Re s i s t o r 1 0 0 mW Op e ra t i n g Te mp e ra t u r e Ra n g e –40°C to 85°C Package Diagram (Bumps Up View) 3.0468mm 0.65 mm 0.2234mm 0.65 mm B 1.0968mm A 0.35mm Dia. Bumps 1 2 3 4 5 0.381mm 0.643mm CSPPT08 3.0468mm 0.65 mm 0.2234mm D 0.65 mm C 2.3968mm B A 0.35mm Dia. Bumps 1 2 3 4 5 0.381mm 0.643mm CSPPT16 6.2968mm 0.65 mm 0.2234mm D 0.65 mm C 2.3968mm B A 0.35mm Dia. Bumps 1 2 3 4 5 6 7 8 9 10 0.381mm 0.643mm CSPPT32 ©2000 California Micro Devices Corp. All rights reserved. 2 215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 11/10/2000 CSPPT CALIFORNIA MICRO DEVICES P R I N T E D C I R C U I T B OA R D R E C O M M E N D AT I O N S Pad Size on PCB Pad Shape Pad Definition Solder Mask Opening Solder Stencil Thickness Solder Stencil Aperture Opening Solder Flux Ratio Solder Paste Bond Trace Finish 0.300mm Round Non Solder Mask Defined Pads (NSMD) 0.350mm 0.152mm 0.360mm (sq.) 50/50 No Clean OSP (Entek Cu Plus 106A) Typical Solder Reflow Thermal Profile (No Clean Flux) 250 EXH 225 PH Z2 Z3 48 97 145 Z4 Z5 CD RF EXH Temperature (oC) 200 175 150 125 100 75 50 25 0 194 242 290 339 387 435 Time (s) PART NUMBER KEY CSP PACKAGE TYPE APPLICATION CSP = Chip Scale Package Parallel Termination PT YY XXX T Number of Terminations Resistor Value Code 08 = 8 16 = 16 32 = 32 R1 Value First 2 digits are significant value. 3rd digit represents number of zeros Tolerance F = ±1% J = ±5% © 2000 California Micro Devices Corp. All rights reserved. 11/10/2000 215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 3 CSPPT CALIFORNIA MICRO DEVICES S TA N D A R D PA R T O R D E R I N G I N F O R M AT I O N Package Style Ordering Part Number Terminations Tape & Reel Part Marking Chip Scale 8 CSPPT08-470F None Chip Scale 8 CSPPT08-470J None Chip Scale 8 CSPPT08-500F None Chip Scale 8 CSPPT08-500J None Chip Scale 8 CSPPT08-560F None Chip Scale 8 CSPPT08-560J None Chip Scale 8 CSPPT08-680F None Chip Scale 8 CSPPT08-680J None Chip Scale 8 CSPPT08-900F None Chip Scale 8 CSPPT08-900J None Chip Scale 8 CSPPT08-101F None Chip Scale 8 CSPPT08-101J None Chip Scale 16 CSPPT16-470F None Chip Scale 16 CSPPT16-470J None None Chip Scale 16 CSPPT16-500F Chip Scale 16 CSPPT16-500J None Chip Scale 16 CSPPT16-560F None Chip Scale 16 CSPPT16-560J None Chip Scale 16 CSPPT16-680F None Chip Scale 16 CSPPT16-680J None Chip Scale 16 CSPPT16-900F None Chip Scale 16 CSPPT16-900J None Chip Scale 16 CSPPT16-101F None Chip Scale 16 CSPPT16-101J None Chip Scale 32 CSPPT32-470F None Chip Scale 32 CSPPT32-470J None Chip Scale 32 CSPPT32-500F None Chip Scale 32 CSPPT32-500J None None Chip Scale 32 CSPPT32-560F Chip Scale 32 CSPPT32-560J None Chip Scale 32 CSPPT32-680F None Chip Scale 32 CSPPT32-680J None Chip Scale 32 CSPPT32-900F None Chip Scale 32 CSPPT32-900J None Chip Scale 32 CSPPT32-101F None Chip Scale 32 CSPPT32-101J None PA C K AG E N O N - S TA N D A R D PA R T O R D E R I N G I N F O R M AT I O N Part Series Terminations Value Code: R1 (XXX) Tolerance Example (CSPPT) CSPPT CSPPT CSPPT (8) 8 16 32 (201) (J) First 2 digits are significant value. Third digit represents number of zeros to follow F = ±1% J = ±5% ©2000 California Micro Devices Corp. All rights reserved. 4 215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 11/10/2000