ETC CY7C286-70WC

CY7C286
64K x 8 Reprogrammable PROM
Features
in the active mode and 40 mA in the standby mode. Access
time is 45 ns.
• CMOS for optimum speed/power
• Windowed for reprogrammability
• High speed
— tAA = 45 ns
• Low power
— 120 mA active
The CY7C286 is available in a cerDIP package equipped with
an erasure window to provide reprogrammability. When exposed to UV light, the PROM is erased and can be reprogrammed. The memory cells utilize proven EPROM floating-gate technology and byte-wide intelligent programming
algorithms.
Functional Description
The CY7C286 offers the advantage of low power, superior performance, and programming yield. The EPROM cell requires
only 12.5V for the supervoltage and low current requirements
allow for gang programming. The EPROM cells allow for each
memory location to be 100% tested with each cell being programmed, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that the product will meet DC and AC specification
limits after customer programming.
The CY7C286 is a high-performance 64K x 8 CMOS PROM.
The CY7C286 is configured in the JEDEC-standard 512K
EPROM pinout and is available in a 28-pin, 600-mil package
and a 32-pin PLCC package. Power consumption is 120 mA
Reading the CY7C286 is accomplished by placing active LOW
signals on the OE and CE pins. The contents of the memory
location addressed by the address lines (A 0 – A15) will become
available on the output lines (O0 – O 7).
•
•
•
•
— 40 mA standby
EPROM technology, 100%programmable
5V ±10% VCC, commercial and military
TTL-compatible I/O
Capable of withstanding >2001V static discharge
Logic Block Diagram
Pin Configurations
DIP
Top View
A15
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
O7
A14
X
A13
A12
ROW
ADDRESS
A11
512 x 1024
PROGRAMMABLE
ARRAY
O6
8 x 1 of 128
MULTIPLEXER
O5
A10
A9
A8
O4
ADDRESS
DECODER
A7
O3
A6
A5
A3
O2
COLUMN
ADDRESS
28
27
26
14
15
25
24
23
22
21
20
19
18
17
16
VCC
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
C286–2
Y
LCC/PLCC
Top View
O1
A7
A12
A15
NC
VCC
A14
A13
A4
1
2
3
4
5
6 7C286
7
8
9
10
11
12
13
A2
A1
O0
A0
A6
A5
A4
A3
A2
A1
A0
NC
O0
POWER-DOWN
CE
OE
O1
O2
GND
NC
O3
O4
O5
C286–1
4 3 2 1 32 31 30
29
5
28
6
7C286
27
7
26
8
25
9
24
10
23
11
22
12
21
13
14151617 181920
A8
A9
A11
NC
OE
A10
CE
O7
O6
C286–3
For a 64K x 8 PROM with registered outputs, see the CY7C287.
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134 •
408-943-2600
November 1988 - Revised August 1994
CY7C286
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Com’l
Mil
Com’l
Mil
7C286–45
45
120
7C286–50
50
120
40
40
7C286–60
60
120
150
40
50
7C286–70
70
90
120
30
40
7C286–80
80
120
40
Maximum Ratings
UV Exposure ................................................ 7258 Wsec/cm 2
(Above which the useful life may be impaired. For user guidelines, not tested.)
Static Discharge Voltage ........................................... >2001V
(per MIL–STD–883, Method 3015.2)
Storage Temperature .................................–65 °C to +150°C
Latch-Up Current..................................................... >200 mA
Ambient Temperature with
Power Applied .............................................–55°C to +125°C
Operating Range
Range
Ambient
Temperature
VCC
Commercial
0°C to +70°C
5V ± 10%
Industrial[1]
–40°C to +85°C
5V ± 10%
Military[2]
–55°C to +125°C
5V ± 10%
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State ............................................... –0.5V to +7.0V
DC Input Voltage............................................ –3.0V to +7.0V
DC Program Voltage .....................................................13.0V
Electrical Characteristics Over the Operating Range[3, 4]
7C286–45, 50
Parameter
Description
Test Conditions
Min.
Max.
7C286–70, 80
Min.
2.4
2.4
VOH
Output HIGH Voltage
VCC = Min., IOH = –2.0 mA
VOL
Output LOW Voltage
VCC = Min., IOL = 8.0 mA Com’l
VIH
Input HIGH Voltage
Guaranteed Input Logical HIGH
Voltage for Inputs
VIL
Input LOW Voltage
Guaranteed Input Logical LOW
Voltage for Inputs
IIX
Input Load Current
GND < VIN < VCC
VCD
Input Diode Clamp Voltage
IOZ
Output Leakage Current
GND < VOUT < VCC,
Output Disabled
–40
+40
–40
IOS
Output Short Circuit
Current
VCC = Max., VOUT = GND[5]
–20
–90
–20
ICC
VCC Operating
Supply Current
VCC = Max.,
IOUT = 0 mA
Com’l
ISB
Standby Supply Current
VCC = Max., CE = HIGH
Com’l
VPP
Programming Supply
Voltage
IPP
Programming Supply
Current
VIHP
Input HIGH Programming
Voltage
VILP
Input LOW Programming
Voltage
VCC = Min., IOL = 6.0 mA
2.4
7C286–60
Min. Max.
0.4
0.4
Mil
VCC
2.0
0.8
–10
+10
VCC
V
0.4
2.0
VCC
V
0.8
V
–10
+10
µA
+40
–40
+40
µA
–90
–20
–90
mA
120
90
mA
150
120
40
30
0.8
–10
Unit
V
0.4
0.4
2.0
Max.
+10
Note 4
120
Mil
40
Mil
50
12
13
12
50
3.0
40
12
50
3.0
0.4
2
13
13
V
50
mA
3.0
0.4
mA
V
0.4
V
CY7C286
Electrical Characteristics Over the Operating Range[3, 4]
7C286–45, 50
Parameter
Description
Test Conditions
Min.
Max.
7C286–60
Min. Max.
7C286–70, 80
Min.
Max.
Unit
Notes:
1. Contact a Cypress representative for industrial temperature range specifications.
2. TA is the “instant on” case temperature.
3. See the last page of this specification for Group A subgroup testing information.
4. See Introduction to CMOS PROMs for general information on testing.
5. Short circuit test should not exceed 30 seconds.
Capacitance[4]
Parameter
Description
CIN
Input Capacitance
COUT
Output Capacitance
Test Conditions
Max.
Unit
10
pF
10
pF
TA = 25°C, f = 1 MHz,
VCC = 5.0V
AC Test Loads and Waveform[4]
R1 500Ω
(658Ω MIL)
R1 500Ω
(658Ω MIL)
5V
5V
ALL INPUT PULSES
3.0V
OUTPUT
OUTPUT
R2
333 Ω
(403 Ω MIL)
30 pF
INCLUDING
JIG AND
SCOPE
C286–4
INCLUDING
JIG AND
SCOPE
(a) NormalLoad
Equivalent to:
R2
333 Ω
(403Ω MIL)
5 pF
90%
10%
90%
10%
GND
≤ 5 ns
≤ 5 ns
C286–6
C286–5
(b) High Z Load
THÉVENIN EQUIVALENT
OUTPUT
200Ω
2.0V
250Ω
OUTPUT
1.9V
Military
Commercial
C286–7
Switching Characteristics Over the Operating Range[3,4 ]
7C286–45
Parameter
Description
Min.
Max.
7C286–50
Min.
Max.
7C286–60
Min.
Max.
7C286–70
7C286–80
Min.
Min.
Max.
Max. Unit
tAA
Address Access Time
45
50
60
70
80
ns
tCE
Output Valid from CE
45
50
60
70
80
ns
tOE
Output Valid from OE
15
18
20
25
25
ns
tDF
Output Three-State from CE/OE
15
18
20
25
25
ns
tPU
Chip Enable to Power-Up
tPD
Chip Disable to Power-Down
0
0
40
0
40
3
0
50
0
60
ns
60
ns
CY7C286
Switching Waveform
CE
tDF
tCE
tDF
tOE
OE
VALID
VALID
O0 – O7
HIGH Z
tAA
A0 –A15
C286–8
Erasure Characteristics
be within 1 inch of the lamp during erasure. Permanent damage may result if the PROM is exposed to high-intensity UV
light for an extended period of time. 7258 Wsec/cm2 is the
recommended maximum dosage.
Wavelengths of light less than 4000 Angstroms begin to erase
the 7C286 in the windowed package. For this reason, an
opaque label should be placed over the window if the PROM
is exposed to sunlight or fluorescent lighting for extended periods of time.
Programming Modes
Programming support is available from Cypress as well as
from a number of third-party software vendors. For detailed
programming information, including a listing of software packages, please see the PROM Programming Information located
at the end of this section. Programming algorithms can be obtained from any Cypress representative.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV intensity multiplied by exposure time) of 25 Wsec/cm 2. For an ultraviolet lamp with a 12 mW/cm2 power rating, the exposure time
would be approximately 35 minutes. The CY7C286 needs to
Table 1. CY7C286 Mode Selection.
Pin[6]
PGM
LATCH
VFY
VPP
D0 – D7
A10
A11
CE
OE
O 7 – O0
Read
A10
A11
VIL
VIL
O7 – O0
Output Disable
A10
A11
X
VIH
High Z
Output Disable & Power Down
A10
A11
VIH
X
High Z
PGM
LATCH
VFY
VPP
D7 – D0
Program
VILP
VILP
VIHP
VPP
D7 – D0
Program Verify
VIHP
VILP
VILP
VPP
O7 – O0
Program Inhibit
VIHP
VILP
VIHP
VPP
High Z
Blank Check
VIHP
VILP
VILP
VPP
Zeros
Mode: Read or Output Disable
Mode: Other
Note:
6. X can be VIL or VIH.
4
CY7C286
GND
28
27
26
14
15
25
24
23
22
21
20
19
18
17
16
VCC
A14
A13
A8 /A11
A9 /A10
LATCH
VPP
PGM
VFY
D7
D6
D5
D4
D3
C286–9
A6
A5
A4
A3
A2
A1
A0
NC
D0
4 3 2 1 32 31 30
29
5
28
6
7C286
27
7
26
8
25
9
24
10
23
11
22
12
21
13
14151617 181920
GND
NC
D3
D4
D5
1
2
3
4
5
6 7C286
7
8
9
10
11
12
13
D1
D2
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
LCC/PLCC
A7
A 12
A 15
NC
VCC
A 14
A 13
DIP
A8 /A11
A9 /A10
LATCH
NC
VPP
PGM
VFY
D7
D6
C286–10
Figure 1. Programming Pinouts.
Ordering Information[7]
Speed
(ns)
45
50
60
70
80
Ordering Code
CY7C286–45JC
Package
Name
Package Type
J65
32-Lead Plastic Leaded Chip Carrier
CY7C286–45PC
P15
28-Lead (600-Mil) Molded DIP
CY7C286–45WC
W16
28-Lead (600-Mil) Windowed CerDIP
CY7C286–50JC
J65
32-Lead Plastic Leaded Chip Carrier
CY7C286–50PC
P15
28-Lead (600-Mil) Molded DIP
CY7C286–50WC
W16
28-Lead (600-Mil) Windowed CerDIP
CY7C286–60JC
J65
32-Lead Plastic Leaded Chip Carrier
CY7C286–60PC
P15
28-Lead (600-Mil) Molded DIP
CY7C286–60WC
W16
28-Lead (600-Mil) Windowed CerDIP
CY7C286–60DMB
D16
28-Lead (600-Mil) CerDIP
CY7C286–60LMB
L55
32-Pin Rectangular Leadless Chip Carrier
CY7C286–60QMB
Q55
32-Pin Windowed Rectangular Leadless Chip Carrier
CY7C286–60WMB
W16
28-Lead (600-Mil) Windowed CerDIP
CY7C286–70JC
J65
32-Lead Plastic Leaded Chip Carrier
CY7C286–70PC
P15
28-Lead (600-Mil) Molded DIP
CY7C286–70WC
W16
28-Lead (600-Mil) Windowed CerDIP
CY7C286–70DMB
D16
28-Lead (600-Mil) CerDIP
CY7C286–70LMB
L55
32-Pin Rectangular Leadless Chip Carrier
CY7C286–70QMB
Q55
32-Pin Windowed Rectangular Leadless Chip Carrier
CY7C286–70WMB
W16
28-Lead (600-Mil) Windowed CerDIP
CY7C286–80WMB
W16
28-Lead (600-Mil) Windowed CerDIP
CY7C286–80QMB
Q55
32-Pin Windowed Rectangular Leadless Chip Carrier
Operating
Range
Commercial
Commercial
Commercial
Military
Commercial
Military
Military
Notes:
7. Most of these products are available in industrial temperature range. Contact a Cypress representative for specifications and product availability.
5
CY7C286
MILITARY SPECIFICATIONS
Group A Subgroup Testing
DC Characteristics
Switching Characteristics
Parameter
Subgroups
Parameter
Subgroups
VOH
1, 2, 3
tAA
7, 8, 9, 10, 11
VOL
1, 2, 3
tCE
7, 8, 9, 10, 11
VIH
1, 2, 3
tOE
7, 8, 9, 10, 11
VIL
1, 2, 3
IIX
1, 2, 3
IOZ
1, 2, 3
ICC
1, 2, 3
ISB
1, 2, 3
Document #: 38–00103–H
Package Diagrams
28-Lead (600-Mil) CerDIP D16
MIL–STD–1835
32-Lead Plastic Leaded Chip Carrier J65
D–10 Config.A
6
CY7C286
Package Diagrams (Continued)
32-Pin Rectangular Leadless Chip Carrier L55
32-Pin Windowed Rectangular Leadless Chip Carrier Q55
MIL–STD–1835 C–12
MIL–STD–1835 C–12
28-Lead (600-Mil) Molded DIP P15
© Cypress Semiconductor Corporation, 1994. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
CY7C286
Package Diagrams (Continued)
28-Lead (600-Mil) Windowed CerDIP W16
MIL–STD–1835
D–10 Config.A
8