STMicroelectronics D50N03L N-channel 30v - 9.2mohm - 40a - dpak/ipak stripfet tm iii power mosfet Datasheet

STD50N03L
STD50N03L-1
N-CHANNEL 30V - 9.2mΩ - 40A - DPAK/IPAK
STripFET™ III Power MOSFET
General features
Type
VDSS
RDS(on)
ID
STD50N03L
STD50N03L-1
30V
30V
10.5mΩ
10.5mΩ
40A
40A
3
■
RDS(on)*Qg industry’s benchmark
■
Conduction losses reduced
■
Switching losses reduced
■
Low threshold device
3
2
1
1
IPAK
DPAK
Description
This product utilizes the latest advanced design
rules of ST’s proprietary STripFET™ technology.
This is suitable for the most demanding DC-DC
converter application where high efficiency is to
be achieved.
Internal schematic diagram
Applications
■
Switching applications
Order codes
Part number
Marking
Package
Packaging
STD50N03L
D50N03L
DPAK
Tape & reel
STD50N03L-1
D50N03L
IPAK
Tube
October 2006
Rev 2
1/16
www.st.com
16
Contents
STD50N03L - STD50N03L-1
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................. 6
3
Test circuit
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16
................................................ 8
STD50N03L - STD50N03L-1
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage (VGS = 0)
30
V
VGS
Gate-source voltage
±20
V
Drain current (continuous) at TC = 25°C
40
A
Drain current (continuous) at TC=100°C
36
A
Drain current (pulsed)
160
A
Total dissipation at TC = 25°C
60
W
Derating factor
0.4
W/°C
EAS(3)
Single pulse avalanche energy
230
mJ
TJ
Operating junction temperature
Storage temperature
-55 to 175
°C
ID
(1)
ID
IDM
(2)
PTOT
Tstg
1. Limited by wire bonding
2. Pulse width limited by safe operating area
3.
Starting Tj = 25°C, ID =20A, VDD =15V
Table 2.
Symbol
Thermal data
Parameter
Value
Unit
RthJ-Case
Thermal resistance junction-case max
2.5
°C/W
RthJ-Amb
Thermal resistance junction-ambient max
100
°C/W
Tj
Maximum lead temperature for soldering
purpose
275
°C
3/16
Electrical characteristics
2
STD50N03L - STD50N03L-1
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 3.
Symbol
V(BR)DSS
On/off states
Parameter
Drain-source breakdown
voltage
Test conditions
ID = 250µA, VGS= 0
Zero gate voltage drain
current (VGS = 0)
IGSS
Gate body leakage current
(VDS = 0)
VGS = ±20V
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250µA
RDS(on)
Static drain-source on
resistance
VGS= 10V, ID= 20A
Symbol
Ciss
Coss
Crss
Qg
Qgs
Qgd
QOSS (1)
RG
Max.
30
1
10
µA
µA
±100
nA
1
VGS= 5V, ID= 20A
Unit
V
VDS = 30V, Tc=125°C
V
9.2
0.012
10.5
0.019
mΩ
Ω
Typ.
Max.
Unit
Dynamic
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Test conditions
VDS =25V, f=1MHz,
VGS=0
Min.
1434
294
48
pF
pF
pF
Total gate charge
Gate-source charge
Gate-drain charge
VDD= 15V, ID = 40A
(see Figure 13)
10.4
5.1
3.7
Output charge
VDS = 24V ; VGS =0
12.6
nC
Gate input resistance
f=1MHz Gate Bias
Bias=0 Test signal
Level=20mV
open drain
1.1
Ω
VGS = 5V
1. QOSS=COSS*D Vin; COSS= Cgd + Cgd. See Appendix A
4/16
Typ.
VDS = 30V
IDSS
Table 4.
Min.
14
nC
nC
nC
STD50N03L - STD50N03L-1
Electrical characteristics
Table 5.
Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Table 6.
Symbol
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD=15V, ID= 25A,
RG= 4.7Ω, VGS= 4.5V
(see Figure 12)
VDD= 15V, ID= 25A,
RG= 4.7Ω, VGS= 4.5V
(see Figure 12)
Parameter
Test conditions
ISDM(1)
VSD(2)
Forward on voltage
ISD= 20A, VGS=0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 40A, di/dt = 100A/µs,
VDD= 10 V, Tj = 25°C
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 40A, di/dt = 100A/µs,
VDD= 10V, Tj= 150°C
trr
Qrr
IRRM
trr
Qrr
IRRM
Typ.
Max.
Unit
15
125
ns
ns
14
45
ns
ns
Source drain diode
Source-drain current
Source-drain current
(pulsed)
ISD
Min.
(see Figure 17)
(see Figure 17)
Min.
Typ.
Max.
Unit
40
160
A
A
1.3
V
26
15.6
1.2
ns
nC
A
26.4
18.1
1.4
ns
nC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
5/16
Electrical characteristics
STD50N03L - STD50N03L-1
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
Figure 5.
Normalized BVDSS vs temperature
Figure 6.
Static drain-source on resistance
6/16
STD50N03L - STD50N03L-1
Electrical characteristics
Figure 7.
Gate charge vs gate-source voltage Figure 8.
Figure 9.
Normalized gate threshold voltage
vs temperature
Capacitance variations
Figure 10. Normalized on resistance vs
temperature
Figure 11. Source-drain diode forward
characteristics
7/16
Test circuit
3
STD50N03L - STD50N03L-1
Test circuit
Figure 12. Switching times test circuit for
resistive load
Figure 13. Gate charge test circuit
Figure 14. Test circuit for inductive load
Figure 15. Unclamped Inductive load test
switching and diode recovery times
circuit
Figure 16. Unclamped inductive waveform
8/16
Figure 17. Switching time waveform
STD50N03L - STD50N03L-1
Appendix A
Buck converter
Buck converter
Figure 18. Power losses estimation
The power losses associated with the FETs in a Synchronous Buck converter can be
estimated using the equations shown in the table below. The formulas give a good
approximation, for the sake of performance comparison, of how different pairs of devices
affect the converter efficiency. However a very important parameter, the working
temperature, is not considered. The real device behavior is really dependent on how the
heat generated inside the devices is removed to allow for a safer working junction
temperature.
The low side (SW2) device requires:
■
Very low RDS(on) to reduce conduction losses
■
Small Qgls to reduce the gate charge losses
■
Small Coss to reduce losses due to output capacitance
■
Small Qrr to reduce losses on SW1 during its turn-on
■
The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source
■
voltage to avoid the cross conduction phenomenon;
The high side (SW1) device requires:
■
Small Rg and Ls to allow higher gate current peak and to limit the voltage feedback on the
gate
■
Small Qg to have a faster commutation and to reduce gate charge losses
Low RDS(on) to reduce the conduction losses.
9/16
Buck converter
STD50N03L - STD50N03L-1
Table 7.
Power losses
High side switching (SW1)
Low side switch (SW2)
R DS(on)SW1 * I 2L * δ
R DS(on)SW2 * I 2L * (1 − δ )
Pconduction
Vin * (Q gsth(SW1) + Q gd(SW1) ) * f *
Pswitching
Recovery
(1)
Not applicable
Conduction
Not applicable
IL
Ig
Zero Voltage Switching
Vin * Q rr(SW2) * f
Pdiode
Pgate(QG)
PQoss
Vf(SW2) * I L * t deadtime * f
Q g(SW1) * Vgg * f
Q gls(SW2) * Vgg * f
Vin * Q oss(SW1) * f
Vin * Q oss(SW2) * f
2
2
1. Dissipated by SW1 during turn-on
Table 8.
Paramiters meaning
Parameter
d
10/16
Meaning
Duty-cycle
Qgsth
Post threshold gate charge
Qgls
Third quadrant gate charge
Pconduction
On state losses
Pswitching
On-off transition losses
Pdiode
Conduction and reverse recovery diode losses
Pgate
Gate drive losses
PQoss
Output capacitance losses
STD50N03L - STD50N03L-1
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at : www.st.com
11/16
Package mechanical data
STD50N03L - STD50N03L-1
TO-251 (IPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.2
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A3
0.7
1.3
0.027
0.051
B
0.64
0.9
0.025
0.031
B2
5.2
5.4
0.204
0.212
B3
0.85
B5
0.033
0.3
0.012
B6
0.95
C
0.45
C2
0.48
D
6
E
6.4
6.6
0.037
0.6
0.017
0.023
0.6
0.019
0.023
6.2
0.236
0.244
0.252
0.260
G
4.4
4.6
0.173
0.181
H
15.9
16.3
0.626
0.641
L
9
9.4
0.354
0.370
L1
0.8
1.2
0.031
0.047
L2
0.8
1
0.031
0.039
A1
C2
A3
A
C
H
B
B3
=
1
=
2
G
=
=
=
E
B2
=
3
B5
L
D
B6
L2
L1
0068771-E
12/16
STD50N03L - STD50N03L-1
Package mechanical data
DPAK MECHANICAL DATA
mm.
inch
DIM.
MAX.
MIN.
A
A1
A2
B
b4
MIN.
2.2
0.9
0.03
0.64
5.2
TYP
2.4
1.1
0.23
0.9
5.4
0.086
0.035
0.001
0.025
0.204
0.094
0.043
0.009
0.035
0.212
C
C2
D
D1
E
E1
e
e1
H
L
(L1)
L2
L4
R
V2
0.45
0.48
6
0.6
0.6
6.2
0.017
0.019
0.236
0.023
0.023
0.244
6.6
0.252
5.1
6.4
0.173
0.368
0.039
2.8
0.8
0.181
0.397
0.110
0.031
1
0.023
0.2
0°
0.260
0.185
0.090
4.6
10.1
0.6
MAX.
0.200
4.7
2.28
4.4
9.35
1
TYP.
0.039
0.008
8°
0°
8°
0068772-F
13/16
Packaging mechanical data
5
STD50N03L - STD50N03L-1
Packaging mechanical data
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
mm
MIN.
A
B
1.5
C
12.8
D
20.2
G
16.4
N
50
T
TAPE MECHANICAL DATA
DIM.
mm
MIN.
MAX.
A0
6.8
7
0.267 0.275
B0
10.4
10.6
0.409 0.417
B1
D
14/16
inch
1.5
D1
1.5
E
1.65
MIN.
MAX.
12.1
0.476
1.6
0.059 0.063
1.85
0.065 0.073
0.059
F
7.4
7.6
0.291 0.299
K0
2.55
2.75
0.100 0.108
0.153 0.161
P0
3.9
4.1
P1
7.9
8.1
0.311 0.319
P2
1.9
2.1
0.075 0.082
R
40
W
15.7
1.574
16.3
0.618
0.641
inch
MAX.
MIN.
MAX.
330
12.992
13.2
0.504 0.520
18.4
0.645 0.724
0.059
0.795
1.968
22.4
0.881
BASE QTY
BULK QTY
2500
2500
STD50N03L - STD50N03L-1
6
Revision history
Revision history
Table 9.
Revision history
Date
Revision
Changes
31-Jul-2006
1
Initial release.
27-Oct-2006
2
Modified Figure 1.: Safe operating area on page 6
15/16
STD50N03L - STD50N03L-1
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