NSC DM54LS259E 8-bit addressable latch Datasheet

DM54LS259/DM74LS259 8-Bit Addressable Latches
General Description
Features
These 8-bit addressable latches are designed for general
purpose storage applications in digital systems. Specific
uses include working registers, serial-holding registers, and
active-high decoders or demultiplexers. They are multifunctional devices capable of storing single-line data in eight
addressable latches, and being a 1-of-8 decoder or demultiplexer with active-high outputs.
Four distinct modes of operation are selectable by controlling the clear and enable inputs as enumerated in the function table. In the addressable-latch mode, data at the datain terminal is written into the addressed latch. The addressed latch will follow the data input with all unaddressed
latches remaining in their previous states. In the memory
mode, all latches remain in their previous states and are
unaffected by the data or address inputs. To eliminate the
possibility of entering erroneous data in the latches, the enable should be held high (inactive) while the address lines
are changing. In the 1-of-8 decoding or demultiplexing
mode, the addressed output will follow the level of the D
input with all other outputs low. In the clear mode, all outputs are low and unaffected by the address and data inputs.
Y
Connection Diagram
Function Table
Y
Y
Y
Y
Y
Y
Y
Y
Y
8-Bit parallel-out storage register performs serial-to-parallel conversion with storage
Asynchronous parallel clear
Active high decoder
Enable/disable input simplifies expansion
Direct replacement for Fairchild 9334
Expandable for N-bit applications
Four distinct functional modes
Typical propagation delay times:
Enable-to-output 18 ns
Data-to-output 16 ns
Address-to-output 21 ns
Clear-to-output 17 ns
Fan-out
IOL (sink current)
54LS259 4 mA
74LS259 8 mA
IOH (source current) b0.4 mA
Typical ICC 22 mA
Inputs
Dual-In-Line Package
Clear
E
Output of
Addressed
Latch
H
H
L
L
L
H
L
H
D
Qi0
D
L
Each
Other
Output
Function
Qi0
Qi0
L
L
Addressable Latch
Memory
8-Line Demultiplexer
Clear
Latch Selection Table
Select Inputs
TL/F/6418 – 1
Order Number DM54LS259E, DM54LS259J,
DM54LS259W, DM74LS259M,
DM74LS259WM or DM74LS259N
See NS Package Number E20A, J16A,
M16A, M16B, N16E or W16A
C1995 National Semiconductor Corporation
TL/F/6418
C
B
A
Latch
Addressed
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
0
1
2
3
4
5
6
7
H e High Level, L e Low Level
D e the Level of the Data Input
Qi0 e the Level of Qi (i e 0, 1, . . . 7, as Appropriate) before the Indicated
Steady-State Input Conditions Were Established.
RRD-B30M105/Printed in U. S. A.
DM54LS259/DM74LS259 8-Bit Addressable Latches
May 1992
Absolute Maximum Ratings (Note)
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
b 55§ C to a 125§ C
DM54
DM74LS
0§ C to a 70§ C
Storage Temperature Range
b 65§ C to a 150§ C
Recommended Operating Conditions
Symbol
DM54LS259
Parameter
DM74LS259
Units
Min
Nom
Max
Min
Nom
Max
4.5
5
5.5
4.75
5
5.25
V
0.7
0.8
V
VCC
Supply Voltage
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
IOH
High Level Output Current
b 0.4
b 0.4
mA
IOL
Low Level Output Current
4
8
mA
tW
Pulse Width
(Note 7)
Enable
17
15
Clear
17
15
Setup Time
(Notes 1, 2, 3 & 7)
Data
20u
15u
Select
15v
15v
Hold Time
(Notes 1, 2 & 7)
Data
5u
2.5u
Select
0u
2.5u
tSU
tH
TA
2
Free Air Operating Temperature
2
b 55
125
V
ns
ns
ns
0
70
§C
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
(Note 4)
Max
Units
b 1.5
V
VI
Input Clamp Voltage
VOH
High Level Output
Voltage
VCC e Min, II e b18 mA
VCC e Min, IOH e Max
VIL e Max, VIH e Min
Low Level Output
Voltage
VCC e Min, IOL e Max
VIL e Max, VIH e Min
DM54
DM74
0.35
0.5
IOL e 4 mA, VCC e Min
DM74
0.25
0.4
Input Current @ Max
Input Voltage
VCC e Max, VI e 7V
VI e 10V
DM74
IIH
High Level Input
Current
IIL
VOL
II
IOS
ICC
DM54
2.5
DM74
2.7
V
3.4
0.4
V
0.1
mA
VCC e Max, VI e 2.7V
20
mA
Low Level Input
Current
VCC e Max, VI e 0.4V
b 0.4
Enable
VCC e Max, VI e 0.4V
b 0.8
Short Circuit
Output Current
VCC e Max
(Note 5)
Supply Current
VCC e Max (Note 6)
Note 1: The symbols (
DM54
DM54
b 20
b 100
DM74
b 20
b 100
22
36
mA
mA
mA
v, u) indicate the edge of the clock pulse used for reference: u for rising edge, v for falling edge.
Note 2: Setup and hold times are with reference to the enable input.
Note 3: The select-to-enable setup time is the time before the High-to-Low enable transition that the select must be stable so that the correct latch is selected and
the others not affected.
Note 4: All typicals are at VCC e 5V, TA e 25§ C.
Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 6: ICC is measured with all inputs at 4.5V, and all outputs open.
Note 7: TA e 25§ C and VCC e 5V.
2
Switching Characteristics at VCC e 5V and TA e 25§ C
DM54LS
DM74LS
CL e 15 pF
CL e 50 pF
RL e 2 kX
Parameter
From (Input)
To (Output)
tPLH
Propagation Delay Time
Low to High Level Output
Enable to
Output
27
38
ns
tPHL
Propagation Delay Time
High to Low Level Output
Enable to
Output
24
32
ns
tPLH
Propagation Delay Time
Low to High Level Output
Data to
Output
30
35
ns
tPHL
Propagation Delay Time
High to Low Level Output
Data to
Output
20
30
ns
tPLH
Propagation Delay Time
Low to High Level Output
Select to
Output
30
41
ns
tPHL
Propagation Delay Time
High to Low Level Output
Select to
Output
29
38
ns
tPHL
Propagation Delay Time
High to Low Level Output
Clear to
Output
18
36
ns
Symbol
Min
Physical Dimensions inches (millimeters)
Ceramic Leadless Chip Carrier (E)
Order Number DM54LS259E
NS Package Number E20A
3
Max
Min
Units
Max
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number DM54LS259J
NS Package Number J16A
16-Lead Molded Package Small Outline (SO)
Order Number DM74LS259M
NS Package Number M16A
4
Physical Dimensions inches (millimeters) (Continued)
16-Lead Wide Small Outline Molded Package (M)
Order Number DM74LS259WM
NS Package Number M16B
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS259N
NS Package Number N16E
5
DM54LS259/DM74LS259 8-Bit Addressable Latches
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number DM54LS259W
NS Package Number W16A
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