Revised July 2001 DM74ALS874B Dual 4-Bit D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs General Description Features This dual 4-bit register features totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide this register with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. It is particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. ■ Switching specifications at 50 pF ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ 3-STATE buffer-type outputs drive bus lines directly ■ Space saving 300 mil wide package ■ Asynchronous clear The eight flip-flops of the DM74ALS874B are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF. Ordering Code: Order Number Package Number DM74ALS874BWM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Description DM74ALS874BNT N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2001 Fairchild Semiconductor Corporation DS006244 www.fairchildsemi.com DM74ALS874B Dual 4-Bit D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs April 1984 DM74ALS874B Function Table Logic Diagram Inputs Output CLR D CLK OC Q X X X H Z L X X L L H H ↑ L H H L ↑ L L H X L L Q0 L = LOW State H = HIGH State X = Don’t Care ↑ = Positive Edge Transition Z = High Impedance State Q0 = Previous Condition of Q www.fairchildsemi.com 2 Supply Voltage 7V Input Voltage 7V Voltage Applied to Disabled Output 5.5V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Typical θJA N Package 51.0°C/W M Package 86.5°C/W Recommended Operating Conditions Symbol Parameter Min Nom Max 4.5 5 5.5 Units VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −2.6 mA IOL LOW Level Output Current fCLK Clock Frequency tWCLK Width of Clock Pulse V 2 0 V 24 mA 30 MHz HIGH 16.5 ns LOW 16.5 ns tWCLR Width of Clear Pulse 10 ns tSU Data Setup Time (Note 2) LOW 15↑ ns tH Data Hold Time (Note 2) 0↑ ns tSU Clear Inactive 12 ns TA Free Air Operating Temperature 0 70 °C Note 2: The (↑) arrow indicates the positive edge of the Clock is used for reference. 3 www.fairchildsemi.com DM74ALS874B Absolute Maximum Ratings(Note 1) DM74ALS874B Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol Parameter Conditions Min Typ Max Units −1.2 V VIK Input Clamp Voltage VCC = 4.5V, II = −18 mA VOH HIGH Level VCC = 4.5V Output Voltage VIL = VIL Max VOL IOH = Max VCC = 4.5V to 5.5V IOH = −400 µA LOW Level VCC = 4.5V IOL = 12 mA Output Voltage VIH = 2V Input Current @ Maximum VCC = 5.5V, VIH = 7V 2.4 V VCC − 2 IOL = 24 mA II 3.2 V 0.25 0.4 V 0.35 0.5 V 0.1 mA Input Voltage IIH HIGH Level Input Current VCC = 5.5V, VIH = 2.7V 20 µA IIL LOW Level Input Current VCC = 5.5V, VIL = 0.4V −0.2 mA IO Output Drive Current VCC = 5.5V, VO = 2.25V −112 mA IOZH OFF-State Output Current VCC = 5.5V, VIH = 2V HIGH Level Voltage Applied VO = 2.7V 20 µA −20 µA IOZL ICC −30 OFF-State Output Current VCC = 5.5V, VIH = 2V LOW Level Voltage Applied VO = 0.4V Supply Current VCC = 5.5V Outputs HIGH 14 21 mA Outputs OPEN Outputs LOW 19 30 mA Outputs Disabled 20 32 mA Min Max Units 30 MHz Switching Characteristics over recommended operating free air temperature range. Symbol Parameter Maximum Clock Frequency tPLH Propagation Delay Time RL = 500,Ω, LOW-to-HIGH Level Output CL = 50 pF tPHL Conditions Propagation Delay Time HIGH-to-LOW Level Output tPZH tPZL tPHZ tPLZ tPHL From Clock Any Q 4 14 ns Clock Any Q 4 14 ns Any Q 4 18 ns Any Q 4 18 ns Any Q 2 10 ns Any Q 3 12 ns Any Q 5 17 ns Output Enable Time Output to HIGH Level Output Control Output Enable Time Output to LOW Level Output Control Output Disable Time Output from HIGH Level Output Control Output Disable Time Output from LOW Level Output Control Propagation Delay Time Clear HIGH-to-LOW Level Output www.fairchildsemi.com To VCC = 4.5V to 5.5V fMAX 4 DM74ALS874B Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M24B 5 www.fairchildsemi.com DM74ALS874B Dual 4-Bit D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N24C Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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