ON DTC114TM3T5G Digital transistors (brt) npn silicon surface mount transistors with monolithic bias resistor network Datasheet

DTC114EM3T5G Series
Digital Transistors (BRT)
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The digital transistor
contains a single transistor with a monolithic bias network consisting
of two resistors; a series base resistor and a base−emitter resistor. The
digital transistor eliminates these individual components by
integrating them into a single device. The use of a digital transistor can
reduce both system cost and board space. The device is housed in the
SOT−723 package which is designed for low power surface mount
applications.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SOT−723 Package can be Soldered using Wave or Reflow.
Available in 4 mm, 8000 Unit Tape & Reel
These are Pb−Free Devices
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
PIN 3
COLLECTOR
(OUTPUT)
PIN 1
BASE
(INPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
3
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Collector Current
NPN SILICON DIGITAL
TRANSISTORS
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
SOT−723
CASE 631AA
STYLE 1
2
1
MARKING DIAGRAM
xx
M
•
•
•
•
•
•
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xx = Specific Device Code
(See Marking Table on page 2)
M = Date Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 3
1
Publication Order Number:
DTC114EM3/D
DTC114EM3T5G Series
DEVICE MARKING AND RESISTOR VALUES
Device
Marking
R1 (K)
R2 (K)
DTC114EM3T5G
8A
10
10
DTC124EM3T5G
8B
22
22
DTC144EM3T5G
8C
47
47
DTC114YM3T5G
8D
10
47
DTC114TM3T5G
8E
10
∞
DTC143TM3T5G
8F
4.7
∞
DTC123EM3T5G
8H
2.2
2.2
DTC143EM3T5G
8J
4.7
4.7
DTC143ZM3T5G*
8K
4.7
47
DTC124XM3T5G*
8L
22
47
DTC123JM3T5G
8M
2.2
47
DTC115EM3T5G
8N
100
100
DTC144WM3T5G*
8P
47
22
DTC144TM3T5G
8T
47
∞
Package
Shipping †
SOT−723
(Pb−Free)
8000/Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*Available upon request.
THERMAL CHARACTERISTICS
Characteristic
Symbol
Total Device Dissipation,
FR−4 Board (Note 1) @ TA = 25°C
Derate above 25°C
Max
Unit
260
2.0
mW
mW/°C
480
°C/W
600
4.8
mW
mW/°C
RqJA
205
°C/W
TJ, Tstg
−55 to +150
°C
PD
Thermal Resistance, Junction−to−Ambient (Note 1)
RqJA
Total Device Dissipation,
FR−4 Board (Note 2) @ TA = 25°C
Derate above 25°C
PD
Thermal Resistance, Junction−to−Ambient (Note 2)
Junction and Storage Temperature Range
1. FR−4 @ minimum pad.
2. FR−4 @ 1.0 × 1.0 inch pad.
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DTC114EM3T5G Series
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Collector−Base Cutoff Current (VCB = 50 V, IE = 0)
ICBO
−
−
100
nAdc
Collector−Emitter Cutoff Current (VCE = 50 V, IB = 0)
ICEO
−
−
500
nAdc
Emitter−Base Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.5
0.2
0.1
0.2
0.9
1.9
2.3
1.5
0.18
0.13
0.2
0.05
0.13
0.2
mAdc
Collector−Base Breakdown Voltage (IC = 10 mA, IE = 0)
V(BR)CBO
50
−
−
Vdc
Collector−Emitter Breakdown Voltage (Note 3)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
−
Vdc
hFE
35
60
80
80
160
160
8.0
15
80
80
80
80
80
160
60
100
140
140
350
350
15
30
200
150
140
150
140
350
−
−
−
−
−
−
−
−
−
−
−
−
−
−
VCE(sat)
−
−
0.25
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
OFF CHARACTERISTICS
DTC114EM3T5G
DTC124EM3T5G
DTC144EM3T5G
DTC114YM3T5G
DTC114TM3T5G
DTC143TM3T5G
DTC123EM3T5G
DTC143EM3T5G
DTC143ZM3T5G
DTC124XM3T5G
DTC123JM3T5G
DTC115EM3T5G
DTC144WM3T5G
DTC144TM3T5G
ON CHARACTERISTICS (Note 3)
DC Current Gain
(VCE = 10 V, IC = 5.0 mA)
DTC114EM3T5G
DTC124EM3T5G
DTC144EM3T5G
DTC114YM3T5G
DTC114TM3T5G
DTC143TM3T5G
DTC123EM3T5G
DTC143EM3T5G
DTC143ZM3T5G
DTC124XM3T5G
DTC123JM3T5G
DTC115EM3T5G
DTC144WM3T5G
DTC144TM3T5G
Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA)
(IC = 10 mA, IB = 5 mA)
DTC123EM3T5G
(IC = 10 mA, IB = 1 mA)
DTC143TM3T5G/DTC114TM3T5G/
DTC143EM3T5G/DTC143ZM3T5G/
DTC124XM3T5G/DTC144TM3T5G
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
(VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kW)
(VCC = 5.0 V, VB = 5.5 V, RL = 1.0 kW)
(VCC = 5.0 V, VB = 4.0 V, RL = 1.0 kW)
VOL
DTC114EM3T5G
DTC124EM3T5G
DTC114YM3T5G
DTC114TM3T5G
DTC143TM3T5G
DTC123EM3T5G
DTC143EM3T5G
DTC143ZM3T5G
DTC124XM3T5G
DTC123JM3T5G
DTC144EM3T5G
DTC144TM3T5G
DTC115EM3T5G
DTC144WM3T5G
3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
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3
Vdc
Vdc
DTC114EM3T5G Series
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Symbol
Min
Typ
Max
Unit
VOH
4.9
−
−
Vdc
R1
7.0
15.4
32.9
7.0
7.0
3.3
1.5
3.3
3.3
15.4
1.54
70
32.9
32.9
10
22
47
10
10
4.7
2.2
4.7
4.7
22
2.2
100
47
47
13
28.6
61.1
13
13
6.1
2.9
6.1
6.1
28.6
2.86
130
61.1
61.1
kW
0.8
1.0
1.2
0.17
−
0.8
0.055
0.38
0.038
1.7
0.21
−
1.0
0.1
0.47
0.047
2.1
0.25
−
1.2
0.185
0.56
0.056
2.6
ON CHARACTERISTICS (Note 4)
Characteristic
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
(VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW)
DTC143TM3T5G
DTC143ZM3T5G
DTC114TM3T5G
DTC144TM3T5G
Input Resistor
DTC114EM3T5G
DTC124EM3T5G
DTC144EM3T5G
DTC114YM3T5G
DTC114TM3T5G
DTC143TM3T5G
DTC123EM3T5G
DTC143EM3T5G
DTC143ZM3T5G
DTC124XM3T5G
DTC123JM3T5G
DTC115EM3T5G
DTC144WM3T5G
DTC144TM3T5G
Resistor Ratio
R1/R2
DTC114EM3T5G/DTC124EM3T5G/
DTC144EM3T5G/DTC115EM3T5G
DTC114YM3T5G
DTC143TM3T5G/DTC114TM3T5G/DTC144TM3T5G
DTC123EM3T5G/DTC143EM3T5G
DTC143ZM3T5G
DTC124XM3T5G
DTC123JM3T5G
DTC144WM3T5G
PD , POWER DISSIPATION (MILLIWATTS)
4. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
300
250
200
150
100
50
0
−50
RqJA = 480°C/W
0
50
100
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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4
150
DTC114EM3T5G Series
1
1000
IC/IB = 10
hFE , DC CURRENT GAIN (NORMALIZED)
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS − DTC114EM3T5G
TA=−25°C
25°C
0.1
75°C
0.01
0.001
0
20
40
IC, COLLECTOR CURRENT (mA)
VCE = 10 V
TA=75°C
25°C
−25°C
100
10
50
1
10
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) versus IC
Figure 3. DC Current Gain
100
IC, COLLECTOR CURRENT (mA)
2
1
0
25°C
75°C
f = 1 MHz
IE = 0 V
TA = 25°C
TA=−25°C
10
1
0.1
0.01
0
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
0.001
50
VO = 5 V
0
1
2
5
6
7
3
4
Vin, INPUT VOLTAGE (VOLTS)
10
VO = 0.2 V
TA=−25°C
25°C
75°C
1
0.1
0
10
8
9
Figure 5. Output Current versus Input Voltage
Figure 4. Output Capacitance
V in , INPUT VOLTAGE (VOLTS)
C ob, CAPACITANCE (pF)
4
3
100
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage versus Output Current
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5
50
10
DTC114EM3T5G Series
1000
1
hFE , DC CURRENT GAIN (NORMALIZED)
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS
TYPICAL ELECTRICAL CHARACTERISTICS − DTC124EM3T5G
IC/IB = 10
25°C
TA=−25°C
0.1
75°C
0.01
0.001
0
20
40
IC, COLLECTOR CURRENT (mA)
TA=75°C
25°C
−25°C
100
10
50
VCE = 10 V
1
IC, COLLECTOR CURRENT (mA)
Figure 7. VCE(sat) versus IC
Figure 8. DC Current Gain
100
IC, COLLECTOR CURRENT (mA)
f = 1 MHz
IE = 0 V
TA = 25°C
2
1
75°C
25°C
TA=−25°C
10
1
0.1
0.01
VO = 5 V
0
0
0.001
50
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
Figure 9. Output Capacitance
0
2
4
6
Vin, INPUT VOLTAGE (VOLTS)
VO = 0.2 V
TA=−25°C
10
25°C
75°C
1
0.1
0
10
8
10
Figure 10. Output Current versus Input Voltage
100
V in , INPUT VOLTAGE (VOLTS)
C ob , CAPACITANCE (pF)
4
3
100
10
20
30
40
50
IC, COLLECTOR CURRENT (mA)
Figure 11. Input Voltage versus Output Current
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DTC114EM3T5G Series
10
1000
IC/IB = 10
1
25°C
TA=−25°C
0.01
0
25°C
−25°C
10
50
20
40
IC, COLLECTOR CURRENT (mA)
TA=75°C
100
75°C
0.1
VCE = 10 V
hFE , DC CURRENT GAIN (NORMALIZED)
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS
TYPICAL ELECTRICAL CHARACTERISTICS − DTC144EM3T5G
1
10
IC, COLLECTOR CURRENT (mA)
Figure 12. VCE(sat) versus IC
1
100
IC, COLLECTOR CURRENT (mA)
0.4
TA=−25°C
10
1
0.1
0.01
0.2
0
25°C
75°C
0.6
0
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
0.001
50
Figure 14. Output Capacitance
VO = 5 V
0
2
4
6
Vin, INPUT VOLTAGE (VOLTS)
VO = 0.2 V
TA=−25°C
10
25°C
75°C
1
0.1
0
10
8
10
Figure 15. Output Current versus Input Voltage
100
V in , INPUT VOLTAGE (VOLTS)
C ob , CAPACITANCE (pF)
Figure 13. DC Current Gain
f = 1 MHz
IE = 0 V
TA = 25°C
0.8
100
20
30
IC, COLLECTOR CURRENT (mA)
40
Figure 16. Input Voltage versus Output Current
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7
50
DTC114EM3T5G Series
1
300
IC/IB = 10
hFE , DC CURRENT GAIN (NORMALIZED)
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS − DTC114YM3T5G
TA=−25°C
25°C
0.1
75°C
0.01
0.001
0
20
40
60
IC, COLLECTOR CURRENT (mA)
25°C
200
−25°C
150
100
50
0
80
TA=75°C
VCE = 10
250
1
2
4
6
Figure 17. VCE(sat) versus IC
100
f = 1 MHz
lE = 0 V
TA = 25°C
3
TA=75°C
IC, COLLECTOR CURRENT (mA)
3.5
2.5
2
1.5
1
0.5
0
2
4
6 8 10 15 20 25 30 35
VR, REVERSE BIAS VOLTAGE (VOLTS)
40
45
25°C
−25°C
10
VO = 5 V
1
50
Figure 19. Output Capacitance
0
2
4
6
Vin, INPUT VOLTAGE (VOLTS)
VO = 0.2 V
TA=−25°C
25°C
75°C
1
0.1
0
10
8
Figure 20. Output Current versus Input Voltage
10
V in , INPUT VOLTAGE (VOLTS)
Cob , CAPACITANCE (pF)
90 100
Figure 18. DC Current Gain
4
0
8 10 15 20 40 50 60 70 80
IC, COLLECTOR CURRENT (mA)
20
30
IC, COLLECTOR CURRENT (mA)
40
Figure 21. Input Voltage versus Output Current
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8
50
10
DTC114EM3T5G Series
TYPICAL APPLICATIONS FOR NPN BRTs
+12 V
ISOLATED
LOAD
FROM mP OR
OTHER LOGIC
Figure 22. Level Shifter: Connects 12 or 24 Volt Circuits to Logic
+12 V
VCC
OUT
IN
LOAD
Figure 23. Open Collector Inverter:
Inverts the Input Signal
Figure 24. Inexpensive, Unregulated Current Source
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DTC114EM3T5G Series
PACKAGE DIMENSIONS
SOT−723
CASE 631AA−01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
−X−
D
A
b1
−Y−
3
E
1
e
HE
L
2
b 2X
0.08 (0.0032) X Y
C
DIM
A
b
b1
C
D
E
e
HE
L
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
MILLIMETERS
MIN
NOM
MAX
0.45
0.50
0.55
0.15
0.21
0.27
0.25
0.31
0.37
0.07
0.12
0.17
1.15
1.20
1.25
0.75
0.80
0.85
0.40 BSC
1.15
1.20
1.25
0.15
0.20
0.25
INCHES
MIN
NOM
MAX
0.018 0.020 0.022
0.0059 0.0083 0.0106
0.010 0.012 0.015
0.0028 0.0047 0.0067
0.045 0.047 0.049
0.03 0.032 0.034
0.016 BSC
0.045 0.047 0.049
0.0059 0.0079 0.0098
SOLDERING FOOTPRINT*
0.40
0.0157
0.40
0.0157
1.0
0.039
0.40
0.0157
0.40
0.0157
0.40
0.0157
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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DTC114EM3/D
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