PCMCIA Flash Memory Card FLD Series PCMCIA Flash Memory Card 4 MEGABYTE through 40 MEGABYTE (AMD based) General Description Features WEDC’s PCMCIA Flash memory cards offer high • Low cost High Density Linear Flash Card density linear Flash solid state storage solutions for • Supports 5V only systems code and data storage, high performance disk emulation and execute in place (XIP) applications in •Based on AMD Flash Components -low standby power without entering reset mode -allows standard access from standby mode mobile PC and dedicated (embedded) equipment. Packaged in a PCMCIA type I housing, each card •Fast Read Performance - 150ns Maximum Access Time contains a connector, an array of Flash memories packaged in TSOP packages and card control logic. The card control logic provides the system interface • x8/ x16 Data Interface and controls the internal Flash memories. Combined • High Performance Random Writes - 7µs typical Word Write Time with file management software, such as Flash Translation Layer (FTL), WEDC Flash cards provide removable high-performance disk emulation. • Automated Write and Erase Algorithms - AMD Command Set The WEDC FLD series is based on AMD Flash • 1 000,000 Erase Cycles per Block memories. The FLD series offers byte wide and word wide operation, low power modes and Card • 64K word (128kB) symmetrical Block Architecture Information Structure (CIS) for easy identification of card characteristics. • PC Card Standard Type I Form Factor Note: Standard options include attribute memory. Cards without attribute memory are available. Cards are also available with or without a hardware write protect switch. Architecture Overview WEDC’s FLD series is designed to support from two to twenty (see Block diagram) 16Mb components, providing a wide range of density options. Cards are based on the Am29F017 (16Mb) device for 5V only applications. The device code for the Am29F017 is 3Dh and the manufacturer’s ID is 01h. This card is compatible with D series cards from AMD. Cards utilizing 16Mb components provide densities ranging from 4MB to 40MB in 4MB increments. In support of the PC Card (PCMCIA) standard for word wide access, devices are paired. Therefore, the Flash array is structured in 64K word (128kB)blocks. Write, read operations can be performed as either a word or byte wide operation. By multiplexing A0, CE1# and CE2#, 8-bit hosts can access all data on data lines DQ0 - DQ7. The FLD series cards conform with the PC Card Standard (formerly PCMCIA) and supported JEIDA, providing electrical and physical compatibility. The PC Card form factor offers an industry standard pinout and mechanical outline, allowing density upgrades without system design changes. WEDC’s standard cards are shipped with WEDC’s silkscreen design. Cards are also available with blank housings (no silkscreen). The blank housings are available in both a recessed (for label) and flat housing. Please contact your WEDC sales representative for further information on Custom artwork. August 2000 Rev. 5 - ECO #13128 1 PC Card Products PCMCIA Flash Memory Card FLD Series Block Diagram Device type Manuf ID Device ID Am29F017 01H 3DH CSn Device Pair (N/2 - 1) Device (N-1) Device (N-2) Array Address Bus ADDRESS BUFFER ADDRESS BUS A1-A25 Control Address Bus M Res WL# RL# WH# RH# Device 3 Device Pair 0 Device 2 Device 1 WH# RH# CS1 CE2# CE1# Q2 Q0 Ctrl REG# A0 WP DATA BUS Q0-Q7 At/Reg enable CS0 Device 0 DATA BUS Q8-Q15 CS0 WE# OE# Qn CSn Device Pair 1 Vcc Control Logic PCMCIA Interface WL# RL# 0000h attrib. mem CIS EEPROM 2kB Vcc control Q0-Q7 Vcc I/O buffer DATA BUS D8-D15 August 2000 Rev. 5 - ECO #13128 DATA BUS D0-D7 2 PC Card Products PCMCIA Flash Memory Card FLD Series Pinout Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Signal name GND DQ3 DQ4 DQ5 DQ6 DQ7 CE1# A10 OE# A11 A9 A8 A13 A14 WE# RDY/BSY# Vcc Vpp1 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 WP GND I/O I/O I/O I/O I/O I/O I I I I I I I I I O I I I I I I I I I I I I/O I/O I/O O Function Ground Data bit 3 Data bit 4 Data bit 5 Data bit 6 Data bit 7 Card enable 1 Address bit 10 Output enable Address bit 11 Address bit 9 Address bit 8 Address bit 13 Address bit 14 Write Enable Ready/Busy Supply Voltage Prog. Voltage Address bit 16 Address bit 15 Address bit 12 Address bit 7 Address bit 6 Address bit 5 Address bit 4 Address bit 3 Address bit 2 Address bit 1 Address bit 0 Data bit 0 Data bit 1 Data bit 2 Write Potect Ground Active Pin Signal name 35 GND 36 CD1# 37 DQ11 38 DQ12 39 DQ13 40 DQ14 41 DQ15 42 CE2# 43 VS1 44 RFU 45 RFU 46 A17 47 A18 48 A19 49 A20 50 A21 51 Vcc 52 Vpp2 53 A22 54 A23 55 A24 56 A25 57 VS2 58 RST 59 Wait# 60 RFU 61 REG# 62 BVD2 63 BVD1 64 DQ8 65 DQ9 66 DQ10 67 CD2# 68 GND LOW LOW LOW LOW N.C. HIGH I/O O I/O I/O I/O I/O I I O I I I I I I I I I O I O I O O I/O I/O O O Function Active Ground Card Detect 1 LOW Data bit 11 Data bit 12 Data bit 13 Data bit 14 Data bit 15 Card Enable 2 LOW Voltage Sense 1 N.C. Reserved Reserved Address bit 17 Address bit 18 Address bit 19 2MB(3) Address bit 20 4MB(3) Address bit 21 Supply Voltage Prog. Voltage N.C. 8MB(3) Address bit 22 16MB(3) Address bit 23 32MB(3) Address bit 24 64MB(3) Address bit 25 Voltage Sense 2 N.C. Card Reset HIGH Extended Bus cycleLOW(2) Reserved Attrib Mem Select Bat. Volt. Detect 2 (2) Bat. Volt. Detect 1 (2) Data bit 8 Data bit 9 Data bit 10 Card Detect 2 LOW Ground Notes: 1. RDY/BSY is an open drain output, external pull-up resistor is required. 2. Wait#, BVD1 and BVD2 are driven high for compatibility. 3. Shows density for which specified address bit is MSB. Higher order address bits are no connects (ie 4MB A21 is MSB A22 - A25 are NC). Mechanical .063 3.370 .039 2.126 .039 .400 .130 August 2000 Rev. 5 - ECO #13128 3 PC Card Products PCMCIA Flash Memory Card FLD Series Card Signal Description Symbol A0 - A25 Type INPUT DQ0 - DQ15 INPUT/OUTPUT CE1#, CE2# INPUT OE# INPUT WE# INPUT RDY/BSY# OUTPUT CD1#, CD2# OUTPUT WP OUTPUT VPP1, VPP2 N.C. VCC GND REG# INPUT RST INPUT WAIT# OUTPUT BVD1, BVD2 OUTPUT VS1, VS2 OUTPUT RFU N.C. August 2000 Rev. 5 - ECO #13128 Name and Function ADDRESS INPUTS: A0 through A25 enable direct addressing of up to 64MB of memory on the card. Signal A0 is not used in word access mode. A25 is the most significant bit DATA INPUT/OUTPUT: DQ0 THROUGH DQ15 constitute the bi-directional databus. DQ15 is the MSB. CARD ENABLE 1 AND 2: CE1# enables even byte accesses, CE2# enables odd byte accesses. Multiplexing A0, CE1# and CE2# allows 8-bit hosts to access all data on DQ0 - DQ7. OUTPUT ENABLE: Active low signal gating read data from the memory card. WRITE ENABLE: Active low signal gating write data to the memory card. READY/BUSY OUTPUT: Indicates status of internally timed erase or program algorithms. A high output indicates that the card is ready to accept accesses. A low output indicates that one or more devices in the memory card are busy with internally timed erase or write activities. CARD DETECT 1 and 2: Provide card insertion detection. These signals are connected to ground internally on the memory card. The host socket interface circuitry shall supply 10K-ohm or larger pull-up resistors on these signal pins. WRITE PROTECT: Write protect reflects the status of the Write Protect switch on the memory card. WP set to high = write protected, providing internal hardware write lockout to the Flash array. If card does not include optional write protect switch, this signal will be pulled low internally indicating write protect = "off". PROGRAM/ERASE POWER SUPPLY: Not connected for 5V only card. CARD POWER SUPPLY: 5.0V for all internal circuitry. GROUND: for all internal circuitry. ATTRIBUTE MEMORY SELECT : provides access to Flash memory card registers and Card Information Structure in the Attribute Memory Plane. RESET: Active high signal for placing card in Power-on default state. Reset can be used as a Power-Down signal for the memory array. WAIT: This signal is pulled high internally for compatibility. No wait states are generated. BATTERY VOLTAGE DETECT: These signals are pulled high to maintain SRAM card compatibility. VOLTAGE SENSE: Notifies the host socket of the card's VCC requirements. VS1 and VS2 are open to indicate a 5V card has been inserted. RESERVED FOR FUTURE USE NO INTERNAL CONNECTION TO CARD: pin may be driven or left floating 4 PC Card Products PCMCIA Flash Memory Card FLD Series Absolute Maximum Ratings(2) Operating Temperature TA (ambient) Commercial Industrial Storage Temperature Commercial Industrial Voltage on any pin relative to VSS VCC supply Voltage relative to VSS Notes: (1) During transitions, inputs may undershoot to -2.0V or overshoot to VCC +2.0V for periods less than 20ns. 0°C to +60 °C -40°C to +85 °C ** (2) Stress greater than those listed under “Absolute Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. -30°C to +80 °C -40°C to +85 °C ** -0.5V to VCC+0.5V (1) -0.5V to +7.0V ** Advanced information DC Characteristics(1) Sym Parameter ICCR VCC Read Current ICCW VCC Program Current ICCE VCC Erase Current ICCS (CMOS) VCC Standby Current Density (Mbytes) All (4) Max Units 75 mA All 150 mA All 150 mA 230 µA 2MB (4MB) Notes Typ 2,3 80 Test Conditions VCC = VCCmax tcycle = 150ns,CMOS levels VCC = VCCmax Control Signals = VCC Reset = VSS, CMOS levels CMOS Test Conditions: VCC = 5V ± 5%, VIL = VSS ± 0.2V, VIH = VCC ± 0.2V Notes: 1. All currents are RMS values unless otherwise specified. ICCR, ICCW and ICCE are based on Word wide operations. 2. Control Signals: CE1#, CE2#, OE#, WE#, REG#. 3. ICCD and ICCS are specified for lowest density card for each component type (2MB for 8Mb components and 4MB for 16Mb components) This represents a single pair of devices. For higher densities multiply the number of device pairs by the specified current in the table. For example a 40MB card will use 10 device pairs of 16Mb components. The maximum ICCD will be 10 x 40µA = 400µA. The maximum ICCS will be 10 x 230µA = 2.3mA. 4. Typical: VCC = 5V, T = +25°C. Symbol Parameter Notes Min Max Units Test Conditions ILI Input Leakage Current 1 ±20 µA VCC = VCCMAX Vin =VCC or VSS ILO Output Leakage Current 1 ±20 µA VCC = VCCMAX Vout =VCC or VSS VIL Input Low Voltage 1 0 0.8 V VIH Input High Voltage 1 0.7VCC VCC+0.5 V VOL Output Low Voltage 1 0.4 V IOL = 3.2mA VOH Output High Voltage 1 VCC-0.4 VCC V IOH = -2.0mA VLKO VCC Erase/Program Lock Voltage 1 2.0 V Notes: 1. Values are the same for byte and word wide modes for all card densities. 2. Exceptions: Leakage currents on CE1#, CE2#, OE#, REG# and WE# will be < 500 µA when VIN = GND due to internal pull-up resistors. Leakage currents on RST will be <150µA when VIN=VCC due to internal pull-down resistor. August 2000 Rev. 5 - ECO #13128 5 PC Card Products PCMCIA Flash Memory Card FLD Series AC Characteristics Read Timing Parameters 150ns SYM (PCMCIA) tC(R) Parameter Min ta(A) Address Access Time 150 ns ta(CE) Card Enable Access Time 150 ns ta(OE) Output Enable Access Time 75 ns tsu(A) Address Setup Time 20 ns tsu(CE) Card Enable Setup Time 0 ns th(A) Address Hold Time 20 ns th(CE) Card Enable Hold Time 20 ns tv(A) Output Hold from Address Change 0 ns tdis(CE) Output Disable Time from CE# 75 ns tdis(OE) Output Disable Time from OE# 75 ns ten(CE) Output Enable Time from CE# 5 ns ten(OE) Output Enable Time from OE# 5 ns Read Cycle Time Max 150 Unit ns Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications. Read Timing Diagram tc(R ) th (A ) ta (A ) A [2 5::0], /R E G tv(A ) ta(C E ) tsu(C E ) /C E 1, /C E 2 NOTE 1 NOTE 1 tsu(A ) ta(O E ) th(C E ) tdis(C E ) /O E tdis(O E ) ten(O E ) D [1 5::0] D A TA V A LID Note: Signal may be high or low in this area. August 2000 Rev. 5 - ECO #13128 6 PC Card Products PCMCIA Flash Memory Card FLD Series Write Timing Parameters 150ns SYM (PCMCIA) tCW Parameter Min Max Unit Write Cycle Time 150 ns tw(WE) Write Pulse Width 80 ns tsu(A) Address Setup Time 20 ns tsu(A-WEH) Address Setup Time for WE# 100 ns tsu(CE-WEH) Card Enable Setup Time for WE# 100 ns tsu(D-WEH) Data Setup Time for WE# 50 ns th(D) Data Hold Time 20 ns trec(WE) Write Recover Time 20 ns tdis(WE) Output Disable Time from WE# 75 ns tdis(OE) Output Disable Time from OE# 75 ns ten(WE) Output Enable Time from WE# 5 ns ten(OE) Output Enable Time from OE# 5 ns tsu(OE-WE) Output Enable Setup from WE# 10 ns th(OE-WE) Output Enable Hold from WE# 10 ns tsu(CE) Card Enable Setup Time from OE# 0 ns th(CE) Card Enable Hold Time 20 ns Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications. Write Timing Diagram tc (W ) A [ 2 5 :: 0 ], / R E G ts u ( A - W E H ) tre c (W E ) ts u ( C E - W E H ) th (C E ) ts u (C E ) /C E 1 , /C E 2 NOTE 1 NO TE 1 /O E tw (W E ) ts u ( A ) th (O E -W E ) /W E th ( D ) ts u (O E -W E ) D [ 1 5 : :0 ] ( D in ) ts u (D -W E H ) NO TE 2 D A T A IN P U T t d is ( W E ) t d is ( O E ) te n (O E ) te n (W E ) D [ 1 5 ::0 ] ( D o u t ) NO TE 2 Notes: 1. Signal may be high or low in this area. 2. When the data I/O pins are in the output state, no signals shall be applied to the data pins (D15 - D0) by the host system. August 2000 Rev. 5 - ECO #13128 7 PC Card Products PCMCIA Flash Memory Card FLD Series Data Write and Erase Performance(1,3) VCC = 5V ± 5%, TA = 0°C to + 60°C Typ(1) Max Units Test Conditions 2,4 7 300 µs Excludes system-level overhead Block Program Time 2 0.5 2.0 sec Block Erase Time 2 1 8 sec SYM Parameter Notes tWHQV1 tEHQV1 tWHQV2 tEHQV2 Word/Byte Program time Min Excludes 00h prog. prior to erasure Notes: 1. Typical: Nominal voltages and TA = 25°C. 2. Excludes system overhead. 3. Valid for all speed options. 4. To maximize system performance RDY/BSY# signal should be polled. August 2000 Rev. 5 - ECO #13128 8 PC Card Products PCMCIA Flash Memory Card FLD Series PRODUCT MARKING WED 7P016FLD2200C15 C995 9915 EDI Date code Lot code / trace number Part number Company Name Note: Some products are currently marked with our pre-merger company name/acronym (EDI). During our transition period, some products will also be marked with our new company name/acronym (WED). Starting October 2000 all PCMCIA products will be marked only with the WED prefix. PART NUMBERING 7 P 016 FLD22 00 C 15 Card access time 15 25 150ns 250ns Temperature range C Commercial 0°C to +70°C I Industrial -40°C to +85°C Packaging option 00 Standard, type 1 Card family and version - See Card Family and Version Info. for details (next page) Card capacity 016 16MB PC card P R Standard PCMCIA Ruggedized PCMCIA Card technology 7 8 August 2000 Rev. 5 - ECO #13128 FLASH SRAM 9 PC Card Products PCMCIA Flash Memory Card FLD Series Ordering Information EDI7P XXX FLD 22 SS T ZZ Based on Am29F017 for 5V only applications where XXX: 004 008 012 016 020 024 028 032 036 040 4MB 8MB 12MB 16MB 20MB 24MB 28MB 32MB 36MB 40MB SS: 00 01 02 WEDC Silkscreen Blank Housing, Type I Blank Housing, Type I Recessed T: C I Commercial Industrial ZZ: 15 150ns Note: Options without attribute memory and with hardware write protect switch are available. Card families: FLD 21 FLD 22 FLD 23 FLD 24 - No Attribute memory, No WP switch - With Attribute Memory, No WP switch - No Attribute Memory, With WP switch - With Attribute Memory, With WP switch August 2000 Rev. 5 - ECO #13128 10 PC Card Products PCMCIA Flash Memory Card FLD Series CIS Information for FLD Series Cards Address 00H 02H Value 01H 03H 04H 06H 53H 0EH 1EH 2EH 3EH 4EH 5EH 6EH 7EH 8EH 9EH FFH 18H 02H 01H 3DH 17H 03H 42H 01H FFH 1EH 06H 02H 11H 01H 01H 01H 01H 08H 0AH 0CH 0EH 10H 12H 14H 16H 18H 1AH 1CH 1EH 20H 22H 24H 26H 28H 2AH 2CH 2EH 30H 32H 34H 36H 38H 3AH 3CH 3EH 20H 04H F6H 01H 00H 00H 15H 47H 04H 01H Description CISTPL_DEVICE TPL_LINK FLASH = 150ns (device writable) CARD SIZE: 4MB 8MB 12MB 16MB 20MB 24MB 28MB 32MB 36MB 40MB END OF DEVICE CISTPL_JEDEC_C TPL_LINK AMD - ID 29F017 - ID CISTPL_DEVICE_A TPL_LINK EEPROM - 200ns Device Size = 2KBytes END OF TUPLE CISTPL_DEVICEGEO TPL_LINK DGTPL_BUS DGTPL_EBS DGTPL_RBS DGTPL_WBS DGTPL_PART FLASH DEVICE NON-INTERLEAVED CISTPL_MANFID TPL_LINK(04H) EDITPLMID_MANF: LSB EDI PLMID_MANF: MSB LSB: Numb er Not Assign. MSB: Numb er Not Assign. CISTPL_VERS1 TPL_LINK TPLLV1_MAJOR TPLLV1_MINOR August 2000 Rev. 5 - ECO #13128 Address 40H 42H 44H 46H 48H 4AH 4CH 4EH 50H 52H 54H 56H 58H 5AH 5CH 5EH 60H 62H 64H 66H 68H 6AH 6CH 6EH 70H 72H 74H 76H 78H 7AH 7CH 7EH 80H 82H 84H 86H Value Description E 45H D 44H 49H 37H 50H 30H 1) 1) 46H 4CH 44H 32H 2) 2DH 2DH 2DH 31H 35H 20H 00H 43H 4FH 50H 59H 52H 49H 47H 48H 54H 20H 45H 4CH 45E 43H 54H 52H 88H 4FH 8AH 8CH 8EH 90H 92H 4EH 49H 43H 20H 44H 11 I 7 P 0 x x F L D 2 x 1 5 SPACE END TEXT C O P Y R I G H T SPACE E L E C T R Address 94H 96H 98H 9AH 9CH 9EH A0H A2H A4H A6H A8H AAH ACH AEH B0H B2H B4H B6H B8H BAH BCH BEH C0H C2H C4H C6H C8H 1) Address 4CH 4EH O N I C SPACE D Value Description E 45H S 53H I 49H G 47H N 4EH S 53H SPACE 20H I 49H N 4EH C 43H O 4FH R 52H P 50H O 4FH R 52H A 41H T 54H E 45H D 44H SPACE 20H END TEXT 00H 1 31H 9 39H 9 39H 7 37H END TEXT 00H 00H END OF LIST Value Description 30 0 31 1 32 2 33 3 34 4 30 0 32 2 34 4 36 6 38 8 32 2 34 4 2) 58H PC Card Products PCMCIA Flash Memory Card FLD Series Date of revision 24-Dec-98 07-Feb-99 27-May-99 31-May-00 1-Aug-00 REVISION HISTORY Version Description -001 Initial release -002 Added: card families, spelling errors Erase cycles 1 milion Prog/erasure timing -003 Logo change -004 Added Page 9 -005 Corrected Timing Errors, Pages 6&7 White Electronic Designs Corporation One Research Drive, Westborough, MA 01581, USA tel: (508) 366 5151 fax: (508) 836 4850 www.whiteedc.com August 2000 Rev. 5 - ECO #13128 12 PC Card Products