EL7515 ® Data Sheet May 13, 2005 High Frequency PWM Step-Up Regulator Features The EL7515 is a high frequency, high efficiency step-up DC:DC regulator operated at fixed frequency PWM mode. With an integrated 1.4A MOSFET, it can deliver up to 600mA output current at up to 92% efficiency. The adjustable switching frequency is up to 1.2MHz, making it ideal for DSL applications. • Up to 92% efficiency When shut down, it draws <1µA of current. This feature, along with the minimum starting voltage of 1.8V, makes it suitable for portable equipment powered by one lithium ion, 3 to 4 NiMH cells, or 2 cells of alkaline battery. The EL7515 is available in a 10-pin MSOP package, with maximum height of 1.1mm. With proper external components, the whole converter takes less than 0.25in2 PCB space. This device is specified for operation over the full -40°C to +85°C temperature range. FN7120.1 • Up to 600mA IOUT • 4.5V < VOUT < 17V • 1.8V < VIN < 13.2V • Up to 1.2MHz adjustable frequency • <1µA shutdown current • Adjustable soft-start • Low battery detection • Internal thermal protection • 1.1mm max height 10-pin MSOP package • Pb-Free available (RoHS compliant) Applications • 3V to 5V and 12V converters Pinout • 5V to 12V converters EL7515 (10-PIN MSOP) TOP VIEW • TFT-LCD • DSL PGND 1 10 LX • Portable equipment SGND 2 9 VDD • Desktop equipment RT 3 8 FB Ordering Information EN 4 7 SS LBI 5 6 LBO PART NUMBER PACKAGE TAPE & REEL PKG. DWG. # EL7515IY 10-Pin MSOP - MDP0043 EL7515IY-T7 10-Pin MSOP 7” MDP0043 EL7515IY-T13 10-Pin MSOP 13” MDP0043 EL7515IYZ (See Note) 10-Pin MSOP (Pb-free) - MDP0043 EL7515IYZ-T7 (See Note) 10-Pin MSOP (Pb-free) 7” MDP0043 EL7515IYZT13 (See Note) 10-Pin MSOP (Pb-free) 13” MDP0043 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EL7515 Typical Application L1 VIN (1.8V-9V) D1 R4 1.4kΩ 10µH C1 10µF 1 PGND 2 SGND R3 3 RT LX 10 FB 8 C3 4 EN SS 7 5 LBI LBO 6 22µF VOUT (12V UP TO 630mA) C4 0.1µF VDD 9 100kΩ C5 R2 82kΩ R1 10kΩ C10 4.7nF 20nF 2 FN7120.1 May 13, 2005 EL7515 Absolute Maximum Ratings (TA = 25°C) EN, LBI, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+12V LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+18V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Operating Junction Temperature: . . . . . . . . . . . . . . . . . . . . . . 135°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER VIN = 5V, VOUT = 12V, L = 10µH, IOUT = 0mA, RT = 100kΩ, TA = 25°C, Unless Otherwise Specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT VIN Input Voltage Range 1.8 13.2 V VOUT Output Voltage Range 4.5 17 V IQ1 Quiescent Current - Shut-down VEN = 0, feedback resisters disconnected 1 µA IQ2 Quiescent Current VEN = 2V 1.4 2 mA VFB Feedback Voltage 1.33 1.37 V IB Feedback Input Bias Current 0.10 µA DMAX Maximum Duty Cycle 84 90 % ILIM Current Limit - Max Peak Input Current 1 1.4 A ISHDN Shut-down Input Bias Current VLBI LBI Threshold Voltage VOL-LBO LBO Output Low ILEAK-LBO 1.29 1 µA 220 250 mV ILBO = 1mA 0.1 0.2 V LBO Output Leakage Current VLBI = 250mV, VLBO = 5V 0.02 2 µA RDS-ON Switch On Resistance at 12V output 220 ILEAK-SWITCH Switch Leakage Current 180 mΩ 1 ∆VOUT/∆VIN/VOUT Line Regulation 3V < VIN < 6V, VOUT = 12V, no load ∆VOUT/VOUT Load Regulation IOUT = 50mA to 150mA FOSC-MAX Maximum Switching Frequency RT = 49.9kΩ FOSC1 Switching Frequency 600 VHI_EN EN Input High Threshold 1.6 VLO_EN EN Input Low Threshold µA 0.4 %/V 1 % 1200 kHz 670 750 kHz V 0.5 V Pin Descriptions PIN NUMBER PIN NAME PIN FUNCTION 1 PGND Power ground; connected to the source of internal N-channel power MOSFET 2 SGND Signal ground; ground reference for all the control circuitry; needs to have only a single connection to PGND 3 RT Timing resistor to adjust the oscillation frequency of the converter 4 EN Chip enable; connects to logic HI (>1.6V) for chip to function 5 LBI Low battery input; connects to a sensing voltage, or left open if function is not used 6 LBO Low battery detection output; connected to the open drain of a MOSFET; able to sink 1mA current 7 SS Soft-start; connects to a capacitor to control the start-up of the converter 8 FB Voltage feedback input; needs to connect to resistor divider to decide VO 9 VDD 10 LX Control circuit positive supply Inductor drive pin; connected to the drain of internal N-channel power MOSFET 3 FN7120.1 May 13, 2005 EL7515 Block Diagram VOUT 10µA 82kΩ 10kΩ VIN 1.4kΩ 4.7nF 22µF 0.1µF FB 10µF VDD LX THERMAL SHUT-DOWN MAX_DUTY RT REFERENCE GENERATOR 100kΩ VREF VRAMP PWM LOGIC PWM COMPARATOR 0.2Ω EN LBO 12µA LBI + + START-UP OSCILLATOR ILOUT 80mΩ 7.2kΩ 220mV SGND SS PGND 20nF 4 FN7120.1 May 13, 2005 EL7515 Typical Performance Curves 92 VIN=3.3V, VO=12V 92 90 88 EFFICIENCY (%) EFFICIENCY (%) 90 86 84 82 80 88 86 84 82 78 76 VIN=3.3V, VO=5V 0 50 100 150 200 250 300 80 350 0 100 200 2.2 2.1 90 2 88 1.9 IDD (mA) EFFICIENCY (%) VIN=5V, VO=12V 92 86 84 80 1.5 100 200 300 400 500 1.4 650 600 750 850 1400 RT=51.1kΩ 1250 VDD=10V 1000 RT=71.5kΩ FS (kHz) FS (kHz) 1150 1200 800 RT=100kΩ 800 600 400 400 RT=200kΩ 200 0 1050 FIGURE 4. IDD vs FS 1400 600 950 FS (kHz) FIGURE 3. EFFICIENCY vs IOUT 1000 700 VDD=10V, VO=12V TO 17V IOUT (mA) 1200 600 1.7 1.6 0 500 1.8 82 78 400 FIGURE 2. EFFICIENCY vs IOUT FIGURE 1. EFFICIENCY vs IOUT 94 300 IOUT (mA) IOUT (mA) 5 6 7 8 9 10 VDD (V) FIGURE 5. FS vs VDD 5 11 200 12 0 50 100 150 200 RT (kΩ) FIGURE 6. FS vs RT FN7120.1 May 13, 2005 EL7515 Typical Performance Curves (Continued) VIN=5V, VO=12V, IO=300mA VIN=5V, VO=12V, IO=30mA ∆VIN 50mV/DIV ∆VIN 50mV/DIV VLX 10V/DIV ∆VO 10V/DIV VLX 20mV/DIV ∆VO 20mV/DIV IL IL 0.5A/DIV 0.5A/DIV 0.5µs/DIV 0.5µs/DIV FIGURE 7. STEADY STATE OPERATION (INDUCTOR DISCONTINUOUS CONDUCTION) FIGURE 8. STEADY STATE OPERATION (INDUCTOR CONTINUOUS CONDUCTION) VIN=5V, VO=12V, IO=300mA VIN=5V, VO=12V, IO=50mA TO 300mA 2V/DIV 5V/DIV 100mA/DIV IO ∆VIN VO 0.5A/DIV ∆VO 0.5V/DIV IL 0.5ms/DIV FIGURE 9. POWER-UP 0.2ms/DIV FIGURE 10. LOAD TRANSIENT RESPONSE Applications Information The EL7515 is a step-up regulator, operated at fixed frequency pulse-width-modulation (PWM) control. The input voltage is 1.8V - 13.2V and output voltage is 4.5V - 17V. The switching frequency (up to 1.2MHz) is decided by the resistor connected to RT pin. Start-Up After VDD reaches a threshold of about 1.7V, the start-up oscillator generates fixed duty-ratio of 0.5 - 0.7 at a frequency of several hundred kilohertz. This will boost the output voltage. When VDD reaches about 3.7V, the PWM comparator takes over the control. The duty ratio will be decided by the multiple-input direct summing comparator, Max_Duty signal (about 90% duty-ratio), and the Current Limit Comparator, whichever is the smallest. The soft-start is provided by the current limit comparator. As the internal 12µA current source charges the external CSS, the peak MOSFET current is limited by the voltage on the 6 capacitor. This in turn controls the rising rate of the output voltage. The regulator goes through the start-up sequence as well after the EN signal is pulled to HI. Steady-State Operation When the output reaches the preset voltage, the regulator operates at steady state. Depending on the input/output conditions and component values, the inductor operates at either continuous-conduction mode or discontinuousconduction mode. In the continuous-conduction mode, the inductor current is a triangular waveform and LX voltage a pulse waveform. In the discontinuous-conduction mode, the inductor current is completely dried out before the MOSFET is turned on again. The input voltage source, the inductor, and the MOSFET and output diode parasitic capacitors forms a resonant circuit. Oscillation will occur in this period. This oscillation is normal and will not affect the regulation. FN7120.1 May 13, 2005 EL7515 At very low load, the MOSFET will skip pulses sometimes. This is normal. Current Limit The MOSFET current limit is nominally 1.4A and guaranteed 1A. This restricts the maximum output current IOMAX based on the following formula: V IN ∆I I OMAX = 1 – --------L × -------- 2 VO The inductor should be chosen to be able to handle this current. Furthermore, due to the fixed internal compensation, it is recommended that maximum inductance of 10µH and 15µH to be used in the 5V and 12V or higher output voltage, respectively. The output diode has average current of IO, and peak current the same as the inductor's peak current. Schottky diode is recommended and it should be able to handle those currents. The output voltage ripple can be calculated as: where: • ∆IL is the inductor peak-to-peak current ripple and is decided by: V IN D ∆I L = --------- × ------L FS IO × D × ESR -+I ∆V O = --------------------F S × C O LPK Where: • CO is the output capacitance. • D is the MOSFET turn-on ratio and is decided by: • The ESR is the output capacitor ESR value. V O – V IN D = ----------------------VO • FS is the switching frequency The following table gives typical values: TABLE 1. MAX CONTINUOUS OUTPUT CURRENTS Low ESR capacitors should be used to minimize the output voltage ripple. Multilayer ceramic capacitors (X5R and X7R) are preferred for the output capacitors since they have a low ESR and small packages. Tantalum capacitors also can be used, but they take more board space and have higher ESR. A minimum of 22µF output capacitor is sufficient for high output current application. For lower output current, the output capacitor can be smaller, like 4.7µF. The capacitor should always have enough voltage rating. In addition to the voltage rating, the output capacitor should also be able to handle the RMS current is given by: VIN (V) VO (V) L (µH) FS (kHz) IOMAX (mA) 2 5 10 1000 360 2 9 10 1000 190 2 12 10 1000 140 3.3 5 10 1000 600 3.3 9 10 1000 310 3.3 12 10 1000 230 Output Voltage 5 9 10 1000 470 5 12 10 1000 340 9 12 10 1000 630 12 15 10 100 670 An external resistor divider is required to divide the output voltage down to the nominal reference voltage. The current drawn by the resistor network should be limited to maintain the overall converter efficiency. The maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network less than 300kΩ is recommended. The boost converter output voltage is determined by the relationship: Component Considerations It is recommended that CIN is larger than 10µF. Theoretically, the input capacitor has ripple current of ∆IL. Due to high-frequency noise in the circuit, the input current ripple may exceed the theoretical value. Larger capacitor will reduce the ripple further. The inductor has peak and average current decided by: ∆I I LPK = I LAVG + --------L 2 I CORMS = 2 ∆I L 1 ( 1 – D ) × D + ------------------- × ------ × I LAVG 2 12 I LAVG R V OUT = V FB × 1 + ------2- R 1 where VFB slightly changes with VDD. The curve is shown in this data sheet. RC Filter The maximum voltage rating for the VDD pin is 12V and is recommended to be about 10V for maximum efficiency to drive the internal MOSFET. The series resistor R4 in the RC IO I LAVG = -----------1–D 7 FN7120.1 May 13, 2005 EL7515 filter connected to VDD can be utilized to reduce the voltage. If VO is larger than 10V, then: V O – 10 R 4 = -------------------I DD where IDD is shown in IDD vs FS curve. Otherwise, R4 can be 10Ω to 51Ω with C4 = 0.1µF. Thermal Performance The EL7515 uses a fused-lead package, which has a reduced θJA of 100°C/W on a four-layer board and 115°C/W on a two-layer board. Maximizing copper around the ground pins will improve the thermal performance. This chip also has internal thermal shut-down set at around 135°C to protect the component. Layout Considerations The layout is very important for the converter to function properly. Power Ground ( ) and Signal Ground ( ) should be separated to ensure that the high pulse current in the Power Ground never interferes with the sensitive signals connected to Signal Ground. They should only be connected at one point. The trace connected to pin 8 (FB) is the most sensitive trace. It needs to be as short as possible and in a “quiet” place, preferably between PGND or SGND traces. In addition, the bypass capacitor connected to the VDD pin needs to be as close to the pin as possible. The heat of the chip is mainly dissipated through the SGND pin. Maximizing the copper area around it is preferable. In addition, a solid ground plane is always helpful for the EMI performance. The demo board is a good example of layout based on these principles. Please refer to the EL7515 Application Brief for the layout. 8 FN7120.1 May 13, 2005 EL7515 MSOP Package Information 0.25 A C A B (N/2)+1 A2 N Gauge Plane Pin #1 I.D. Mark E L A1 0.25 3×±3× E1 DETAIL X DIMENSION TABLE 1 (N/2) Symbol B e L1 H MSOP10 A 1.10 1.10 A1 0.10 0.10 +/- 0.05 A2 0.86 0.86 +/- 0.09 3.00 3.00 +/- 0.10 4.90 4.90 +/- 0.15 3.00 3.00 +/- 0.10 L 0.55 0.55 +/- 0.15 L1 0.95 0.95 Basic b 0.33 0.23 +0.07/-0.08 c 0.18 0.18 +/- 0.05 e 0.65 0.50 Basic 10 Reference D C (1) (3) E A Seating Plane 0.10 C 0.08 b CA B c See Detail "X" N Leads Tolerance MSOP8 E1 (2) (3) N 8 MAX. Notes: Drawing #: MDP0043 Rev: C Date: 6/14/99 PACKAGE OUTLINE DRAWING MINI SO PACKAGE (MSOP) PACKAGE FAMILY Units: mm JEDEC Reg: MO-187 Semiconductor, Inc. HIGH PERFORMANCE ANA LOG INTEGRATED CIRCUITS (1) Plastic or metal protrusions of 0.15 mm maximum per side are not included. (2) Plastic interlead protrusi ons of 0.25 mm maximum per side are not included. (3) Dimensions "D" and "E1" aremeasured at Datum Plane "H". (4) Dimensioning and tolerancing per ASME Y14.5M-1994. NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at <http://www.intersil.com/design/packages/index.asp> All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 9 FN7120.1 May 13, 2005