Ordering number : ENA0973A Bi-CMOS IC LV2282VA FM Transmitter IC with Stereo Modulation Overview The LV2282VA is an FM Transmitter IC. MPX block makes stereo modulated, composite signal from L and R sound inputs. RF VCO include FM modulation function. Audio AGC function keeps FM modulation well regulated. PLL synthesizer determines RF output frequency with I2C or 3-bit parallel control (selectable). Application • Portable Memory Player • Portable HDD Player • Wireless Headphone Features • (Audio) • (MPX) • (RF) • (PLL) AGC amplifier Pilot tone system stereo modulation, audio attenuation VCO, driver amplifier 70 to 110MHz, 100kHz step available, I2C bus control, 3-bit parallel control Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Pin 4, 11, 15 Unit Maximum supply voltage VCC max 5.0 Maximum input voltage VIN max VCC+0.3 V Minimum input voltage VIN min -0.3 V Allowable power dissipation Pd max 500 mW Ta ≤ 85°C, Mounted on a specified board* V Operating temperature Topr -40 to +85 °C Storage temperature Tstg -55 to +150 °C * Specified board : 114.3mm×76.1mm×1.6mm, glass epoxy circuit board. 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D2607 MS 20071211-S00001 / D1207 MS PC No.A0973-1/10 LV2282VA Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Recommended supply voltage VCC Pin 4, 11, 15 3.3 V Operating supply voltage range VCC op Pin 4, 11, 15 2.6 to 4.0 V AC Characteristics Ta = 25°C, VCC = 3.3V, I2C bits = Default state, L and R input = 1kHz, 20mVrms, unless otherwise noted Parameter Symbol Ratings Conditions min Circuit current ICC No input signal, Pin 4, 11, 12, 15 current Standby current ISTB No input signal, I2C bit “STB” = “1”, typ Unit max 10 15 mA 10 µA Pin 4, 11, 12, 15 current Audio and MPX Blocks Parameter Symbol Ratings Conditions min Maximum audio input typ Unit max VA max Pin 1 and 24 input Audio input frequency FAF Pin 1 and 24 input 20 Channel separation SEP Pin 5, composite output, L→R, R→L 20 30 Pin 5, composite output -2 0 2 Channel balance Total harmonic distortion Maximum gain AGC gain range Pilot tone output level Composite output level Audio attenuation Crystal oscillator frequency (1) CB THD 100 15k Hz dB dB 0.5 1.5 % GMAX Pin 5/Pin 1 and 24 6 9 12 dB GR Pin 5/Pin 1 and 24 9 11 13 dB PMOD Pin 5, composite output mVrms I2C bits “PA1/PA0” =”01” MPXOUT ATT I2C bit “ATT” = “1” FXOSC (1) Pin 21 and Pin 22 2 4 6 mVrms 19 30 48 mVrms 25 dB 76 kHz RF Blocks Parameter Symbol Ratings Conditions min typ Unit max RF output (1) RFOUT (1) f = 90MHz, Pin 12 output 109 112 115 dBµV RF output (2) RFOUT (2) f = 90MHz, Pin 14 output 97 100 103 dBµV RF frequency FRF 100kHz step 70 110 MHz PLL Blocks Parameter Symbol Ratings Conditions min typ Unit max I2C input “High” voltage VH 0.8VCC VCC+0.3 V I2C input “Low” voltage VL -0.3 0.2VCC V 70 110 MHz 88.1 90.9 MHz RF input frequency 1 FPLL1 With I2C 11bit Step = 100kHz, See table 1 RF input frequency 2 FPLL2 With 3bit Parallel Step = 400kHz, See table 3 Crystal oscillator frequency (2) CP output current FXOSC (2) ICP Pin 17 16 MHz CP voltage = 1.65V 30 µA No.A0973-2/10 LV2282VA Package Dimensions unit : mm (typ) 3287 6.5 24 0.5 6.4 4.4 13 12 1 0.5 0.15 0.22 0.1 (1.3) 1.5max (0.5) SANYO : SSOP24(225mil) Pin Assignment L-INPUT 1 24 R-INPUT LEVEL DET 2 23 REF S/P CTRL 3 22 76K OSC IN MPX VCC 4 21 76K OSC OUT COMPOSITE OUT 5 20 AS/D2 GND 6 19 SDA/D1 CP OUT 7 18 SCL/D0 GND 8 17 XTAL GND 9 16 GND VCO 10 RF VCC 11 RF OUT (C) 12 15 PLL VCC 14 REF OUT (E) 13 GND No.A0973-3/10 LV2282VA R-INPUT REF 76K OSC IN 76K OSC OUT AS/D2 SDA/D1 SCL/D0 XTAL GND PLL VCC RF OUT (E) GND Block Diagram 24 23 22 21 20 19 18 17 16 15 14 13 Regulator X'tal OSC X'tal OSC Shift Register 1/2 1/160 MPX 1/2 ATT LEVEL DET Phase DET P-Counter VCO 10 Driver Amp 4 5 6 7 8 9 LEVEL DET S/P CTRL MPX VCC COMPOSITE OUT GND CP OUT GND GND SDA SCL 11 12 RF OUT (C) 3 RF VCC 2 VCO 1 L-INPUT Charge Pump 1µF 24 23 76KHz 22 21 1 2 3 16MHz RF OUT (E) VCC PLL VCC 3.3kΩ 33kΩ D0 24kΩ 100nF b R-INPUT + 33kΩ AS/D2 SW1 a 3.3kΩ 33kΩ D1 AC Testing Circuit SW7 a 24Ω 100nF 0Ω b 51Ω 1nF 20 19 18 17 16 15 14 13 5 6 7 8 9 10 11 12 SG INPUT 1µF a R-OUT L-OUT Stereo DEC 100nF 240Ω RF OUT (C) SW4 b 270nH COMP-OUT 100nF MPX VCC b 33kΩ SW3 a 4 S/P CTRL b R-INPUT + 1µF VAGC SW2 a RF VCC 100nF SW5 SW6 No.A0973-4/10 LV2282VA Pin Description Pin No. 1 Pin Name L-INPUT DC Voltage Description (V) 2.8 Left channel input. AC coupling capacitance is required. Equivalent Circuit 4 10kΩ 10kΩ 1 24 6 2 LEVEL DET - For AGC time constant. Capacitance is required. 4 1MΩ 2 6 3 S/P CTRL - Connect to GND for serial (I2C) data input. 4 Connect to VCC for parallel data input. 3 CMOS Logic Input 6 4 MPX VCC 3.3 VCC for Audio frequency and MPX 5 COMPOSITE 1.7 Stereo modulated output. Blocks. 4 OUT 5 6 6 GND 0 7 CP OUT - Charge pump current output. 11 30µA 7 30µA 8 Continued on next page. No.A0973-5/10 LV2282VA Continued from preceding page. Pin No. Pin Name DC Voltage Description (V) 8 GND 9 GND 0 10 VCO 2.8 Equivalent Circuit 0 Transistor BASE terminal for Colpitz oscillator. 11 10 9 11 RF VCC 3.3 VCC for RF blocks. 12 RF OUT (C) 3.3 Collector output. 11 12 14 13 13 GND 14 RF OUT (E) 2.0 0 Emitter follower output. 15 PLL VCC 3.3 VCC for digital blocks. 16 GND 0 17 XTAL 1.5 16MHz Crystal is needed for PLL reference frequency. See Pin 12. 15 17 16 18 SCL/D0 - I2C clock input / Parallel LSB input. 15 CMOS Logic Input 18 16 19 SDA/D1 - I2C data input / Parallel input. 15 19 CMOS Logic Input 16 Continued on next page. No.A0973-6/10 LV2282VA Continued from preceding page. Pin No. 20 Pin Name AS/D2 DC Voltage Description (V) - Equivalent Circuit I2C address selection (1bit)/Parallel MSB input. 15 20 CMOS Logic Input 16 21 76K OSC 0.8 OUT For stereo modulator pilot signal and sub carrier. 76kHz crystal should be 15 connected between Pin 21 and Pin 22 21 1kΩ 1MΩ 22 1kΩ 16 22 76K OSC IN 0.7 23 REF 1.2 See Pin 21 See Pin 21 AC decoupling capacitance is required. External 24kΩ makes internal regulated 4 current. 22 6 24 R-INPUT 2.8 Right channel audio input. AC coupling See Pin 1 capacitance is required. No.A0973-7/10 LV2282VA PLL Control by I2C Bus The PLL block requires 3 bytes of I2C input as indicated below. Table 1. I2C Bus Write Data Format Name Bit Byte ACK MSB (1) Address Byte 1 Control Byte 1 2 Control Byte 2 3 LSB AD7 AD6 AD5 AD4 AD3 AD2 AS R/W 1 1 0 1 0 0 1/0 0 P10 P9 P8 P7 P6 P5 P4 P3 0 1 1 0 1 1 1 0 P2 P1 P0 PA1 PA0 TS STB ATT 0 0 1 0 1 0 0 0 A A A (1) : MSB is transmitted first. Table 2. I2C Write Mode Description Bit Name AD7 – AD2 Address bit AS Address Select Description LV2282VA requires address bits. AS bit is decided by Pin 20. Connecting to VCC = “1”, to GND = “0” R/W Read/Write A Acknowledge “0” for Write mode (Write mode only). P10 – P0 Programmable counter 11 bit Programmable counter. P0 = LSB, P10 = MSB. RF Frequency = (P10×210 + P9×29 + ... P1×21 + P0) × 100kHz Default state = “01101110001” PA1 – PA0 Pilot Adjust 2 bit Pilot tone output level adjust. “PA1 PA0” is set “00” for no pilot tone (monaural mode), “01”, for minimum output, “11” for maximum output. Default state = “01” TS Test Mode For IC Testing. Set “0” for normal operation. TS for Counter testing. Default state = “0” STB Standby ATT Audio attenuator “1” for Standby mode. Default state = “0” for normal operation. “1” for Audio attenuation. Default state = “0” for normal operation. PLL Control with Parallel Data Input When Pin 3 S/P CTRL, is connected to VCC, PLL blocks requires 3 bit parallel data input as shown below. In parallel data input mode, I2C controllable function in Table 2 is always set as (PA1, PA0, TS, STB, ATT) = (0, 1, 0, 0, 0). Table 3. Parallel 3 bit Data Format State D2 (Pin 20) D1 (Pin 19) D1 (Pin 18) Frequency (MHz) 0 0 0 0 88.1 1 0 0 1 88.5 2 0 1 0 88.9 3 0 1 1 89.3 4 1 0 0 89.7 5 1 0 1 90.1 6 1 1 0 90.5 7 1 1 1 90.9 No.A0973-8/10 LV2282VA I2C Bus Operation SDA Serial I/F Bus Controller (Master) Control Byte1 Control Byte2 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Address Byte Master S 6 5 4 3 2 1 0 W MSB MSB First LV2282VA (Slave) SCL LSB MSB LSB MSB A Slave LSB A S → Start condition F A F → Stop condition A → Acknowledge Time chart tBUF tHD ; STA tSU ; DAT tSU ; STO SDA SCL Start condition tLOW tR tHD ; DAT tHIGH Stop condition tF Table 4. Timing specification Parameter Ratings Symbol min SCL clock frequency Bus free time between a STOP and START condition Hold time START condition LOW period of the SCL clock fSCL typ Unit max 100 kHz tBUF 4.7 µs tHD ; STA 4.0 µs tLOW 4.7 µs tHIGH 4.0 µs Data hold time tHD ; DAT 0.0 µs Data set-up time tSU ; DAT 250 HIGH period of the SCL clock Rise time of both SDA and SCL signals Fall time of both SDA and SCL signals Set-up time for STOP condition tR tF tSU ; STO ns 1000 300 4.0 ns ns µs I2C Bus AC Characteristics : Temp=25°C VCC = 3.3V Note : I2C Bus is a registered trademark of the Philips Co.. No.A0973-9/10 LV2282VA 23 76KHz 22 21 SCL 24 SDA R-INPUT AS Application Circuit 20 19 18 17 16 Regulator 15 14 13 X'tal OSC X'tal OSC Shift Register 1/2 1/160 MPX ATT LEVEL DET 1/2 Phase DET P-Counter VCO 8 10 Driver Amp Charge Pump 1 2 3 4 5 6 7 9 11 12 L-INPUT VCC + SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of December, 2007. Specifications and information herein are subject to change without notice. PS No.A0973-10/10