Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A http://www.semicon.panasonic.co.jp/en/ 7 A Synchronous DC-DC Step down Regulator, Power Supply in Package (VIN = 4.5 V to 28 V, VOUT = 0.6 V to 5.5 V) FEATURES DESCRIPTION High-Speed Response DC-DC Step Down Regulator Circuit that employs Hysteretic Control System Built-in inductor and capacitors Skip (discontinuous) Mode for high efficiency at light load Maximum Output Current : 7 A NN31001A is a synchronous DC-DC step down regulator (1-ch), Power Supply in Package (PSiP), which integrates a Controller IC that employs a hysteretic control system, two Power MOSFETs, an Inductor and Capacitors into a single 8.5 x 7.5 x 4.7mm QFN package. The easiness of mounting PSiP onto a Printed Circuit Board (PCB), a very small footprint and a highly reduced number of external components, offers very compact and simplified solutions for applications requiring pointof-load design. The number of external components have been reduced to only input/output capacitor, slow start capacitor and feedback resistors. Furthermore, for applications requiring an output voltage of 1.0 V / 3.3 V, the external feedback resistors can be eliminated, resulting into even a smaller footprint. The PSiP achieves efficiencies of greater than 94% with very good power dissipation capabilities. Input Voltage Range : PVIN=AVIN = 4.5 V to 28 V, Output Voltage Range : 0.6 V to 5.5 V Selectable Switching Frequency 400 kHz / 600 kHz / 800kHz Built-in Feed Back Resistors for 1.0 V / 3.3 V default settings Configurable output voltage settings using external Resistors Adjustable Soft Start Low Operating and Standby Quiescent Current Open Drain Power Good Indication for Output Over / Under Voltage Selectable Auto recovery / latch off protection system Adjustable current limit threshold Built-in Under Voltage Lockout (UVLO), Thermal Shut Down (TSD), Under Voltage Detection (UVD), APPLICATIONS Over Voltage Detection (OVD), Short Circuit Protection (SCP) High Current Distributed Power Systems such as Over Current Protection (OCP) ・DSP and FPGA Point-of-Load Applications Plastic Quad Flat Non-leaded Package Heat Slug Down ・Routers (QFN Type, Size : 8.5 mm 7.5 mm, 0.5 mm pitch) ・Industrial Equipment ・Space constrained Applications etc. SIMPLIFIED APPLICATION 100 VREG 90 PVIN EN PGOOD AVIN PRTCNT BST LX OCPCNT VREG NN31001A 1k Efficiency [%] 10µF x 2 VIN 100k MODE VFB 1.5k FSEL VOUT = 1.0V VOUTM #1.0V / 3.3V without using FB resistor VOUT SS AGND1, 2 PGND 22µF x 3 4.7nF Note : The application circuit is an example. The operation of the mass production set is not guaranteed. Sufficient evaluation and verification is required in the design of the mass production set. The Customer is fully responsible for the incorporation of the above illustrated application circuit in the design of the equipment. 80 70 VOUT=1V, Fsw=400kHz 60 VOUT=1V, Fsw=600kHz VOUT=1V, Fsw=800kHz 50 VOUT=3.3V, Fsw=600kHz VOUT=3.3V, Fsw=800kHz 40 0.01 0.1 1 7 10 IOUT [A] Condition : Vin = 12 V, VOUT Setting = 1.0 V / 3.3 V Switching Frequency = 400 / 600 / 800 kHz, Skip mode Co = 66 µF ( 22 µF x 3 ) Page 1 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A ORDERING INFORMATION Order Number Feature Package Output Supply NN31001A-BB Maximum Output Current : 7 A 57 pin HQFN Emboss Taping ABSOLUTE MAXIMUM RATINGS Parameter Symbol Rating Unit Notes Supply voltage VIN 30 V *1 Operating free-air temperature Topr – 40 to + 85 C *2 Operating junction temperature Tj – 40 to + 150 C *2 Storage temperature Tstg – 55 to + 150 C *2 Input Voltage Range VMODE,VFSEL,VOUTM,VPRTCNT VOCPCNT,VFB – 0.3 to (VREG + 0.3) V *1 *3 VEN – 0.3 to 6.0 V *1 VPGOOD – 0.3 to (VREG + 0.3) V *1 *3 VLX – 0.3 to (VIN + 0.3) V *1 *4 HBM 2 kV — Output Voltage Range ESD Notes : This product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. This rating is the maximum rating and device operating at this range is not guaranteed as it is higher than our stated recommended operating range. When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected. VIN is voltage for AVIN, PVIN. VIN = AVIN = PVIN. Do not apply external currents and voltages to any pin not specifically mentioned. *1 : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2 : Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25 C. *3 :(VREG + 0.3) V must not exceed 6 V. *4 : (VIN + 0.3) V must not exceed 30 V. Page 2 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A POWER DISSIPATION RATING Package Plastic Quad Flat Non-leaded Package Heat Slug Down (QFN Type) j-C PD (Ta = 25 C) PD (Ta = 85 C) Notes 6.7 C / W 3.49 W 1.82 W *1 5.7 C / W 5.56 W 2.89 W *2 Notes : For the actual usage, please follow the power supply voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not exceed the allowable value. *1:Glass Epoxy Substrate (4 Layers) [50 50 0.8 t (mm)] *2:Glass Epoxy Substrate (4 Layers) [50 50 1.57 t (mm)] CAUTION Although this IC has built-in ESD protection circuit, it may still sustain permanent damage if not handled properly. Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS gates. RECOMMENDED OPERATING CONDITIONS Parameter Supply voltage range Input Voltage Range Output Voltage Range Symbol Min Typ Max Unit Notes AVIN 4.5 12 28 V — PVIN 4.5 12 28 V — VMODE – 0.3 — VREG + 0.3 V *1 VFSEL – 0.3 — VREG + 0.3 V *1 VPRTCNT – 0.3 — VREG + 0.3 V *1 VEN – 0.3 — 5.0 V — VPGOOD – 0.3 — VREG + 0.3 V *1 VLX – 0.3 — VIN + 0.3 V *2 Notes : Voltage values, unless otherwise specified, are with respect to GND. GND is voltage for AGND, PGND. AGND = PGND VIN is voltage for AVIN, PVIN. VIN = AVIN = PVIN. Do not apply external currents or voltages to any pin not specifically mentioned. *1 : (VREG + 0.3) V must not exceed 6 V. *2 : (VIN + 0.3) V must not exceed 30 V. Page 3 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A ELECTRICAL CHARACTERISTICS CO = 22 µF 3, VOUT Setting = 1.0 V, VIN = AVIN = PVIN = 12 V, Switching Frequency = 600 kHz VMODE = VREG (FCCM), Ta = 25 C 2 C unless otherwise noted. Parameter Symbol Condition Limits Unit Note Min Typ Max IVDDACTN1 IOUT = 0 A, VFB = 0.620 V RFB1 = 1.0 k RFB2 = 1.5 k VMODE = 0 V, VEN = 5 V — 700 1200 µA — IVDDACTN2 VEN = 5 V , IOUT = 0 A RFB1 = 1.0 k RFB2 = 1.5 k VMODE = VREG VFSEL = OPEN — 15 23 mA — AVIN = PVIN = 12 V VEN = 0 V — 2 5 µA — Current Consumption Current Consumption at active1 (Skip mode) Current Consumption at active2 (FCCM) AVIN/PVIN Current Consumption at standby IVINSTB Logic Pin Characteristics EN pin Low-level input voltage VENL — — — 0.3 V — EN pin High-level input voltage VENH — 1.5 — 5.0 V — — 10 20 µA — VEN = 5 V EN pin leakage current ILEAKEN MODE pin Low-level input voltage VMODEL — — — VREG 0.3 V — MODE pin High-level input voltage VMODEH — VREG 0.7 — VREG V — MODE pin leakage current ILEAKMD — 12.5 25 µA — VMODE = 5 V PRTCNT pin Low-level input voltage VPRTL — — — 0.3 V — PRTCNT pin High-level input voltage VPRTH — VREG – 0.3 — — V — PRTCNT pin leakage current ILEAKPRT VEN = 5 V, VPRTCNT = 5 V — 0 2 µA — FSEL pin Low-level input voltage VFSELL — — — 0.3 V — FSEL pin High-level input voltage VFSELH — VREG – 0.3 — — V — FSEL pin High leakage current ILEAKFSH VFSEL = 5 V — 6.25 12.5 µA — FSEL pin Low leakage current ILEAKFSL VFSEL = 0 V — 6.25 12.5 µA — Page 4 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A ELECTRICAL CHARACTERISTICS (Continued) CO = 22 µF 3, VOUT Setting = 1.0 V, VIN = AVIN = PVIN = 12 V, Switching Frequency = 600 kHz VMODE = VREG (FCCM), Ta = 25 C 2 C unless otherwise noted. Parameter Symbol Condition Limits Min Typ Max Unit Note VREG Characteristics Output voltage VREGO IVREG = 5mA 5.3 5.6 5.9 V — Input voltage variation VREGLIN VREGLIN = VREG (VIN =12 V) -VREG (VIN =6 V) IVREG = 5mA — — 150 mV — Drop out voltage VREGDO VIN = 4.5 V, IVREG = 5mA 4.1 — — V — 0.594 0.600 0.606 V — VFB Characteristics — VFB comparator threshold VFBTH VFB pin leakage current 1 ILEAKFB1 VFB = 0 V –1 — 1 µA — VFB pin leakage current 2 ILEAKFB2 VFB = 6 V –1 — 1 µA — UVLO shutdown voltage VUVLODE VIN = 5 V to 0 V 3.97 4.10 4.23 V — UVLO wakeup voltage VUVLORE VIN = 0 V to 5 V 4.17 4.30 4.43 V — UVLO hysteresis VUVLO 150 200 250 mV — Under Voltage Lock Out — PGOOD PGOOD Threshold 1 (VFB ratio for UVD detect) PGOOD Hysteresis 1 (VFB ratio for UVD release) PGOOD Threshold 2 (VFB ratio for OVD detect) PGOOD Hysteresis 2 (VFB ratio for OVD release) VPGUV PGOOD : High to Low 77 85 93 % — VPGUV PGOOD : Low to High 3.5 5.0 6.5 % — VPGOV PGOOD : High to Low 107 115 123 % — VPGOV PGOOD : Low to High 3.5 5.0 6.5 % — PGOOD start up delay time ( After reached VFB = 0.6 V ) TPGD — 0.4 1.0 1.6 ms — PGOOD ON resistance RPG — — 10 15 — Page 5 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A ELECTRICAL CHARACTERISTICS (Continued) CO = 22 µF 3, VOUT Setting = 1.0 V, VIN = AVIN = PVIN = 12 V, Switching Frequency = 600 kHz VMODE = VREG (FCCM), Ta = 25 C 2 C unless otherwise noted. Parameter Symbol Condition Limits Unit Note Min Typ Max Vo1 RFB1 = 1.0 k RFB2 = 1.5 k VMODE = VREG IOUT = 3.5 A 0.985 1.000 1.015 V — Vo2 RFB1 = 4.5 k RFB2 = 1 k VMODE = VREG IOUT = 3.5 A 3.250 3.300 3.350 V — Vo3 VFB = OPEN before VEN = 0 V to 1.5 V VMODE = VREG IOUT = 3.5 A 0.985 1.000 1.015 V — Vo4 VFB = VREG before VEN = 0 V to 1.5 V VMODE = VREG IOUT = 3.5 A 3.250 3.300 3.350 V — DC-DC Characteristics Output voltage 1 Output voltage 2 Output voltage 3 Output voltage 4 Efficiency 1 VEFF1 PVIN = 12 V VOUT = 5 V, IOUT = 4 A VFSEL = VREG ( 800kHz ) — 95 — % *1 Efficiency 2 VEFF2 PVIN = 12 V VOUT = 3.3 V, IOUT = 4 A VFSEL = OPEN ( 600kHz ) — 95 — % *1 Efficiency 3 VEFF3 PVIN = 12 V VOUT = 3.3 V, IOUT = 4 A VFSEL = VREG ( 800kHz ) — 94 — % *1 Efficiency 4 VEFF4 PVIN = 12 V VOUT = 1.0 V, IOUT = 4 A VFSEL = 0 V ( 400kHz ) — 88 — % *1 Efficiency 5 VEFF5 PVIN = 12 V VOUT = 1.0 V, IOUT = 4 A VFSEL = OPEN ( 600kHz ) — 87 — % *1 Efficiency 6 VEFF6 PVIN = 12 V VOUT = 1.0 V, IOUT = 4 A VFSEL = VREG ( 800kHz ) — 85 — % *1 Note : *1 : Typical design value Page 6 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A ELECTRICAL CHARACTERISTICS (Continued) CO = 22 µF 3, VOUT Setting = 1.0 V, VIN = AVIN = PVIN = 12 V, Switching Frequency = 600 kHz VMODE = VREG (FCCM), Ta = 25 C 2 C unless otherwise noted. Parameter Symbol Condition Limits Min Typ Max Unit Note DC-DC Characteristics Note : Load regulation1 VLOA1 IOUT = 10 mA to 7 A VMODE = 0 V — 2.0 — % *1 Load regulation2 VLOA2 IOUT = 10 mA to 7 A VMODE = VREG — 1.0 — % *1 Line regulation VLIN PVIN = 6 V to 28 V VMODE = VREG IOUT = 2.0 A — 0.1 0.3 %/V — Output ripple voltage 1 VRL1 IOUT = 10 mA VMODE = 0 V — 30 — mV [p-p] *1 Output ripple voltage 2 VRL2 IOUT = 10 mA VMODE = VREG — 15 — mV [p-p] *1 Output ripple voltage 3 VRL3 IOUT = 3.5 A VMODE = VREG — 10 — mV [p-p] *1 Load transient response 1 VTR1 IOUT = 100 mA to 3.5 A t = 0.5 A / µs VMODE = 0 V or VREG — 15 — mV *1 Load transient response 2 VTR2 IOUT = 3.5 A to 100 mA t = 0.5 A / µs VMODE = 0 V or VREG — 20 — mV *1 Minimum Input and output voltage difference VDIFF VDIFF = VIN – VOUT — 2.5 — V *1 *1 : Typical design value Page 7 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A ELECTRICAL CHARACTERISTICS (Continued) CO = 22 µF 3, VOUT Setting = 1.0 V, VIN = AVIN = PVIN = 12 V, Switching Frequency = 600 kHz VMODE = VREG (FCCM), Ta = 25 C 2 C unless otherwise noted. Parameter Symbol Condition Limits Min Typ Max Unit Note Protection DC-DC Over Current Protection Limit 1 ILMT1 OCPCNT=OPEN — 9.0 — A *1 DC-DC Over Current Protection Limit 2 ILMT2 OCPCNT=220 k — 7.0 — A *1 DC-DC Over Current Protection Limit 3 ILMT3 OCPCNT=100 k — 4.7 — A *1 Thermal Shut Down (TSD) Threshold TTSDTH — — 130 — C *1 Thermal Shut Down (TSD) Hysteresis TTSDHYS — — 30 — C *1 Soft-Start Timing SS Charge Current ISSCHG VSS = 0.3 V 1 2 4 µA — SS Discharge Resistance (Shut-down) RSSDIS VEN = 0 V — 5 10 k — Switching Frequency Adjustment DC-DC Switching Frequency 1 FSW1 IOUT = 4 A, VFSEL = 0 V — 400 — kHz *1 DC-DC Switching Frequency 2 FSW2 IOUT = 4 A, VFSEL = OPEN — 600 — kHz *1 DC-DC Switching Frequency 3 FSW3 IOUT = 4 A, VFSEL = VREG — 800 — kHz *1 Note : *1 : Typical design value Page 8 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A PIN CONFIGURATION 30 31 32 LX PVIN VFB SS PGOOD OCPCNT PRTCNT VREG FSEL MODE EN AGND 39 40 41 42 43 62 AGND 61 LX 58 VOUT 59 PGND 60 PVIN PVIN 15 14 13 12 11 10 9 8 44 45 46 47 48 49 50 51 52 53 54 55 56 57 VFB AGND VOUTM PGND VOUT 7 6 5 4 3 2 1 VOUT LX_S 29 28 27 26 25 24 23 22 21 20 19 18 17 16 33 34 35 36 37 38 PGND BST AVIN AGND N.C. BST Bottom View PIN FUNCTIONS Pin No. Pin name Type VOUT Output Description 1 2 3 48 49 50 51 Output voltage pin 52 53 54 55 56 57 Note : Detailed pin descriptions are provided in the OPERATION and APPLICATION INFORMATION section. Page 9 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A PIN FUNCTIONS (Continued) Pin No. Pin name Type Description PGND Ground Ground pin for Power MOSFET * Pin No. 47 : recommended settings – no connection PVIN Power supply Power supply pin for Power MOSFET Recommended rise time ( time to reach 90 % of set value ) setting is greater than or equal to 10 µs and less than or equal to 1 s. 4 5 6 7 47 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 LX Output 23 Power MOSFET output pin An inductor is connected and switching operation is carried out between VIN and GND. * Pin No. 19 to 25 : recommended settings – no connection 24 25 26 27 Output Power MOSFET output sense pin * Pin No. 26 to 27 : recommended settings – no connection BST Output High side Power MOSFET gate driver pin Bootstrap operation is carried out in order to drive the gate voltage of High side Power MOSFET. * Pin No. 28 to 30 : recommended settings – no connection NC - AGND Ground LX_S 28 29 30 31 Non Connection pin 32 39 Ground pin 45 33 AVIN 34 EN Power supply pin Power supply Recommended rise time ( time to reach 90 % of set value ) setting is greater than or equal to 10 µs and less than or equal to 1 s. Input ON / OFF control pin DC-DC is stopped at Low level input, and it is started at High level input. Note : Detailed pin descriptions are provided in the OPERATION and APPLICATION INFORMATION section. Page 10 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A PIN FUNCTIONS (Continued) Pin No. Pin name Type Description Input Frequency select pin This is set to 400 kHz at Low level input, 800 kHz at High level input, and 600 kHz at open. MODE Input Skip (discontinuous) mode / FCCM (Forced Continuous Conduction Mode) select pin Skip mode is set at Low level input, FCCM is set at High level input. 37 PRTCNT Input Protection Control Set pin for Latch mode / Auto recovery mode during OVD / SCP operations 38 VREG Output 40 OCPCNT Input 41 PGOOD Output Power good open drain pin A pull up resistor between PGOOD and VREG terminal is necessary. Output is low during Over or Under Voltage Detection conditions. Output Soft start capacitor connect pin The output voltage at a start up is smoothly controlled by adjusting Soft Start time. Please connect capacitor between SS and GND. 35 FSEL 36 42 SS LDO output pin This is Output pin of Power supply (LDO) for internal control circuit. Programmable over-current protection. Connected resistor on this pin will adjust the over-current protection threshold. VFB Input Comparator negative input pin / 1.0 V, 3.3 V output voltage select pin VFB terminal voltage is regulated to REF output (internal reference voltage). Since VFB is a high impedance terminal, it should not be routed near other noisy path (LX, BST, etc.) Routing path should be kept as short as possible. 46 VOUTM Input Output voltage sense pin Switching frequency is controlled by monitoring output voltage. This pin is also used as Feedback pin during internal feedback function. 58 VOUT Output Voltage output pin for heat radiation 59 PGND Ground Ground pin of Power MOSFET for heat radiation 60 PVIN Power supply Power supply pin for heat radiation 61 LX Output Power MOSFET output pin for heat radiation 62 AGND Ground Ground pin for heat radiation 43 44 Note : Detailed pin descriptions are provided in the OPERATION and APPLICATION INFORMATION section. Page 11 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A FUNCTIONAL BLOCK DIAGRAM AVIN SS 33 42 EN 34 VBG BGR VINT SS Soft-Start 41 PGOOD 0.6 V + 15 % VREG 38 VREG 5.6 V For internal power 0.6 V – 15 % 8, 9, 10 11, 12, 13 14, 15, 16 17, 18, 60 VREG UVLO For internal reset release OCP UVLO VOUTM 46 PVIN TSD SCP 1.0V / 3.3V Divider/Selector 28, 29, 30 BST Fault HPD HGATE 19, 20, 21 22, 23, 24 25, 61 LX 43, 44 VFB Soft Start VREG FSEL 35 MODE 36 AVIN VREF Ton Timer + Comp OCPCNT 40 26, 27 LX_S HGO Lo 0.6 V Toff Timer + Comp ON CMP 1, 2, 3 48, 49, 50 51, 52, 53 54, 55, 56 57, 58 LGATE Control Logic LPD VOUT PGND LGO FCCM / Skip 37 PRTCNT REF 4, 5, 6 7, 47, 59 Protect control OCP threshold control 32, 39, 45, 62 AGND 31 N.C. Note : This block diagram is for explaining functions. Part of the block diagram may be omitted, or it may be simplified. Page 12 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A OPERATION 1. Protection (1) Output Over-Current Protection (OCP) function And Short-Circuit Protection (SCP) function 1) The Over Current Protection is activated at about 9 A (Typ.) when OCPCNT pin is set to open. This device uses pulse – by – pulse valley current protection method. When the low side MOSFET is turned on, the voltage across the drain and source is monitored which is proportional to the inductor current. The high side MOSFET is only allowed to turn on when the current flowing in the low side MOSFET falls below the OCP level. Hence, during the OCP, the output voltage continues to drop at the specified current. Output Voltage [V] Over Current Protection ( typ : 9 A ) #OCPCNT = OPEN 7.3 A to 10.7 A 1) 2) (Ground short protection Detection about 60 % of Vout ) 3) The Short-Circuit Protection function is implemented when the output voltage decreases and the VFB pin reaches to about 60 % of the set voltage of 0.6 V. If the VFB voltage stays below 70 % of 0.6 V for more than 250 µs after SCP triggers, both high side and low side MOSFET will be turned off and the output will be discharged by internal MOS transistor. (The above operation after SCP triggered is at latch off mode. The details are described in the next page) (2) Output Over Voltage Detection If the VFB pin voltage exceeds 115 % of a predetermined value (0.6 V) and lasts more than 10ns, overvoltage detection will be triggered and PGOOD pin will be pulled down. Furthermore, in an overvoltage condition, high side and low side MOSFETs are turned off to stop PWM operation. If the VFB pin voltage drops below 110 % of the predetermined value (0.6 V) within 2 ms after overvoltage detection triggers, PGOOD pin will be pulled up again and PWM operation will resume. Otherwise, IC is transferred to latch off state and the output will be discharged by internal MOS transistor. (The above operation after OVD triggered is at latch off mode. The details are described in the next page) VFB Output current [A] Figure : OCP and SCP Operation Note: PRTCNT = VREG ( SCP latch off mode ) 2) The Over Current Protection threshold level can be programmed by connecting a pull down resistor at OCPCNT pin. The value of the resistor connected between OCPCNT pin and ground will determine the OCP threshold level. 115 % 110 % 100 % 0.6 V 0.6 V <2 ms >2 ms PGOOD 1 ms Note: The OCP level is fixed to around 0.7 A when OCPCNT pin is connected to Ground. OCP level ( typ ) OCPCNT resistor 9A OPEN ( more than 1M ) 7A 220 k 4.7 A 100 k Table : OCP threshold level The accuracy of OCP level is around 20 % of the typical value in the above table. OCP level with resistor at OCPCNT pin ( ROCP ) can be calculated by the following approximate equation. OCP levelA 9 435 ROCP k Figure : OVD Operation Note: PRTCNT = VREG ( OVD latch off mode ) (3) Output discharging function When EN is low, the output is discharged by an internal MOSFET transistor. When EN is high, if the controller is turned off either by Under Voltage Lock Out (UVLO), Over Voltage Detection (OVD) or Short Circuit Protection (SCP), the output is discharged by an internal MOSFET transistor. The ON-resistance of the internal MOSFET transistor is about 35 . Note: ROCP is recommended to be more than 100 k. Page 13 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A OPERATION (Continued) 1. Protection (Continued) (4) Protection control (PRTCNT) function The IC turn-off operation after Over Voltage Detection and Short Circuit Protection can be programmed by PRTCNT pin voltage. Changing the input level of PRTCNT will select Latch off and Auto recovery mode for OVD and SCP operations. The following table and figures represents detailed explanation of this function. After latch off detection, power reset or EN pin reset is necessary to activate the device again. PRTCNT OVD operation L OPEN Latch off SS DCDC state OFF ON ON OFF ON / OFF is repeated Note : SS = Soft start time Auto recovery Figure : SCP Operation1 PRTCNT = L / OPEN : Auto recovery case Latch off Switching stop 250 µs VFB < 250 µs Switching stop Switching 0.6 V 2ms 16ms SCP operation Table : PRTCNT pin threshold level and protection mode 115 % 110 % 100 % 2ms <2ms 70 % 60 % Auto recovery VREG VFB VFB Switching 70 % 60 % 0.6 V >2 ms DCDC state DCDC state ON 1 ms 1 ms PGOOD ON OFF ( Latch off ) Figure : SCP Operation2 PRTCNT = VREG : Latch off case Figure : OVD Operation1 PRTCNT = L : Auto recovery case VFB 115 % 110 % 100 % Switching stop Switching stop Switching 0.6 V 0.6 V <2 ms ON DCDC state 2 ms OFF ( Latch off ) 1 ms PGOOD Figure : OVD Operation2 PRTCNT = OPEN / VREG : Latch off case Page 14 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A OPERATION (Continued) 1. Protection (Continued) 2. Pin Setting (5) Output Under Voltage Detection (UVD) During normal operation, if output voltage drops and VFB pin voltage reaches 85 % of its set value (0.6 V), the internal MOSFET connected to PGOOD pin, will turn on and the voltage of PGOOD will be set to low. If the output voltage returns to 90 % of its set value (0.6 V) prior to triggering short-circuit-protection, the MOSFET connected to PGOOD pin will turn off and PGOOD voltage will become high again after 1 ms delay. (1) Operating MODE Setting The IC can operate at two different modes : Skip (discontinuous) mode and Forced Continuous Conduction Mode (FCCM). In Skip mode, the IC is working under pulse skipping mechanism to improve efficiency at light load condition. In FCCM, the IC is working at fixed frequency to avoid EMI issues. The operating mode can be set by MODE pin as follows. VFB 90 % 85 % 0.6 V 1 ms PGOOD Figure : UVD Operation (6) Thermal Shut Down (TSD) When the IC internal temperature becomes more than about 130 C, TSD operates and DC-DC turns off. MODE pin Mode L Skip mode VREG FCCM (2) Switching Frequency Setting The IC can operate at three different frequencies : 400 kHz, 600kHz and 800 kHz. The Switching Frequency can be set by FSEL pin as indicated in the table below. FSEL pin Frequency [kHz] L 400 OPEN 600 VREG 800 Inductor current amplitude is calculated by the following equation ; Inductor Current AmplitudeA VOUT VIN VOUT 1000 VIN Fsw kHz At VIN = 12 V, the recommended settings for the switching frequency, depending on VOUT is as follows : VOUT = 1.0V : 400, 600, 800 kHz VOUT = 1.8V : 400, 600, 800 kHz VOUT = 3.3V : 600, 800 kHz VOUT = 5.0V : 800 kHz Page 15 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A OPERATION (Continued) 3. Output Voltage Setting (1) Output Voltage setting by external resistor The Output Voltage can be set by external resistance of FB pin, and its calculation is as follows. Below resistors are recommended for following popular output voltage VOUT (2) Built-in Feed Back Resistors for 1.0 V / 3.3 V NN31001A has built-in feedback resistors for 1.0 V and 3.3 V output voltage. When the UVLO delay (internal) signal changes from Low to High (UVLO release), depending on the state of FB pin, the output voltage can be configured as follows : RFB1 Vout = ( 1 + RFB1 RFB2 ) 0.6 Table : Output voltage setting VFB ( 0.6 V ) RFB2 VOUT [V] RFB1 [] RFB2 [] 5.0 11 k 1.5 k 3.3 4.5 k 1k 1.8 2k 1k 1.2 1k 1k 1.0 1k 1.5 k VFB comparator threshold is adjusted to 1 %, but the actual output voltage accuracy becomes more than 1 % due to the influence from the circuits other than VFB comparator. In the case of VOUT Setting = 1.0 V, the actual output voltage accuracy becomes 1.5 %. ( VIN = 12 V, IOUT = 3.5 A, Fsw = 600 kHz, FCCM ). VFB voltage [V] Output voltage [V] VREG 3.3 V OPEN 1.0 V Resistor divider Adjustable between 0.6 V and 5.5 V EN 4.3 V VREG UVLO 60µs UVLO DELAY VREG OPEN VFB 0.6V 3.3V 1.0V 0.6V to 5.5V using External Resistors VOUT Figure : Timing chart of output voltage setting Page 16 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A OPERATION (Continued) 4. Soft Start Setting Soft Start function maintains the smooth control of the output voltage during start up by adjusting soft start time. When the EN pin becomes High, the current (2 µA) begin to charge toward the external capacitor (Css) of SS pin, and the voltage of SS pin increases straightly. Because the voltage of VFB pin is controlled by the voltage of SS pin during start up, the voltage of VFB increase straightly to the regulation voltage (0.6 V) together with the voltage of SS pin and keep the regulation voltage after that. On the other hand, the voltage of SS pin increase to about 2.8 V and keep the voltage. The calculation of Soft Start Time is as follows. Soft Start Time( s ) 0.6 Css 2 When Css is set at 4.7nF, soft-start time is Approximately 1.5ms in 1.0V setting. EN VREG 4.3 V UVLO Soft Start Time (s) SS 0.6 V VFB 70 µs VOUT Figure : Soft Start Operation Page 17 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A OPERATION (Continued) 5. Start Up / Shut Down Settings The Start up / Shut down is enabled by the EN pin. The EN pin can be set by either applying voltage from an external voltage source or through a resistor connected to the AVIN pin. Case 1 : Setting up the EN pin using an external voltage source. When an external voltage source is used, the EN pin input voltage (VENH, VENL) should satisfy the conditions as defined in the electrical characteristics. AVIN more than 1.5 V VREG AVIN VREG AVIN REN1 EN 500 REN2 : 500 k 50 % (Minimum 250 k) Vd : 5.7 V 0.3 V Id : less than 100 µA EN Figure : Internal circuit with EN pin 0V Figure : Internal circuit with EN pin Case 2 : Setting up the EN pin through a resistor connected to AVIN pin. When setting up the EN pin through a resistor connected to the AVIN pin, refer to the following equation to calculate the optimal resistor settings. [Equation] AVIN – VdMIN < REN1 < Id REN1 AVIN VdMIN Id VENH REN2MIN (AVIN – VENH) REN2MIN VENH : pull up resistor of EN pin : input voltage : minimum internal zener diode voltage ( 5.4 V ) : internal zener diode current (100 µA ) : EN pin high level input voltage ( 1.5 V to 5 V ) : minimum pull down resistor ( 250 k ) [Example ( AVIN = 12 V, VENH = 5 V )] 66 k < REN1 < 350 k Page 18 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES 1. Output Ripple Voltage Condition : VIN = 12 V, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, FCCM, CO = 66 µF (22 µF x 3) IOUT = 0 A IOUT = 0.1 A LX (5 V/div) LX (5 V/div) VOUT (50 mV/div) VOUT (50 mV/div) TIME (1 µs/div) TIME (1 µs/div) IOUT = 3 A IOUT = 7 A LX (5 V/div) LX (5 V/div) VOUT (50 mV/div) VOUT (50 mV/div) TIME (1 µs/div) TIME (1 µs/div) Page 19 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES (Continued) 1. Output Ripple Voltage (Continued) Condition : VIN = 12 V, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, Skip mode, CO = 66 µF (22 µF x 3) IOUT = 0 A IOUT = 0.1 A LX (5 V/div) LX (5 V/div) VOUT (50 mV/div) VOUT (50 mV/div) TIME (10 µs/div) TIME (2 ms/div) IOUT = 3 A IOUT = 7 A LX (5 V/div) LX (5 V/div) VOUT (50 mV/div) VOUT (50 mV/div) TIME (1 µs/div) TIME (1 µs/div) Page 20 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES (Continued) 2. Load Transient Response Condition : VIN = 12 V, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, FCCM, CO = 66 µF (22 µF x 3), IOUT = 0.1 A to 3.5 A ( 0.5 A / µs ) 19 mV VOUT (50 mV/div) 15 mV IOUT (2 A/div) TIME (100 µs/div) Condition : VIN = 12 V, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, Skip mode, CO = 66 µF (22 µF x 3), IOUT = 0.1 A to 3.5 A ( 0.5 A / µs ) 21 mV VOUT (50 mV/div) 13 mV IOUT (2 A/div) TIME (100 µs/div) Page 21 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES 3. Efficiency Condition : VIN = 12 V, VOUT Setting = 1.0 V, Switching Frequency = 400 / 600 / 800 kHz, FCCM / Skip mode, CO = 66 µF (22 µF x 3) Efficiency Curve 100 Efficiency [%] 90 80 70 FCCM, Fsw=400kHz FCCM, Fsw=600kHz FCCM, Fsw=800kHz Skip, Fsw=400kHz Skip, Fsw=600kHz Skip, Fsw=800kHz 60 50 40 0.01 0.1 1 7 10 IOUT [A] Condition : VIN = 12 V, VOUT Setting = 3.3 V, Switching Frequency = 600 / 800 kHz, FCCM / Skip mode, CO = 66 µF (22 µF x 3) Efficiency Curve 100 Efficiency [%] 90 80 70 FCCM, Fsw=600kHz 60 FCCM, Fsw=800kHz Skip, Fsw=600kHz 50 Skip, Fsw=800kHz 40 0.01 0.1 1 7 10 IOUT [A] Page 22 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES (Continued) 4. Load Regulation Condition : VIN = 12 V, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, FCCM, CO = 66 µF (22 µF x 3) Load Regulation FCCM 1.10 VOUT [V] 1.05 1.00 0.95 0.90 0 1 2 3 4 5 6 7 IOUT [A] Condition : VIN = 12 V, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, Skip mode, CO = 66 µF (22 µF x 3) Load Regulation Skip Mode 1.10 VOUT [V] 1.05 1.00 0.95 0.90 0 1 2 3 4 5 6 7 IOUT [A] Page 23 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES (Continued) 5. Line Regulation Condition : IOUT = 2 A, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, FCCM, CO = 66 µF (22 µF x 3) Line Regulation FCCM Condition : IOUT = 2 A, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, Skip mode, CO = 66 µF (22 µF x 3) Line Regulation Skip Mode Page 24 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES (Continued) 6. Start-up Condition : VIN = 12 V, VOUT Setting = 1.0 V, IOUT = 0 A, Switching Frequency = 600 kHz, FCCM, CO = 66 µF (22 µF x 3) EN = High to Low EN = Low to High EN (2 V/div) EN (2 V/div) SS (2 V/div) SS (2 V/div) VOUT (0.5 V/div) VOUT (0.5 V/div) TIME (10 ms/div) TIME (10 ms/div) Page 25 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES (Continued) 7. Switching Frequency Condition : VIN = 12 V, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, FCCM, CO = 66 µF (22 µF x 3) Switching Frequency FCCM 7 Condition : VIN = 12 V, VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, Skip mode, CO = 66 µF (22 µF x 3) Switching Frequency Skip Mode 7 Page 26 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES (Continued) 8. Thermal Performance Condition : VIN = 12 V, VOUT Setting = 1.0 V, IOUT = 7 A, Switching Frequency = 600 kHz, FCCM, CO = 66 µF (22 µF x 3) Page 27 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A TYPICAL CHARACTERISTICS CURVES (Continued) 9. Derating Curve Condition : VIN = 12 V, VOUT Setting = 1.0 / 3.3 / 5.0 V, Switching Frequency = 600 / 800 kHz, FCCM, CO = 66 µF (22 µF x 3), Air flow = 0 LFM 10 8 Iout(A) 6 4 VOUT=5.0V, Fsw=800kHz VOUT=3.3V, Fsw=800kHz VOUT=1.0V, Fsw=600kHz 2 0 0 10 20 30 40 50 60 70 80 90 100 Ta(℃) Page 28 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A APPLICATIONS INFORMATION 1. Evaluation Board Information C-DCDCOUT3 GND C-DCDCOUT2 VIN C-DCDCOUT1 Condition : VOUT Setting = 1.0 V, Switching Frequency = 600 kHz, FCCM C-PVIN1 C-PVIN2 VOUT R-FB1 2 R-PG R-FB3,4 C-SS VREG Figure Application circuit Figure Layout Figure Top Layer with silk screen ( Top View ) with Evaluation board Figure Bottom Layer with silk screen ( Bottom View ) with Evaluation board Note : The application circuit diagram and layout diagram explained in this section, should be used as reference examples. The operation of the mass production set is not guaranteed. Sufficient evaluation and verification is required in the design of the mass production set. The Customer is fully responsible for the incorporation of the above illustrated application circuit and the information attached with it, in the design of the equipment. Page 29 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A APPLICATIONS INFORMATION (Continued) 2. Layout Recommendations Board layout considerations are needed for stable operation of the DC-DC regulator. It is recommended to follow the below notes of caution when designing the board layout. (a) The Input capacitor CIN is recommended to be placed in such a way that the loop (1) in the right figure becomes minimum in order to suppress the switching noise. (b) A single point ground connection (2) is recommended for the connection of PGND and AGND to improve operation stability. (c) Output current line IOUT and the output sense line VOUTM is recommended to have small common impedance to reduce output load variations. Output sense line VOUTM must be close to the output capacitor CO as indicated by (3) in the right figure. (d) Power Loss and output ripple voltage can be reduced by placing the output capacitor CO so that the parasitic inductance and the impedance of loop (4) in the right figure becomes minimum. This is achieved by reducing the distance between output capacitor CO and (2) / (3). (e) Thick lines in the right figure represent lines with large current flow. These lines should be designed as thick as possible. (f) VFB / SS / VREG lines should be placed far away from LX, BST pins to reduce the influence of switching noise. These lines should be designed as short as possible. This is especially true for the VFB line, which is a high impedance line. (g) RFB1 / RFB2 should also be placed as far away as possible from LX, BST pins to minimize the influence of switching noise. RFB1 / RFB2 should be placed close to the VFB pin. AVIN (1) PVIN VOUTM (3) RFB1 IOUT VFB VOUT RFB2 AGND PGND CIN CO (4) (2) Figure : Application circuit diagram Note : The application circuit diagram and layout diagram explained in this section, should be used as reference examples. The operation of the mass production set is not guaranteed. Sufficient evaluation and verification is required in the design of the mass production set. The Customer is fully responsible for the incorporation of the above illustrated application circuit and the information attached with it, in the design of the equipment. Page 30 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A APPLICATIONS INFORMATION (Continued) 3. Recommended Components Reference Designator QTY Value Manufacturer Part Number Note C-PVIN1 C-PVIN2 2 10 µF TAIYO YUDEN UMK325AB7106MM-T — C-DCDCOUT1 C-DCDCOUT2 C-DCDCOUT3 3 22 µF Murata GRM32ER71E226KE15L — C-SS 1 4.7 nF Murata GRM188R71H472KA01 — R-FB1 1 0 Panasonic ERJ3GEY0R00V — R-FB2 1 1 k Panasonic ERJ3EKF1001V — R-RB3 1 1.5 k Panasonic ERJ3EKF1501V — R-FB4 1 0 Panasonic ERJ3GEY0R00V — R-PG 1 100 k Panasonic ERJ3EKF1003V — Note : The above feedback resistor setting is for VOUT = 1 V. Page 31 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A PACKAGE INFORMATION Outline Drawing Package Code : HQFN057-A-075085 Unit : mm Page 32 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Product Standards NN31001A IMPORTANT NOTICE 1. When using the IC for new models, verify the safety including the long-term reliability for each product. 2. When the application system is designed by using this IC, please confirm the notes in this book. Please read the notes to descriptions and the usage notes in the book. 3. This IC is intended to be used for general electronic equipment. Consult our sales staff in advance for information on the following applications: Special applications in which exceptional quality and reliability are required, or if the failure or malfunction of this IC may directly jeopardize life or harm the human body. Any applications other than the standard applications intended. (1) Space appliance (such as artificial satellite, and rocket) (2) Traffic control equipment (such as for automotive, airplane, train, and ship) (3) Medical equipment for life support (4) Submarine transponder (5) Control equipment for power plant (6) Disaster prevention and security device (7) Weapon (8) Others : Applications of which reliability equivalent to (1) to (7) is required Our company shall not be held responsible for any damage incurred as a result of or in connection with the IC being used for any special application, unless our company agrees to the use of such special application. However, for the IC which we designate as products for automotive use, it is possible to be used for automotive. 4. This IC is neither designed nor intended for use in automotive applications or environments unless the IC is designated by our company to be used in automotive applications. Our company shall not be held responsible for any damage incurred by customers or any third party as a result of or in connection with the IC being used in automotive application, unless our company agrees to such application in this book. 5. Please use this IC in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Our company shall not be held responsible for any damage incurred as a result of our IC being used by our customers, not complying with the applicable laws and regulations. 6. Pay attention to the direction of the IC. When mounting it in the wrong direction onto the PCB (printed-circuit-board), it might be damaged. 7. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. In addition, refer to the Pin Description for the pin configuration. 8. Perform visual inspection on the PCB before applying power, otherwise damage might happen due to problems such as solder-bridge between the pins of the IC. Also, perform full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the IC during transportation. 9. Take notice in the use of this IC that it might be damaged when an abnormal state occurs such as output pin-VCC short (Power supply fault), output pin-GND short (Ground fault), or output-to-output-pin short (load short). Safety measures such as installation of fuses are recommended because the extent of the above-mentioned damage will depend on the current capability of the power supply. 10. The protection circuit is for maintaining safety against abnormal operation. Therefore, the protection circuit should not work during normal operation. Especially for the thermal protection circuit, if the area of safe operation or the absolute maximum rating is momentarily exceeded due to output pin to VCC short (Power supply fault), or output pin to GND short (Ground fault), the IC might be damaged before the thermal protection circuit could operate. 11. Unless specified in the product specifications, make sure that negative voltage or excessive voltage are not applied to the pins because the IC might be damaged, which could happen due to negative voltage or excessive voltage generated during the ON and OFF timing when the inductive load of a motor coil or actuator coils of optical pick-up is being driven. 12. Product which has specified ASO (Area of Safe Operation) should be operated in ASO 13. Verify the risks which might be caused by the malfunctions of external components. 14. Connect the metallic plates (fins) on the back side of the IC with their respective potentials (AGND, PVIN, LX, VOUT, PGND). The thermal resistance and the electrical characteristics are guaranteed only when the metallic plates (fins) are connected with their respective potentials. Page 33 of 33 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Recommended Soldering Conditions NN31001A Product name : NN31001A Package : HQFN057-A-075085 1． Recommended Soldering Conditions For the following soldering conditions, it shows the limitations of heat resistance at mounting a device and it is no guarantee of the soldering reliability. Please set the appropriate condition suitable for the materials such as solder material. ① Reflow soldering max. 260 ℃ Reflow peak temp : 260 240 220 200 180 160 140 No． mark tp ℃ t1 value 1 T1 Pre-heating temp. 150 ℃～180 ℃ 255 ℃ 2 ｔ１ Pre-heating temp. hold time 60 s ～120 s 3 a Rising rate 2 ℃/s ～5 ℃/s 4 Tp Peak temp. 255 ℃+5 ℃､-0 ℃ 5 tp Peak temp. hold time 10 s±3 s 6 tw High temp. region hold time within 60 s (≧220 ℃) 7 b Down rate 2 ℃/s ～5 ℃/s 8 - Number of reflow within 2 times 220 ℃ a T1 contents Tp 260 ℃ b tw Time ＊Peak temperature : less than 260 ℃ ＊Temperature is measured at package surface point Page 1 of 2 Established : 2014-07-03 Revised : 2014-07-08 Doc No. TA4-EA-06262 Revision. 2 Recommended Soldering Conditions NN31001A 2． Storage environment after dry pack opening Open dry pack Storage environment kept up to soldering (at 30 ℃/70 %RH max. , within 168 h) Bake at 125 ℃ with 15 h to 25 h *Please refer to the following when doing at the low temperature bake. Soldering When the storage time exceeds 168 h ※ Because the taping and the magazine materials are not the heat-resistant materials, the bake at 125℃ cannot be done. Therefore, please solder everything or control everything in the rule time. Please keep them in an equal environment with the moisture-proof packaging or dry box. To control storage time, when bake in the taping and the magazine is necessary, it is necessary for each type to set a bake condition. Please inquire of our company. ☆ Low temperature bake condition : 40℃ / 25％ RH or less / 192h 3． Note ① Storage environment conditions: keep the following conditions Ta=5 ℃～30 ℃､RH=30 %～70 %. ② Storage period before opening dry pack shall be 1year from a shipping day under Ta=5 ℃～30 ℃､ RH=30 %～70 %. When the storage exceeds, Bake at 125 ℃ with 15 h to 25 h. ③ Baking cycle should be only one time. Please be cautious of solderability at baking. ④ In case that use reflow two times, 2nd reflow must be finished within 168 hours. ⑤ Remove flux sufficiently from product in the washing process. ( Flux : Chlorineless rosin flux is recommended.) ⑥ In case that use ultrasonic for product washing, There is the possibility that the resonance may occur due to the frequency and shape of PCB. It may be affected to the strength of lead. Please be cautious of this matter. Page 2 of 2 Established : 2014-07-03 Revised : 2014-07-08 Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) The products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. Consult our sales staff in advance for information on the following applications: – Special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202