Edge4717D Quad Channel, Per Pin Precision Measurement Unit TEST AND MEASUREMENT PRODUCTS Description Features • • • • • The Edge4717D is a precision measurement unit designed for automated test equipment and instrumentation. Manufactured in a wide voltage CMOS process, it is a monolithic solution for a quad channel per pin PMU. Each channel of the Edge4717D features a PMU that can force or measure voltage over a typical 15V I/O range, and supports 4 current ranges: ± 3.2 µA, ± 80 µA, ± 2 mA, ± 30 mA. • • • • • The Edge4717D has an on-board window comparator per channel that provides two bits of information — DUT too high and DUT too low. There is also a monitor pin which provides a real time analog signal proportional to either the voltage or current measured at the DUT. FV / MI Capability FI / MV Capability FV / MV Capability FI / MI Capability 4 Current Ranges (± 3.2 µA, ± 80 µA, ± 2 mA, ± 30 mA) –5.5V to 9.5V Nominal Output Range (Zero Current) –3.5 to 7.5V Nominal Output Range (Full Scale Current) On-board Voltage Clamps Internal Sample and Hold 228 Pin 23 mm x 23 mm TBGA Package Functional Block Diagram The Edge4717D is designed to be a low power, low cost, small footprint solution to allow high pin count testers to support a PMU per pin. CHANNEL 0 SNK_MON OVER-CURRENT DETECT SRC_MON HiZ VINP REF On-board voltage clamps, with over-current detection, provide protection to the DUT and 4717D. SRC_OUT FORCE ÷ 2.5 FV / FI* MI / MV* IVMAX IVMIN COMP_IN DISABLE COMPARATORS SENSE DUTLTH DETECTOR LOGIC DUTGTL VOLTAGE MONITOR IVMON CHANNEL 1 SNK_MON REF OVER-CURRENT DETECT OVER-CURRENT DETECT SRC_MON HiZ VINP The Edge4717D is a design improvement to the Edge4717 that features: SNK_OUT OPEN_RLY SRC_OUT FORCE ÷ 2.5 GUARD FV / FI* MI / MV* IVMAX IVMIN COMP_IN DISABLE – Increased FV/MV range – Improved over-current detection circuit functionality – LVTTL comparator outputs (pull-up resistors no longer required) – Improved HiZ switching characteristics – Improved Force Voltage Linearity COMPARATORS SENSE DUTLTH DETECTOR LOGIC DUTGTL VOLTAGE MONITOR IVMON CHANNEL 2 SNK_MON REF OVER-CURRENT DETECT OVER-CURRENT DETECT SRC_MON HiZ VINP SNK_OUT OPEN_RLY SRC_OUT FORCE ÷ 2.5 GUARD FV / FI* MI / MV* IVMAX IVMIN COMP_IN DISABLE COMPARATORS SENSE DUTLTH DETECTOR LOGIC DUTGTL VOLTAGE MONITOR IVMON CHANNEL 3 SNK_MON Applications REF OVER-CURRENT DETECT OVER-CURRENT DETECT SRC_MON HiZ VINP Automated Test Equipment - Memory Testers - VLSI Testers - Mixed Signal Tester Revision 5 / October 14, 2005 SNK_OUT OPEN_RLY GUARD The Edge4717D also has a sample-and-hold feature available for capturing DUT current or voltage measurements. • DUT_GND OVER-CURRENT DETECT SNK_OUT OPEN_RLY SRC_OUT FORCE ÷ 2.5 GUARD FV / FI* MI / MV* IVMAX IVMIN COMP_IN DISABLE 1 COMPARATORS SENSE DUTLTH DETECTOR LOGIC DUTGTL VOLTAGE MONITOR IVMON www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS PIN Description Pin Name Pin # Description VINP[0:3] B19, H22, N21, V22 Analog voltage input which forces the output voltage (FV mode) and the output current (FI mode) (one per channel). REF[0:3] A19, G22, M21, U22 Reference pin for divide by 2.5 circuit for force current mode; this reference is typically set to 2.25V. FORCE[0:3] E2, J2, N2, U2 Analog output pin which forces current or voltage. SENSE[0:3] E3, J3, N3, U3 Analog input pin which senses voltage. FV_FI*[0:3] A7, C11, A14, B17 TTL compatible input which determines whether the PMU is forcing current or forcing voltage. MI_MV*[0:3] C9, B11, B14, C16 TTL compatible input which determines whether the PMU is measuring current or measuring voltage. RS0[0:3] C7, B9, C12, B15 TTL compatible current range select inputs. RS1[0:3] C6, A8, B12, A15 TTL compatible current range select inputs. IVMIN[0:3] C17, H20, M20, U21 Analog input voltages which establish the lower threshold level for the measurement comparator. IVMAX[0:3] C18, H21, N22, U20 Analog input voltages which establish the upper threshold level for the measurement comparator. COMP_IN[0:3] D2, H2, M2, T2 Analog voltage input to measurement comparator. DUT_LTH[0:3] AA13, Y12, AA10, Y9 DUT_GTL[0:3] AA14, AA12, Y11, AA9 DISABLE[0:3] A6, B10, B13, B16 HIZ[0:3] B7, A10, C13, A17 RA[0:3] F3, K3, P3, V3 External resistor input corresponding to Range A. RB[0:3] F2, K2, P2, V2 External resistor input corresponding to Range B. RC[0:3] F1, K1, P1, V1 External resistor input corresponding to Range C. RD[0:3] G3, L3, R3, W3 External resistor input corresponding to Range D. Digital comparator output that indicates the DUT measurement is less than the upper threshold. Digital comparator output that indicates the DUT measurement is greater than the lower threshold. TTL compatible input which places IVMON output in high impedance. TTL compatible input that places the FORCE output into high impedance. SNK_MON[0:3] F21, K22, R22, AA17 Analog voltage input to sink current clamp. SRC_MON[0:3] F22, L22, T22, Y16 Analog voltage input to source current clamp. SNK_OUT[0:3] C1, G1, L1, R1 Clamp output. SRC_OUT[0:3] E1, J1, N1, U1 Clamp output. 2005 Semtech Corp. / Rev. 5, 10/14/05 2 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS PIN Description (continued) Pin Name Pin # Description OPEN_RLY[0:3] Y14, Y13, AA11, Y10 Open drain output that is used for opening relays between tester and DUT in case of an over-current condition. IVMON[0:3] B18, G21, M22, T21 Analog voltage output that provides a real time monitor of either the measured voltage or measured current level. LTCH_MODE[0:3] B6, C10, A12, A16 SAMPLE[0:3] C8, A9, A13, C15 GUARD[0:3] D1, H1, M1, T1 Controls a mux for determination of whether IVMONITOR is from sampleand-hold or not sampled. Used for sampling the voltage on the SENSE[0:3] voltage monitor pins. Driven guard pin used for guard traces. TEST[0:3] B8, A11, C14, A18 Digital input control pin for mux for testing sample-and-hold. TEST_IN[0:3] C19, J22, N20, V21 Analog input for testing the sample-and-hold. COMP1[0:3] COMP2[0:3] D20, J20, P21, V20 D21, J21, P20, Y19 Internal compensation pins that require an external capacitor connection between the two pins. COMP3[0:3] E21, K21, R21, Y18 Internal compensation pin that requires an external capacitor connection between the pin and ground. COMP4[0:3] F20, K20, R20, Y17 Internal compensation pin that requires an external capacitor connection between the pin and FORCE output. DUT_GND Y6 Input reference pin that should be connected to DUT ground line. Power Pins VCC A1, A2, A21, A22, B1, B2, B21, B22, C3, C20, Y3, Y20, AA1, AA2, AA21, AA22, AB1, AB2, AB21, AB22 VDD Y15 VEE A20, B20, C21, C22, D22, E22, G2, L2, R2, W2, W21, W22, Y21, Y22, AA15, AA18, AA19, AA20, AB13, AB14, AB15, AB16, AB17, AB18, AB19, AB20 Negative analog power supply. GND A3, A4, A5, B3, B4, B5, C2, C4, C5, W1, Y1, Y2, Y4, Y5, Y7, Y8, AA3, AA4, AA5, AA6, AA7, AA8, AB3, AB4, AB5, AB6, AB7, AB8, AB9, AB10, AB11, AB12 Ground. NC D3, E20, H3, G20, L20, L21, M3, P22, T3, T20, W20, AA16 2005 Semtech Corp. / Rev. 5, 10/14/05 Positive analog power supply. Positive digital supply (comparator). No Connection. (Unused pins; leave unconnected). 3 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS PIN Description (continued) A1 Ball Pad Indicator SEMTECH Top View E4717 228 Pin TBGA 23mm x 23mm 23mm x 23mm 228 Pin TBGA 1 A B D E F G H J K L M R W Y AA AB 9 10 11 12 13 14 15 16 17 18 19 20 21 22 A22 A4 A5 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 GND GND DISABLE0 FV_FIN0 RS11 SAMPLE1 HIZ1 TEST1 LTCH_MODE2 SAMPLE2 FV_FIN2 RS13 LTCH_MODE3 HIZ3 TEST3 IREF0 VEE VCC VCC B3 B4 B5 B6 B7 B8 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 GND GND GND LTCH_MODE0 HIZ0 TEST0 DISABLE1 MI_MVN1 RS12 DISABLE2 MI_MVN2 RS03 DISABLE3 FV_FIN3 IVMON0 VINP0 VEE VCC VCC C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 GND GND RS10 RS00 SAMPLE0 MI_MVN0 LTCH_MODE1 FV_FIN1 RS02 HIZ2 TEST2 SAMPLE3 MI_MVN3 IV_MIN0 IV_MAX0 TEST_IN0 VCC VEE VEE D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 COMP10 COMP20 VEE E20 E21 E22 NC COMP30 VEE B2 VCC C1 C2 SNK_OUT0 GND D1 D2 GUARD0 COMP_IN0 E1 E2 SRC_OUT0 FORCE0 F1 F2 RC0 RB0 G1 G2 SNK_OUT1 VEE H1 H2 GUARD1 COMP_IN1 J1 J2 SRC_OUT1 FORCE1 K1 K2 RC1 RB1 L1 L2 SNK_OUT2 VEE M1 N1 M2 COMP_IN2 N2 FORCE2 P1 P2 RC2 RB2 R1 T1 U1 SRC_OUT3 V 8 A3 B1 C3 VCC D3 E3 F3 G3 V1 V2 RC3 RB3 W1 W2 GND VEE Y1 Y2 GND GND AA1 AA2 VCC VCC AB1 AB2 VCC VCC E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 NC J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 SENSE1 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 K19 RA1 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 L17 L18 L19 RD1 M3 M4 M5 M6 M7 M8 M9 M10 M11 M12 M13 M14 M15 M16 M17 M18 M19 NC N3 N4 N5 N6 N7 N8 N9 N10 N11 N12 N13 N14 N15 N16 N17 N18 N19 SENSE2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 RA2 T3 R4 T4 R5 T5 R6 T6 R7 T7 R8 T8 R9 T9 R10 T10 R11 T11 R12 T12 R13 T13 R14 T14 R15 T15 R16 T16 R17 T17 R18 T18 R19 T19 NC U3 U4 U5 U6 U7 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 U18 U19 SENSE3 V3 V4 V5 V6 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 RA3 W3 F20 F21 F22 COMP40 SNK_MON0 SRC_MON0 G20 HLD_CAP0 (NC) RD0 RD2 U2 E4 RA0 R3 FORCE3 RS01 SENSE0 R2 T2 B9 NC VEE COMP_IN3 A6 7 GND GUARD3 U 6 A2 SNK_OUT3 T 5 VCC SRC_OUT2 P 4 A1 GUARD2 N 3 VCC VCC C 2 W4 W5 W6 W7 W8 W9 W10 W11 W12 W13 W14 W15 W16 W17 W18 W19 RD3 Y3 Y4 Y5 Y6 Y7 Y8 VCC GND GND DUT_GND GND GND AA3 AA4 AA5 AA6 AA7 AA8 AA9 AA10 AA11 AA12 GND GND GND GND GND GND DUT_GTL3 DUT_LTH2 OPEN_RLY2 DUT_GTL1 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AB11 AB12 GND GND GND GND GND GND GND GND GND GND 2005 Semtech Corp. / Rev. 5, 10/14/05 Y9 DUT_LTH3 G21 G22 IVMON1 IREF1 H20 H21 H22 IV_MIN1 IV_MAX1 VINP1 J20 J21 J22 COMP11 COMP21 TEST_IN1 K20 K21 K22 COMP41 COMP31 SNK_MON1 L20 L21 L22 NC HLD_CAP1 (NC) M20 M21 M22 IV_MIN2 IREF2 IVMON2 SRC_MON1 N20 N21 N22 TEST_IN2 VINP2 IV_MAX2 P20 P21 P22 COMP22 COMP12 NC R20 R21 R22 COMP42 COMP32 SNK_MON2 T20 T21 T22 HLD_CAP2 (NC) IVMON3 SRC_MON2 U20 U21 U22 IV_MAX3 IV_MIN3 IREF3 V20 V21 V22 COMP13 TEST_IN3 VINP3 W20 W21 W22 NC VEE VEE Y10 Y11 Y12 Y13 Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y21 Y22 OPEN_RLY3 DUT_GTL2 DUT_LTH1 OPEN_RLY1 OPEN_RLY0 VDD SRC_MON3 COMP43 COMP33 COMP23 VCC VEE VEE AA13 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 DUT_LTH0 DUT_GTL0 VEE HLD_CAP3 (NC) SNK_MON3 VEE VEE VEE VCC VCC AB13 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB22 VEE VEE VEE VEE VEE VEE VEE VEE VCC VCC 4 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS PIN Description (continued) A1 Ball Pad Indicator (see gold triangle located at the corner) Bottom View 23mm x 23mm 228 Pin TBGA 22 21 20 A22 A21 A20 A19 A18 VCC VCC VEE IREF0 TEST3 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 VCC VCC VEE VINP0 IVMONITOR0 FV_FIN3 DISABLE3 RS03 MI_MVN2 DISABLE2 RS12 MI_MVN1 DISABLE1 C22 C21 C20 C19 C18 C17 C16 C15 C14 C13 C12 C11 C10 C9 C8 C7 VEE VEE VCC TEST_IN0 IV_MAX0 IV_MIN0 MI_MVN3 SAMPLE3 TEST2 HIZ2 RS02 FV_FIN1 LTCH_MODE1 MI_MVN0 SAMPLE0 RS00 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D22 D21 D20 VEE COMP20 COMP10 E22 E21 E20 VEE COMP30 NC F22 F21 F20 SRC_MON0 SNK_MON0 COMP40 G22 G21 G20 IREF1 IVMON1 HLD_CAP0 (NC) H22 H21 H20 VINP1 IV_MAX1 IV_MIN1 J22 J21 J20 TEST_IN1 COMP21 COMP11 K22 K21 K20 SNK_MON1 COMP31 COMP41 L21 L20 L22 SRC_MON1 HLD_CAP1 (NC) M22 M21 M20 IVMON2 IREF2 IV_MIN2 19 18 17 16 15 14 13 A17 A16 A15 A14 A13 HIZ3 LTCH_MODE3 RS13 FV_FIN2 SAMPLE2 12 11 10 9 A12 A11 A10 A9 A8 A7 LTCH_MODE2 TEST1 HIZ1 SAMPLE1 RS11 FV_FIN0 B9 RS01 8 7 6 5 A6 A5 A4 A3 A2 A1 GND GND GND VCC VCC DISABLE0 4 B8 B7 B6 B5 B4 B3 TEST0 HIZ0 LTCH_MODE0 GND GND GND C6 C5 C4 RS10 GND GND D6 D5 D4 N22 N21 N20 VINP2 TEST_IN2 P22 P21 P20 NC COMP12 COMP22 R22 R21 R20 SNK_MON2 COMP32 COMP42 T22 T21 T20 SRC_MON2 IVMON3 HLD_CAP2 (NC) U22 U21 U20 IREF3 IV_MIN3 IV_MAX3 C3 VCC D3 NC E19 E18 E17 E16 E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 SENSE0 F19 F18 F17 F16 F15 F14 F13 F12 F11 F10 F9 F8 F7 F6 F5 F4 F3 RA0 G19 G18 G17 G16 G15 G14 G13 G12 G11 G10 G9 G8 G7 G6 G5 G4 G3 RD0 H19 H18 H17 H16 H15 H14 H13 H12 H11 H10 H9 H8 H7 H6 H5 H4 H3 NC J19 J18 J17 J16 J15 J14 J13 J12 J11 J10 J9 J8 J7 J6 J5 J4 J3 SENSE1 K19 K18 K17 K16 K15 K14 K13 K12 K11 K10 K9 K8 K7 K6 K5 K4 K3 RA1 L19 L18 L17 L16 L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 NC IV_MAX2 3 L3 RD1 M19 M18 M17 M16 M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 NC N19 N18 N17 N16 N15 N14 N13 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 SENSE2 P19 P18 P17 P16 P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 RA2 R19 T19 R18 T18 R17 T17 R16 T16 R15 T15 R14 T14 R13 T13 R12 T12 R11 T11 R10 T10 R9 T9 R8 T8 R7 T7 R6 T6 R5 T5 R4 T4 U18 U17 U16 U15 U14 U13 U12 U11 U10 U9 U8 U7 U6 U5 U4 V22 V21 V20 TEST_IN3 COMP13 V19 V18 V17 V16 V15 V14 V13 V12 V11 V10 W22 W21 W20 VEE VEE NC Y22 Y21 Y20 Y19 Y18 Y17 Y16 Y15 Y14 Y13 Y12 Y11 Y10 VEE VEE VCC COMP23 COMP33 COMP43 SRC_MON3 VDD OPEN_RLY0 OPEN_RLY1 DUT_LTH1 DUT_GTL2 OPEN_RLY3 AA22 AA21 AA20 AA19 AA18 AA17 AA16 AA15 AA14 AA13 AA12 AA11 VCC VCC VEE VEE VEE SNK_MON3 HLD_CAP3 (NC) VEE DUT_GTL0 DUT_LTH0 DUT_GTL1 OPEN_RLY2 AB22 AB21 AB20 AB19 AB18 AB17 AB16 AB15 AB14 AB13 AB12 AB11 VCC VCC VEE VEE VEE VEE VEE VEE VEE VEE GND GND V9 V8 V7 V6 V5 V4 V3 RA3 W19 W18 W17 W16 W15 W14 W13 W12 W11 W10 W9 W8 W7 W6 W5 W4 W3 RD3 2005 Semtech Corp. / Rev. 5, 10/14/05 Y8 Y7 Y6 Y5 Y4 Y3 DUT_LTH3 GND GND DUT_GND GND GND VCC AA10 AA9 AA8 AA7 AA6 AA5 AA4 AA3 DUT_LTH2 DUT_GTL3 GND GND GND GND GND GND AB10 AB9 AB8 AB7 AB6 AB5 AB4 AB3 GND GND GND GND GND GND GND GND 5 Y9 C1 SNK_OUT0 D2 D1 COMP_IN0 GUARD0 E2 E1 FORCE0 SRC_OUT0 F2 F1 RB0 RC0 G2 G1 VEE SNK_OUT1 H2 H1 COMP_IN1 GUARD1 J2 J1 FORCE1 SRC_OUT1 K2 K1 RB1 RC1 L2 L1 VEE SNK_OUT2 M2 COMP_IN2 N2 FORCE2 M1 N1 P1 RC2 T2 U2 FORCE3 C D E F G H J K L M N SRC_OUT2 P2 COMP_IN3 B GUARD2 RB2 R2 U3 B1 A VCC C2 VEE T3 1 GND RD2 SENSE3 VINP3 B2 VCC R3 NC U19 2 R1 P R SNK_OUT3 T1 T GUARD3 U1 U SRC_OUT3 V2 V1 RB3 RC3 W2 W1 VEE GND Y2 Y1 GND GND AA2 AA1 VCC VCC AB2 AB1 VCC VCC V W Y AA AB www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description Circuit Overview Control Inputs The Edge4717D is a quad channel parametric test and measurement unit that can : • Force Voltage / Measure Current • Force Current / Measure Voltage • Force Voltage / Measure Voltage • Force Current / Measure Current • Measure Voltage / Force Disable FV / FI* is a TTL compatible input which determines whether the PMU forces current or voltage, and MI/MV* is a TTL compatible input which determines whether the PMU measures current or voltage. FV/FI* and MI/MV* are independent for each channel of the Edge4717D. HIZ is a TTL compatible input which can be used to place the PMU’s force amp into a high impedance state. Tables 1 and 2 describe the modes of operation related to these three input pins. The Edge4717D features a PMU (per channel) that can force or measure voltage over a 15V range and force or measure current over four distinct ranges: • ± 3.2 µA • ± 80 µA • ± 2 mA • ± 30 mA The Edge4717D features an on-board window comparator (per channel) that provides two bit measurement range classification. Also, a monitor pin, IVMON, is capable of outputting either a real time analog voltage signal which tracks the measured parameter, or a sampled value of the measurement parameter captured using the sample and hold circuitry. PMU Functionality The trapezoid in Figure 1 describes the current-voltage functionality of the PMU with VCC = 12V and VEE = –8V, in Range D. HIZ FV / FI* MI/MV* Mode of Operation 1 X X High Impedance 0 0 0 Force Current, Measure Voltage 0 0 1 Force Current, Measure Current 0 1 0 Force Voltage, Measure Voltage 0 1 1 Force Voltage, Measure Current Table 1. RS0 and RS1 are TTL compatible inputs to an internal analog MUX which selects an external resistor corresponding to a desired current range. The truth table for RS0 and RS1, along with the associated external resistor values and current ranges, is shown in Table 2. RS0 and RS1 are independent for each channel of the Edge4717D. V VOUT (@ I = 0) = 9.25V VCC = 12 VOUT (@ 30 mA) = 9V No restrictions IMAX (30 mA) IMIN (–30 mA) RS1 RS0 Range Current Range "Nominal" Ext. R 0 0 A 3.2 µA RA = 625KΩ 0 1 B 80 µA RB = 25KΩ 1 0 C 2 mA RC = 1KΩ 1 1 D 30 mA RD = 40Ω Table 2. VOUT (@ –30 mA) = –2.5V VOUT (@ –10 mA) = –5.1 (in Range D) VOUT (@ I = 0) = –5.5V VEE = –8V NOTE: Negative current is defined as current flowing into PMU from DUT. Figure 1. PMU Functionality 2005 Semtech Corp. / Rev. 5, 10/14/05 6 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description (continued) FORCE/SENSE FORCE is an analog output which either forces a current or forces a voltage, depending on which operating mode is selected. In FV mode, the voltage forced is equivalent to the voltage applied to the VINP pin. In FI mode, the current forced is mapped to the input as described in the Force Current section. FORCE can be placed in a highimpedance state through the setting of the HIZ input pin. When the HIZ input pin is set to logical “0”, the Edge4717D FORCE output will be controlled by the internal driver amplifier, and the Edge4717D will force a user-defined current or voltage (depending upon the setting of FV/FI*) at the FORCE pin. When HIZ is set to logical “1”, the FORCE output is placed into a low-leakage, high impedance state. SENSE is a high impedance analog input which measures the DUT voltage in the MV operating mode. Disable MI / MV* Sensed Parameter 1 X High Impedance 0 0 Measured Voltage 0 1 Measured Current Table 3. Sample and Hold The Edge4717D features a sample and hold circuit (per channel) which can be used to capture the corresponding voltage value of the sensed parameter (MI or MV) to be displayed at IVMON. The output of the sample and hold is internally connected to IVMON through a latch controlled by LTCH_MODE. The setting of LTCH_MODE determines whether the data at IVMON comes from the sample and hold circuit or directly from the sensed parameter (see Table 4). (FORCE and SENSE are brought out to separate pins to allow remote sensing.) IVMON LTCH_MODE Sample Sample-and_Hold State 0 X Transparent IVMON is a real time analog voltage output which tracks the sensed parameter. 1 (Falling Edge) Sample Data 1 0 Hold Data In the MV mode (MI/MV* = 0), the output voltage displayed at IVMON is a 1:1 mapping of the SENSE voltage. In the MI mode (MI/MV* = 1), IVMON follows the equation: 1 1 Transparent Table 4. Note: No update is performed on the sample-and-hold. IVMON = I(measured) * REXT Using nominal values for the external resistors (RA, RB, and RC), a voltage at IVMON of +2V corresponds to Imax, and –2V corresponds to Imin of the selected current range. For Range D, +1.2V corresponds to Imax and –1.2V corresponds to Imin. The IVMON pin can also be placed into a high impedance state by using the DISABLE input (see Table 3). 2005 Semtech Corp. / Rev. 5, 10/14/05 Sample and Hold Testing An analog MUX in the 4717D allows for testing of the sample-and-hold circuit. The MUX control pin, TEST, is a TTL compatible input whose operation is described in Table 5. To test the sample and hold circuitry, an analog signal can be applied to the TEST_IN pin and sampled. 7 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description (continued) TEST Function 0 Normal Operation 1 TEST_IN used for sampleand-hold testing Table 5. VINP Corresponding Forced Current VREF + 5.5V ≥ Imax (Full-Scale, Ranges A, B, C) VREF + 3.5V ≥ Imax (Full-Scale, Range D) VREF 0 VREF – 3.5V ≤ Imin (Full-Scale, Range D) VREF – 5.5V ≤ Imin (Full-Scale, Ranges A, B, C) Test Head Ground Reference Table 6. The Edge4717D features a test head ground referencing feature which allows the force voltage function to be referenced to a separate ground reference other than the ground (GND) power used for the device. The test head ground should be connected to the DUT_GND pin of the Edge4717D. The maximum allowed variation between DUT_GND and GND is ± 250 mV. In the Force Current mode, the voltage at VINP is divided by 2.5 internally on the chip, so that a ± 2V range is used internally for forcing currents on Ranges A, B, and C. Range D uses a ± 1.2V range across REXT for forcing currents. Force Voltage Mode In the MV mode (MI/MV* = 0), DUT voltage is measured via the SENSE input pin. This measured voltage can be displayed on the IVMON pin and tested using the internal window comparator. In the FV mode (FV/FI* = 1), VINP is a high impedance, analog voltage input that maps directly to the voltage forced at the FORCE pin. Measure Current Mode In the MI mode (MI/MV* = 1), a current monitor is connected in series with the PMU forcing amplifier. This monitor generates a voltage that is proportional to the current passing through it, and is brought out to IVMON. This voltage (corresponding to the measured current) can also be tested by the on-board window comparator. Force Current Mode In the FI mode (FV/FI* = 0), VINP is a high impedance, analog voltage input that is converted into a current at the FORCE pin (see Figure 1) using the following relationship: VINP – VREF Forced Current = (REXT * 2.5) where VREF is the reference voltage input at the REF pin which is nominally set at 2.25V. (Positive current is defined as current flowing out of the PMU.) Table 6 describes the relationship between the voltage applied to VINP and the current at FORCE for Ranges A, B, and C. 2005 Semtech Corp. / Rev. 5, 10/14/05 8 Measure Voltage Mode Comparator The Edge4717D features an on-board window comparator which provides two-bit measurement range classification. IVMAX and IVMIN are high impedance analog inputs that establish the upper and lower thresholds for the window comparator. COMP_IN is the window comparator input pin. COMP_IN should be connected to IVMON on each channel if it is desired to use the comparator to indicate PMU measurements. In the MI mode, an I/V MAX input of +2V will set the upper threshold of the window comparator to a voltage corresponding to +FSC (full-scale current), and an I/V MIN input of –2V will set the lower threshold to a voltage corresponding to –FSC for Ranges A, B, and C. Similarly for Range D, –1.2V corresponds to sinking full-scale current, and +1.2V corresponds to sourcing full-scale current (positive current is defined as current flowing out of the PMU). DUTGTL the DUTLTH are LVTTL compatible outputs which indicate the range of the measured parameter in relation to IVMIN and IVMAX. Comparator functionality is summarized in Table 7. www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description (continued) TEST CONDITION DUT LTH DUT GTL Clamp Condition Clamp Diode Current OPEN_RLY COMP_IN > IVMAX COMP_IN < IVMAX 0 1 N/A SRC_OUT < FORCE–Vdiode N/A 1 SRC_OUT > FORCE–Vdiode N/A 1 0 ICLAMP > 55 mA ICLAMP < 55 mA 0 1 SNK_OUT < FORCE+Vdiode ICLAMP > 55 mA ICLAMP < 55 mA 0 1 SNK_OUT > FORCE+Vdiode N/A 1 COMP_IN > IVMIN COMP_IN < IVMIN COMP_IN < IVMAX and COMP_IN > IVMIN 1 1 Table 7. Comparator Truth Table REXT Selection The Edge4717D is designed such that the maximum voltage drop across REXT (RA, RB, RC, or RD depending on range selected using RS0 and RS1 inputs) is ≤ 2V. Resistor values can be chosen to operate the PMU at any current range up to ± 50 mA in accordance with the following equation: REXT[Ω] = 2 [V] , IMAX ≤ IMAX[A] IMAX ≤ IMAX ≤ IMAX ≤ 50 mA for Range D 2 mA for Range C 80 µA for Range B 3.2 mA for Range A Voltage Clamps/Over-Current Detection The Edge4717D features four pairs of on-board clamps (one pair per channel), which can be used to clamp the voltage of pins connected to SRC_OUT and SNK_OUT between limits set by the voltages applied to SRC_MON and SNK_MON. SNK_MON is a high impedance input that establishes the upper clamping limit, while SRC_MON is a high impedance analog input that establishes the lower clamping limit. In addition to voltage clamping functionality, the clamp circuitry of the Edge4717D also features overcurrent detection capability. Over-current detection is only enabled when one of the voltage clamping thresholds is exceeded (FORCE + Vdiode > SNK_MON or FORCE – Vdiode < SRC_MON). When enabled, an over-current condition is signaled via the OPEN-RLY pin. OPEN_RLY is an open drain output pin that pulls down when an overcurrent condition is detected. OPEN_RLY functionality is depicted in Table 8. 2005 Semtech Corp. / Rev. 5, 10/14/05 Table 8. Over-Current Detection Circuit Functionality (Vdiode is the forward voltage of the external clamp diode). For applications that require the use of external resistors that are much smaller in Ohmic value than those that are outlined in Table 2, one will need to account for the variation in switch resistance vs. common mode voltage of the range selection switches (A-D in Figure 3) when specifying the overall accuracy of the application. Common Mode Error/Calibration In order to attain a high degree of accuracy in a typical ATE application, offset and gain errors are accounted for through software calibration. When operating the Edge4717D in the Measure Current (MI) or Force Current (FI) modes, an additional source of error, common mode error, should be accounted for. Common mode error is a measure of how the common mode voltage, VCM, at the input of the current sense amplifier affects the forced or measured current values (see Figure 2). Since this error is created by internal resistors in the current sense amplifier, it is very linear in nature. Using the common mode error and common mode linearity specifications, one can see that with a small number of calibration steps (see Applications note PMU-A1), the effect of this error can be significantly reduced. 9 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description (continued) VOS@IVMON Power Supply Sequencing CM Linearity In order to avoid the possibility of latch-up, the following power-up requirements must be satisified: 1. VEE ≤ GND ≤ VDD ≤ VCC at all times 2. VEE ≤ All inputs ≤ VCC CM Error = Slope 2 mV The following power supply sequencing can be used as a guideline when operating the Edge4717D: VCM@FORCE –3.5V –2 mV 9.5V Power Up Sequence 1. VCC (substrate) 2. VEE/VDD 3. Digital Inputs 4. Analog Inputs (Note: Slope may be negative) Power Down Sequence 1. Analog Inputs 2. Digital Inputs 3. VEE/VDD 4. VCC (substrate) Figure 2. Graphical Representation of Common Mode Error Transient Clamps The Edge4717D has on-board transient clamps to limit the voltage and current spikes that might result from either changing the current range or changing the operating mode. Driven Guard Pin The Edge4717D features a pin (per channel), GUARD, which can be used to drive the guard traces of a FORCE/ SENSE pair. By surrounding FORCE and SENSE traces with guard traces which connect to the GUARD pin, an effective method to achieve minimal leakage can be achieved. 2005 Semtech Corp. / Rev. 5, 10/14/05 10 www.semtech.com 2005 Semtech Corp. / Rev. 5, 10/14/05 11 DUT_GND SENSE GUARD REF VINP Positive Clamp ~1KΩ + – .4X CEXT FV COMP4 FV* D A* A FV* COMP2 C* C B* B D* C* CEXT C B B* A A* RA RB RC RD SRC_OUT > (FORCE–Vdiode) SRC_OUT < (FORCE–Vdiode) SNK_OUT < (FORCE+Vdiode) SNK_OUT > (FORCE+Vdiode) D* D FV CEXT COMP1 + DRIVER – MI ⇒ MI/MV* = 1 MI* ⇒ MI/MV* = 0 FV ⇒ FV/FI* = 1 FV* ⇒ FV/FI* = 0 DSRC = External Diode DSNK = External Diode CEXT = External Capacitors 40KΩ FV* FV 40KΩ FV FV* COMP3 – FV* FV + ~500Ω ~ – + SRC_OUT – Vdiode + ~500Ω ~ SRC_MON Negative Clamp – Vdiode + SNK_OUT SNK_MON Current limiting resistors on the SRC_MON and SNK_MON inputs ensure that the Edge4717D is not damaged when SRC_MON > SNK_MON. MI – INST. + MI* FORCE MI 1 0 DISABLE IV_MIN COMP_IN + – + – LTCH_MODE SAMPLE TEST TEST_IN IV_MAX MI* SRC Over-Current Detection SNK Over-Current Detection S&H DUT_GTL DUT_LTH 1 0 OPEN_RLY – + 1 0 IVMON Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description (continued) Figure 3. Functional Schematic www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Application Information 120 pF COMP1 COMP2 VDD RPU OPEN_RLY 120 pF COMP4 625 KΩ RA Edge4717D 25 KΩ RB To LVTTL Gate DUT LTH 1 KΩ RC 40 Ω DUT GTL To LVTTL Gate RD FORCE To DUT SENSE + Vdiode – SRC_OUT COMP3 100 pF to 1 nF (exact value is TBD) .1 µF – Vdiode + SNK_OUT VCC VDD VEE DUT_GND .01 µF .01 µF VCC VDD .1 µF VEE .01 µF Use of diodes with a low reverse leakage current, such as the Zetex FLLD261 or equivalent are recommended. Test Head Ground Actual decoupling capacitor values depend on the actual system environment. Figure 4. Required External Components (Per Channel) 2005 Semtech Corp. / Rev. 5, 10/14/05 12 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Package Information 0.10 D –A– PIN Descriptions 11 Corner –B– E The entire top-side of the E4717D package is constructed of copper, which offers a path of high thermal conductivity for cooling. 45 degree 0.5 mm Chamfer (4 PLCS) Top View 3 2 1 5 4 10 9 8 7 6 13 12 11 18 17 16 15 14 22 21 20 19 10 A B C D E F G H J K L M N P R T U V W Y AA AB e E1 e Detail B D1 Bottom View 2005 Semtech Corp. / Rev. 5, 10/14/05 13 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Package Information (continued) Detail A Side View g A c A1 P / / ccc C g –C– b 0.30 S C A S B S 5 aaa C 6 0.10 S C 4 Detail A Detail B NOTES: Dimensional References 1. All dimensions are in millimeters. 2. “e” represents the basic solder ball grid pitch. 3. “M” represents the basic solder ball matrix size, and 4. REF. MIN. A A1 symbol “N” is the maximum allowable number of D balls after depopulating. D1 “b” is measured at the maximum solder ball diameter E (after reflow) parallel to primary datum –C– . E1 5. Dimension “aaa” is measured parallel to primary datum –C– . 6. Primary datum –C– and seating plane are defined by the NOM. MAX. 1.25 1.4 1.55 0.40 0.50 0.60 22.80 23.00 23.20 21.00 BSC 22.80 23.00 23.20 21.00 BSC b 0.525 0.65 0.775 c 0.85 0.90 0.95 M 22 spherical crowns of the solder balls. N 228 7. Package surface shall be black oxide. aaa 0.15 8. Cavity depth varies with die thickness. ccc 0.25 9. Substrate material base is copper. e 10. Bilateral tolerance zone is applied to each side of package body. g 0.35 11. 45 degree 0.5 mm Chamfer corner and white dot for Pin 1 P 0.15 1.00 TYP identification. 2005 Semtech Corp. / Rev. 5, 10/14/05 14 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Recommended Operating Conditions Parameter Symbol Min Typ Max Units Positive Analog Power Supply VCC 11.5 12 12.5 V Negative Analog Power Supply VEE –8.5 –8 –7.5 V VCC – VEE 19 20 21 V VDD 3.0 3.3 5.25 V Case Temperature TC 25 +65 ˚C Thermal Resistance of Package (Junction to Case) θjc Total Analog Power Supply Digital Power Supply 0.3 ˚C/W Absolute Maximum Ratings Parameter Symbol Min Typ Max Units +15 V Positive Power Supply VCC Negative Power Supply VEE –15 VCC – VEE 0 22 V VDD 0 +7 V Digital Inputs –.5 7.0 V Analog Inputs VEE – .5 VCC + .5 V –55 +125 ˚C Case Temperature 100 ˚C Soldering Temperature 260 ˚C Total Power Supply Digital Power Supply Storage Temperature V Stresses above listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2005 Semtech Corp. / Rev. 5, 10/14/05 15 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS DC Characteristics Parameter Symbol Min Typ Max Units 35 35 72 72 5 mA mA mA Power Supplies Power Supply Consumption (No-Load) Positive Supply Negative Supply "Digital" Supply ICC IEE IDD Power Supply Rejection Ratio VCC to any Analog Output (except in Hold mode) 1 MHz 500 kHz 100 kHz PSRR 20 20 25 dB dB dB VEE to any Analog Output (except in Hold mode) 1 MHz 500 kHz 100 kHz 16 18 25 dB dB dB VDD to any Analog Output (except in Hold mode) < 1 MHz 60 dB VCC to IVMON (Hold Mode) 1 MHz 500 kHz 100 kHz 200 Hz 0.6 6 20 30 dB dB dB dB VEE to IVMON (Hold Mode) 1 MHz 500 kHz 100 kHz 200 Hz 1.7 7 21 30 dB dB dB dB VDD to IVMON (Hold Mode) < 1 MHz 60 dB Force Voltage Mode Input Voltage Range Input Leakage Current VINP Ileak VEE + 2.0 –1 Output Forcing Voltage (Positive Full-Scale Current through RE X T ) VFORCE Output Forcing Voltage (0 Current through RE X T ) Output Forcing Voltage (Negative Full-Scale Current through RE X T ) Voltage Accuracy Offset Gain Linearity 2005 Semtech Corp. / Rev. 5, 10/14/05 16 VCC – 2.0 1 V µA VEE + 2.5 VCC – 4.5 V VFORCE VEE + 2.5 VCC – 2.5 V VFORCE VEE + 4.5 VCC – 2.5 V VOS Gain FV INL –200 .985 –0.025 200 1.015 +0.025 mV V/V % FSVR 0 .01 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS DC Characteristics (continued) Parameter Symbol Min Typ Max Units –3.2 –80 –2 –30 3.2 80 2 30 µA µA mA mA –150 .985 150 1.015 mV V/V –.08 –80 .08 +80 % FSCR µA CM Error –5.5 5.5 mV/V CM INL RO U T IL E A K –.05 .05 Measure Current Mode Current Measurement Range Range A Range B Range C Range D Current Measurement Accuracy Offset (@ IVMON) Gain (Note 1) Linearity Ranges A, B, C Range D Common Mode Error Common Mode Linearity FORCE = VEE + 4.5V to VCC – 4.75V IVMON Output Impedance IVMON Leakage Current (IVMON = VEE+2.5V TO VCC–2.5V) IM E A S U R E VOS Gain MI INL –100 100 %FSCR Ω nA VREF – 5.5 –1 0 –1 VREF + 5.5 1 2.5 –1 V µA V µA –3.2 –80 –2 –30 3.2 80 2 30 µA µA mA mA VEE + 2.5 VEE + 2.5 VEE + 3.0 VCC – 3.0 VCC – 2.5 VCC – 2.5 V V V 3.6 .415 % FSCR V/V –.08 –80 .08 +80 % FSCR µA CM Error –5.5 5.5 mV/V CM INL –.05 .05 % FSCR 500 Force Current Mode Input Voltage Range Input Leakage Current REF Input Voltage Range REF Leakage Current VINP IL E A K VREF IL E A K Output Forcing Current Range A Range B Range C Range D IF O R C E Compliance Voltage Range Positive Full-Scale Current 0 Current Negative Full-Scale Current VFORCE Current Accuracy Offset Gain (Note 2) Linearity Ranges A, B, C Range D Common Mode Error Common Mode Linearity FORCE = VEE + 4.5V to VCC – 4.5V 2005 Semtech Corp. / Rev. 5, 10/14/05 IOS Gain FI INL –3.6 .385 17 0 .4 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS DC Characteristics (continued) Parameter Symbol Min VSENSE VEE + 2.5 VOS Gain MV INL IL E A K –200 .985 –.025 –10 RO U T IL E A K –100 Typ Max Units VCC – 2.5 V 200 1.015 .025 10 mV V/V %FSVR nA 100 Ω nA 0.8 V Measure Voltage Mode Voltage Measurement Range Voltage Measurement Accuracy Offset Gain Linearity FORCE/SENSE Combined Leakage Current in HiZ (FV/FI*=0, FORCE/SENSE = VEE+2.5V to VCC–2.5V) IVMON Output Impedance IVMON Leakage Current (IVMON = VEE+2.5V to VCC–2.5V) ±.01 500 Digital Inputs (FV/FI*, MI/MV*, RS0, RS1, DISABLE, TEST, HiZ, LTCH_MODE, SAMPLE) Input Low Level VIL Input High Level VIH 2.0 Input Leakage Current Ileak –1 SNK_MON – SRC_MON .5 V 0 1 µA 16.0 V 10 Ω Voltage Clamps Range Effective Output Impedance of Clamps RO U T Sink Clamp Voltage Range SNK_MON VEE + 2.5 VCC – 2.0 V Source Clamp Voltage Range SRC_MON VEE + 2.0 VCC – 2.5 V SRC_MON Leakage Current IL E A K –1 1 µA SNK_MON Leakage Current IL E A K –1 1 µA CLAMP INL –.400 +.400 % FSVR VOS –150 +150 mV IC L A M P 35 95 mA PPMU Voltage Clamps Current Limiting Range IL I M I T 35 95 mA Output Low Voltage for OPEN_RLY Pin @ 1 mA VO L 500 mV Linearity @ 5 mA Constant Current Offset @ 5 mA Constant Current PPMU Voltage Clamps Current Interrupt Limit (OPEN_RLY Trigger Current) TEST_IN Leakage Current IL E A K –1 1 µA OPEN_RLY Leakage Current @ 5V IL E A K –1 1 µA S&H INL –.025 .01 .025 % FSVR 16 20 mV 50 µV/˚C Sample and Hold Circuit Linearity Error Hold Step VH S ∆V / ∆˚C TempCo of Hold Step (Note 3) Output Impedance of IVMON (Note 3) 2005 Semtech Corp. / Rev. 5, 10/14/05 RO U T 18 500 Ω www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS DC Characteristics (continued) Parameter Symbol Min IM A X Typ Max Units 35 75 mA VD I F F –100 +100 mV VO S –250 +250 mV IL E A K –1 1 µA IVMAX Voltage Range IVMAX VEE + 1.75 VCC – 1.75 V IVMIN Voltage Range IVMIN VEE + 1.75 VCC – 1.75 V Comparator Offset (IVMIN, IVMAX) VO S –100 +100 mV Input Bias Current at (IVMIN, IVMAX, COMP_IN) Ib i a s –1 +1 µA 400 mV VDD V Short Circuit Protection Forcing Op-Amp Current Limit (Note 3) Driven Guard / Test Head Ground GUARD – SENSE @ DUT_GND = 0 SENSE = 5V DUT_GND to GND Voltage Range DUT_GND Leakage Current Comparator Digital Outputs (DUTLTH, DUTGTL) Output Low Level (TBD load) VO L Output High Level (TBD load) VO H Note 1: Gain = Note 2: Gain = IVMON VEXT 2.4 , where VEXT is the voltage across REXT, which corresponds to measured current. VEXT , REF = 2.25V nominal, V EXT is the voltage across REXT, which corresponds to VINP – REF forced current. Note 3: Guaranteed by design and characterization. Not production tested. Unit Definitions: FSCR = Full Scale Current Range Range A, ± 3.2 µA Range B, ± 80 µA Range C, ± 2 mA Range D, ± 30 mA FSVR = Full Scale Voltage Range FV mode, no current = 14V minimum FV mode, current load = 12V minimum MV mode = 14V minimum 2005 Semtech Corp. / Rev. 5, 10/14/05 19 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS AC Characteristics Parameter Symbol Min Typ Max Units 2 300 ms µs 4 300 ms µs 10 nF 1 15 µs µs µs 4 300 ms µs 4 300 ms µs 10 nF 1 15 µs µs µs Force Voltage / Measure Current FORCE Output Voltage Settling Time (Note 1) (To 0.1% of 10V step) RANGE A RANGES B, C, D ts e t t l e Measured Current Settling Time (Note 1) (To 0.1% of FSCR step) RANGE A RANGES B, C, D ts e t t l e Stability (Note 1) Capacitive Loading Range for Stable Operation CL O A D Force Amp Saturation Recovery Time HiZ True to FORCE Disable Time HiZ False to FORCE Enable Time 0 25 ts r tz to e Force Current / Measure Voltage FORCE Output Current Settling Time (Note 1) (To 0.1% of FSCR step) RANGE A RANGES B, C, D ts e t t l e SENSE (Measure) Voltage Settling Time (Note 1) (To 0.1% of 10V step) RANGE A RANGES B, C, D ts e t t l e Stability (Note 1) Capacitive Loading Range for Stable Operation CL O A D Force Amp Saturation Recovery Time HiZ True to FORCE Disable Time HiZ False to FORCE Enable Time ts r tz to e 0 25 I/V Monitor Enable Time to e 500 ns Disable Time tz 500 ns 2005 Semtech Corp. / Rev. 5, 10/14/05 20 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS AC Characteristics (continued) Parameter Symbol Min Typ Max Units 40 mV/s 1 10 µs 0.8 1.4 1.5 2 µs µs 1.3 1.8 2 3 µs µsf 25 µs Sample and Hold Circuit ∆V/∆t Droop Rate Acquisition Time (to 0.025% of Sampled Value) tA Q Hold Mode Settling Time (Notes 1, 2) Measure Voltage Mode To 0.1% of 10V Step To 0.025% of 10V Step tH S E T T L E Measure Current Mode (Notes 1, 2) To 0.1% of 4V Step To 0.025% of 4V Step tHSETTLE Comparators Propagation Delay tpd AC Test Conditions: COMP3 = 120 pF to Ground; COMP4 = 120 pF to FORCE; Capacitor between COMP1 and COMP2 = 120 pF; Load at FORCE/SENSE combined output = 100 pF. Note 1: Note 2: Guaranteed by design and characterization. Not production tested. Sample and Hold Circuit Acquisition Time (tAQ) and Settling Time (tHSETTLE) are described below: 1 tAQ SAMPLE 0 tHSETTLE VCC – 4.5 VHS IVMON VEE + 4.5 CONDITIONS: LTCH_MODE = 1 IVMON = 100 pF to GND 2005 Semtech Corp. / Rev. 5, 10/14/05 21 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Ordering Information Model Number Package E4717DBG 228 Pin 23 mm x 23 mm TBGA EVM4717DBG Edge4717D Evaluation Board This device is ESD sensitive. Care should be taken when handling and installing this device to avoid damaging it. Contact Information Semtech Corporation Test and Measurement Division 10021 Willow Creek Rd., San Diego, CA 92131 Phone: (858)695-1808 FAX (858)695-2633 2005 Semtech Corp. / Rev. 5, 10/14/05 22 www.semtech.com