ON FAN2502S25X 150 ma cmos ldo regulator Datasheet

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FAN2502 / FAN2503
150 mA CMOS LDO Regulator
Features
Description
•
•
•
•
•
•
•
The FAN2502 / 03 family of micropower low-dropout voltage regulators utilize CMOS technology to offer a new
level of cost-effective performance in mobile handsets,
laptop and notebook portable computers, and other portable devices. Features include extremely low power consumption, low shutdown current, low dropout voltage,
exceptional loop stability able to accommodate a wide
variety of external capacitors, and a compact SOT23-5
surface-mount package. The FAN2502 / 03 family offers
significant improvements over older BiCMOS designs
and is pin-compatible with many popular devices. The
output is thermally protected against overload.
Ultra-Low Power Consumption
150 mV Dropout Voltage at 150 mA
25 μA Ground Current at 150 mA
Enable / Shutdown Control
SOT23-5 package
Thermal Limiting
300 mA Peak Current
Applications
• Mobile Phones and Accessories
• Portable Cameras and Video Recorders
• Laptop, Notebook, and Palmtop Computers
The FAN2502 and FAN2503 devices are distinguished by
the assignment of pin 4:
FAN2502-XX: pin 4 – BYP, to which a bypass capacitor
may be connected for optimal noise performance. Output
voltage is fixed, indicated by the suffix XX.
FAN2503-XX: pin 4 – ERR, a flag that indicates that the
output voltage has dropped below the specified minimum
due to a fault condition.
The standard fixed output voltages available are 2.5 V
and 3.3 V.
Ordering Information
Part Number
VOUT
Pin 4 Function
Top Mark
Package
Packing
Method
FAN2502S25X
2.5
Bypass
AEE
SOT-23 5L
Tape and Reel
FAN2503S33X
3.3
Error Output
AF3
SOT-23 5L
Tape and Reel
Tape and Reel Information
Quantity
Reel Size
Width
3000
7 inches
8 mm
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
www.fairchildsemi.com
1
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
May 2013
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
Block Diagram
Figure 1. Block Diagram
Pin Configuration
Figure 2. Pin Configuration
Pin No.
FAN2502
FAN2503
1.
VIN
VIN
2.
GND
GND
3.
EN
EN
4.
BYP
ERR
5.
VOUT
VOUT
Pin Descriptions
Pin Name
Pin No.
Type
BYP
4
Passive
ERR
4
EN
3
VIN
1
VOUT
5
GND
2
Functional Description
FAN2502-XX Bypass. Connect a 470 pF capacitor for noise reduction.
FAN2503-XX Error. Error flag output.
Open drain 0: Output voltage < 95% of nominal
1: Output voltage > 95% of nominal
Enable
Digital Input 0: Shutdown VOUT
1: Enable VOUT
Power In
Voltage Input. Supply voltage input.
Power Out Voltage Output. Regulated output voltage.
Power
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
Ground
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2
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only.
Parameter
Min.
Max.
Unit
0
7
V
Applied Voltage (Measured to GND)(2)
ERR Output
0
7
V
Applied Voltage (Measured to GND)(2)
0
7
V
Power Supply Voltages
VIN (Measured to GND)
Enable Input (EN)
Power
Dissipation(3)
Temperature
Internally Limited
Junction
-65
Lead Soldering (5 s)
Storage
-65
150
°C
260
°C
150
°C
(4)
4
kV
Electrostatic Discharge
Notes:
1. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only
if Recommended Operating Conditions are not exceeded.
2. Applied voltage must be current limited to specified range.
3. Based upon thermally limited junction temperature:
T J ( max ) – T A
P D = ------------------------------Θ JA
4. Human Body Model is 4 kV minimum using Mil Std. 883E, method 3015.7. Machine Model is 400 V minimum using
JEDEC method A115-A.
Recommended Operating Conditions
The recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VIN
Parameter
Min.
Input Voltage Range
VOUT
Output Voltage Range, Adjustable
VEN
Enable Input Voltage
VERR
ERR Flag Voltage
Nom.
Max.
Unit
2.7
6.5
V
VREF
VIN-VDO
V
0
VIN
V
VIN
V
+125
°C
TJ
Junction Temperature
θJA
Thermal Resistance, Junction to Ambient
220
°C/W
θJC
Thermal Resistance, Junction to Case
130
°C/W
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
-40
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3
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
Absolute Maximum Ratings(1)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
2.5
4.0
mV
Regulator
IOUT = 100 μA
VDO
Drop Out Voltage
∆VO
Output Voltage Accuracy
IGND
Ground Pin Current
IOUT = 50 mA
50
75
mV
IOUT = 100 mA
100
140
mV
150
180
mV
2
%
50
μA
1
μA
IOUT = 150 mA
-2
IOUT = 150 mA
Protection
Current Limit
Thermally Protected
IGSD
Shutdown Current
TSH
Thermal Protection Shutdown Temperature
ETL
ERR Trip Level
EN = 0 V
150
FAN2503 Only
°C
90
95
99
1.2
0.4
2.0
1.4
%
Enable Input
VIL
Logic Low Voltage
VIH
Logic High Voltage
IIH
Input Current High
1
μA
II
Input Current Low
1
μA
V
V
Switching Characteristics(5, 6)
Parameter
Enable Input
Max.
Unit
500
μs
3
ms
(7)
Response Time
Error Flag (FAN2503)
Response Time
Performance Characteristics(5, 6)
Symbol
Parameter
Conditions
Typ.
∆VOUT/
∆VIN
Line Regulation
VIN = (VOUT+ 1) to 6.5 V
0.3
∆VOUT/
VOUT
Load Regulation
IOUT = 0.1 to 150 mA
1.0
eN
PSRR
Output Noise
Power Supply Rejection
f = 10 Hz to 1 kHz at VIN,
COUT = 10 μF,
CBYP = 0.01 μF
< 7.00
f > 10 kHz at VIN,
COUT = 10 μF,
CBYP = 0.01 μF
< 0.01
f = 120 Hz at VIN,
COUT = 10 μF,
CBYP = 0.01 μF
43
Max.
Unit
%/V
2.0
%
μV / Hz
dB
Notes:
5. Unless otherwise stated; TA = 25°C, VIN = VOUT + 1 V, IOUT = 100 μA, and VIH > 2.0 V.
6. Bold values indicate -40 ≤ TJ ≤ 125°C.
7. When using repeated cycling.
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
www.fairchildsemi.com
4
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
Electrical Characteristics(5, 6)
Figure 3. Power Supply Rejection Ratio
Figure 4. Power Supply Rejection Ratio
Figure 5. Power Supply Rejection Ratio
Figure 6. Power Supply Rejection Ratio
Figure 7. Power Supply Rejection Ratio
Figure 8. Power Supply Rejection Ratio
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
www.fairchildsemi.com
5
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
Typical Performance Characteristics
Figure 9. Power Supply Rejection Ratio
Figure 10. Power Supply Rejection Ratio
Figure 11. PSRR vs. Voltage Drop
Figure 12. PSRR vs. Voltage Drop
Figure 13. Noise Performance
Figure 14. Ground Pin Current
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
www.fairchildsemi.com
6
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
Typical Performance Characteristics (Countinued)
Figure 15. Ground Pin Current
Figure 16. Ground Pin Current
Figure 17. Ground Pin Current
Figure 18. Ground Pin Current
Figure 19. Dropout Voltage
Figure 20. Dropout Characteristics
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
www.fairchildsemi.com
7
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
Typical Performance Characteristics (Countinued)
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
Typical Performance Characteristics (Countinued)
Figure 21. Dropout Voltage
Figure 22. Dropout Voltage
Figure 23. Output Voltage vs. Temperature
Figure 24. Enable Pin Delay
Figure 25. Shutdown Delay
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
www.fairchildsemi.com
8
Designed utilizing CMOS process technology, the
FAN2502 / 03 family of products are carefully optimized
for use in compact battery-powered devices. They offer a
unique combination of low power consumption,
extremely low dropout voltages, high tolerance for a variety of output capacitors, and the ability to disable the output to less than 1 μA under user control. In the circuit, a
differential amplifier controls the current through a
series-pass P-channel MOSFET, comparing the load
voltage at the output with an onboard low-drift band-gap
reference. The series resistance of the pass P-channel
MOSFET is approximately 1 Ω, resulting in an unusually
low dropout voltage under load when compared to older
bipolar pass-transistor designs. Protection circuitry is
provided onboard for overload conditions. If the device
reaches temperatures exceeding the specified maximums, an onboard circuit shuts down the output, where
it remains suspended until it has cooled before reenabling. The user can shut down the device using the
Enable control pin at any time.
Input Capacitor
An input capacitor of 2.2 μF (nominal value) or greater,
connected between the Input pin and ground, located in
close proximity to the device, improves transient
response and noise rejection. Higher values offer superior input ripple rejection and transient response. An
input capacitor is recommended when the input source,
either a battery or a regulated AC voltage, is located far
from the device. Any good-quality ceramic, tantalum, or
metal film capacitor gives acceptable performance; however, tantalum capacitors with a surge current rating
appropriate to the application must be selected to avoid
catastrophic failure.
Output Capacitor
Careful design of the output regulator amplifier assures
loop stability over a wide range of ESR values in the
external output capacitor. A wide range of values and
types can be accomodated, allowing the user to select a
capacitor meeting space, cost, and performance requirements; and enjoy reliable operation over temperature,
load, and tolerance variations.
An output capacitor is required to maintain regulator loop
stability. Unlike many other LDO regulators, the
FAN2502 / 03 family of products are nearly insensitve to
output capacitor ESR. Stable operation is achieved with
a wide variety of capacitors with ESR values ranging
from 10 mΩ to 10 Ω or more. Tantalum or aluminum electrolytic, or multilayer ceramic types can all be used. A
nominal value of at least 1 μF is recommended.
Depending on the model selected, a number of control
and status functions are available to enhance the operation of the LDO regulator. An Enable pin, available on all
devices, allows the user to shut down the regulator output to conserve power, reducing supply current to less
than 1 μA. The adjustable-voltage versions of the device
utilize pin 4 to connect to an external voltage divider that
feeds back to the regulator error amplifier, thereby setting the voltage as desired. Two other functions are available at pin 4 in the fixed-voltage versions: in noisesensitive applications, an external bypass capacitor connection is provided that allows the user to achieve optimal noise performance at the output. The error output
functions as a diagnostic flag to indicate that the output
voltage has dropped more than 5% below the nominal
fixed voltage.
Bypass Capacitor (FAN2502 Only)
In the fixed-voltage configuration, connecting a capacitor
between the Bypass pin and ground can significantly
reduce noise on the output. Values ranging from 470 pF
to 10 nF can be used, depending on the sensitivity to
output noise in the application.
At the high-impedance Bypass pin, care must be taken in
the circuit layout to minimize noise pickup, and capacitors must be selected to minimize current loading (leakage). Noise pickup from external sources can be
considerable. Leakage currents into the Bypass pin
directly affects regulator accuracy and should be kept as
low as possible; high-quality ceramic and film types are
recommended for their low leakage characteristics.
Cost-sensitive applications not concerned with noise can
omit this capacitor.
Applications Information
External Capacitors – Selection
Control Functions
The FAN2502/03 supports a wide variety of capacitors
compared to other LDO products. An innovative design
approach offers significantly reduced sensitivity to ESR
(Equivalent Series Resistance), which degrades regulator loop stability in older designs. While the improvements greatly simplify the design task, capacitor quality
still must be considered if the designer is to achieve optimal circuit performance. In general, ceramic capacitors
offer superior ESR performance, at a lower cost and
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
Enable Pin
Applying a voltage of 0.4 V or less at the Enable pin disables the output, reducing the quiescent output current
to less than 1 μA; while a voltage of 2.0 V or greater
enables the device. If this shutdown function is not
needed, the pin can be connected to the VIN pin. Allowing this pin to float causes erratic operation.
www.fairchildsemi.com
9
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
a smaller case size than tantalums. Those with X7R or
Y5Vdielectric offer the best temperature coefficient characteristics. The combination of tolerance and variation
over temperature in some capacitor types can result in
significant variations, resulting in unstable performance
over rated conditions.
Functional Description
To indicate conditions such as input voltage dropout (low
VIN), overheating, or overloading (excessive output current); the ERR pin indicates a fault condition. It is an
open-drain output that is HIGH when the voltage at VOUT
is greater than 95% of the nominal rated output voltage
and LOW when VOUT is less than 95% or the rated output voltage, as specified in the error trip level characteristics.
A logic pull-up resistor of 100 kΩ is recommended at this
output. The pin can be left disconnected if unused.
Thermal Protection
The FAN2502 / 03 can supply high peak output currents
of up to 1 A for brief periods, However, this output load
causes the device temperature to increase and exceed
maximum ratings due to power dissipation. During output
overload conditions, when the die temperature exceeds
the shutdown limit temperature of 150°C, onboard thermal protection disables the output until the temperature
drops below this limit; at which point, the output is reenabled. During a thermal shutdown situation, the user
may assert the power-down function at the Enable pin,
reducing power consumption to the minimum level IGND ·
VIN.
Once the limiting parameters in these two relationships
have been determined, the design can be modified to
ensure that the device remains within specified operating
conditions. If overload conditions are not considered, it is
possible for the device to enter a thermal cycling loop, in
which the circuit enters a shutdown condition, cools, reenables, and then again overheats and shuts down
repeatedly due to an unmanaged fault condition.
General PCB Layout Considerations
To achieve the full performance of the device, careful circuit layout and grounding techniques must be observed.
Establishing a small local ground, to which the GND pin
and the output and bypass capacitors are connected, is
recommended. The input capacitor should be grounded
to the main ground plane. The quiet local ground is
routed back to the main ground plane using feed-through
vias. In general, the high-frequency compensation components (input, bypass, and output capacitors) should be
located as close to the device as possible. The proximity
of the output capacitor is especially important to achieve
optimal noise compensation from the onboard error
amplifier, especially during high load conditions. A large
copper area in the local ground provides the heat sinking
discussed above when high power dissipation significantly increases the temperature of the device. Component-side copper provides significantly better thermal
performance for this surface-mount device, compared to
that obtained when using only copper planes on the
underside.
Thermal Characteristics
The FAN2502 / 03 can supply 150 mA at the specified
output voltage with an operating die (junction) temperature of up to 125°C. Once the power dissipation and thermal resistance is known, the maximum junction
temperature of the device can be calculated. While the
power dissipation is calculated from known electrical
parameters, the thermal resistance is a result of the thermal characteristics of the compact SOT23-5 surfacemount package and the surrounding PC board copper to
which it is mounted.
The power dissipation is equal to the product of the
input-to-output voltage differential and the output current
plus the ground current, multiplied by the input voltage,
or:
P D = ( V IN – V OUT )I OUT + V IN I GND
The ground pin current, IGND, can be found in the charts
provided in the Electrical Characteristics section.
The relationship describing the thermal behavior of the
package is:
⎧ T J ( max ) – T A ⎫
P D ( max ) = ⎨ ------------------------------- ⎬
θ JA
⎩
⎭
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
www.fairchildsemi.com
10
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
where TJ(max) is the maximum allowable junction temperature of the die, which is 125°C, and TA is the ambient
operating temperature. θJA is dependent on the surrounding PC board layout and can be empirically
obtained. While the θJC (junction-to-case) of the SOT235 package is specified at 130°C/W, the θJA of the minimum PCB footprint is at least 235°C/W. This can be
improved by providing a heat sink of surrounding copper
ground on the PCB. Depending on the size of the copper
area, the resulting θJA can range from approximately
180°C/W for one square inch to nearly 130°C/W for 4
square inches. The addition of backside copper with
through-holes, stiffeners, and other enhancements can
also reduce this value. The heat contributed by the dissipation of other devices located nearby must be included
in design considerations.
Error Flag (FAN2503 Only)
FAN2502 / FAN2503 — 150 mA CMOS LDO Regulator
Physical Dimensions
SOT-23
3.00
2.80
5
SYMM
CL
0.95
0.95
A
4
B
3.00
2.60
1.70
1.50
1
2
2.60
3
(0.30)
1.00
0.50
0.30
0.95
1.90
0.20
C A B
0.70
TOP VIEW
LAND PATTERN RECOMMENDATION
SEE DETAIL A
1.30
0.90
1.45 MAX
0.15
0.05
0.22
0.08
C
0.10 C
NOTES: UNLESS OTHEWISE SPECIFIED
GAGE PLANE
A) THIS PACKAGE CONFORMS TO JEDEC
MO-178, ISSUE B, VARIATION AA,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) MA05Brev5
0.25
8°
0°
0.55
0.35
0.60 REF
SEATING PLANE
Figure 26. 5-LEAD, SOT-23, JEDEC MO-178, 1.6 mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packaging/tr/SOT23-5L_tr.pdf.
© 2010 Fairchild Semiconductor Corporation
FAN2502 / FAN2503 Rev. 1.1.0
www.fairchildsemi.com
11
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Datasheet contains the design specifications for product development. Specifications may change
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Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
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