Fairchild FAN7385M Dual-channel high-side gate-drive ic Datasheet

FAN7385
Dual-Channel High-Side Gate-Drive IC
Features
Description
„ Floating Channel for Bootstrap Operation to +600V
The FAN7385 is a monolithic high side gate drive IC
designed for high voltage, high speed driving MOSFETs
and IGBTs operating up to +600V.
„ Typically 350mA/650mA Sourcing/Sinking Current
„
„
„
„
„
„
Driving Capability
Extended Allowable Negative VS Swing to -9.8V for
Signal Propagation at VDD=VBS=15V
High-Side Output In-Phase of Input Signal
VDD & VBS Supply Range from 10V to 20V
3.3V and 5V Input Logic Compatible
Built-in Common Mode dv/dt Noise Canceling Circuit
Built-in UVLO Functions for Both Channels
Fairchild’s high-voltage process and common-mode
noise canceling technique provide stable operation of
high-side drivers under high-dv/dt noise circumstances.
An advanced level-shift circuit allows high-side gate
driver operation up to VS = -9.8V (typical) for VBS = 15V.
The UVLO circuits prevent malfunction when VBS1 and
VBS2 are lower than the specified threshold voltage.
Output drivers typically source/sink 350mA/650mA,
respectively, which is suitable for dual high-side switches
and half-bridge inverters.
Applications
„ Normal Half-Bridge and Full-Bridge Driver
14-SOP
„ PDP Energy Recovery Switch Control Driver
„ Switching Mode Power Supply
1
Ordering Information
Part Number
Package
Pb-Free
Operating Temperature
Range
14-SOP
Yes
-40°C ~ 125°C
(1)
FAN7385M
FAN7385MX
(1)
Packing Method
Tube
Tape & Reel
Note:
1. These devices passed wave soldering test by JESD22A-111.
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
www.fairchildsemi.com
FAN7385 Dual-Channel High-Side Gate-Drive IC
February 2007
FAN7385 Dual-Channel High-Side Gate-Drive IC
Typical Application Diagrams
VS
RBOOT
DBOOT1
Q3
FAN7385
D3
15V
IN1
IN2
1
VDD
2
NC
VB1
14
HO1
13
3
IN1
VS1
12
4
NC
NC
11
5
IN2
VB2
10
6
NC
HO2
9
7
GND
VS2
8
L1
D1
CBOOT1
To
Pannel
D2
Q4
D4
DBOOT2
Q1
Buffer IC
Q2
C1
CBOOT2
HVIC
FAN7380
FAN7382
C2
Energy Recovery
Sustain Driver
FAN7385 Rev.01
Figure 1. Floated Bidirectional Switch Control for PDP application
RBOOT1
VDC
DBOOT1
Full-Bridge Converter
15V
1
VDD
VB1
14
2
NC
HO1
13
3
IN1
VS1
12
CBOOT1
C1
4
NC
NC
11
5
IN2
VB2
10
6
NC
HO2
9
7
GND
VS2
8
Load
CBOOT2
Controller
RBOOT2
DBOOT2
L-CH Output
R-CH Output
FAN7385 Rev.01
Figure 2. Full-Bridge Power Supply Application
RBOOT
DBOOT
VDC
Q1
15V
VB1
1
VDD
2
NC
HO1
13
3
IN1
VS1
12
4
NC
NC
11
5
IN2
VB2
10
6
NC
HO2
9
7
GND
VS2
8
CBOOT
INPUT1
INPUT2
Resonant Converter
14
L
Vout
Q2
C1
C
Co
C2
FAN7385 Rev.01
Figure 3. Half-Bridge LCC Resonant Converter Application
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
www.fairchildsemi.com
2
VDD
DRIVER
R
R
S
13
HO1
12
VS1
10
VB2
9
HO2
8
VS2
Q
SCHMITT
TRIGGER INPUT
UVLO
5
NOISE
CANCELLER
R
S
DRIVER
7
PULSE
GENERATOR
500K
GND
NOISE
CANCELLER
3
500K
IN2
VB1
UVLO
1
PULSE
GENERATOR
IN1
14
R
Q
Pin 2, 4, 6 and 11 are not connection
FAN7385 Rev.01
Figure 4. Functional Block Diagram
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
www.fairchildsemi.com
3
FAN7385 Dual-Channel High-Side Gate-Drive IC
Internal Block Diagram
FAN7385 Dual-Channel High-Side Gate-Drive IC
Pin Configuration
VDD
1
14
VB1
NC
2
13
HO1
IN1
3
12
VS1
NC
4
11
NC
IN2
5
10
VB2
NC
6
9
HO2
GND
7
8
VS2
FAN7385
FAN7385 Rev.00
Figure 5. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
Description
1
VDD
Power supply
2
NC
Not connection
3
IN1
Channel 1 control input
4
NC
Not connection
5
IN2
Channel 2 control input
6
NC
Not connection
7
GND
Ground
8
VS2
Channel 2 floating supply return
9
HO2
Channel 2 output
10
VB2
Channel 2 floating supply
11
NC
Not connection
12
VS1
Channel 1 floating supply return
13
HO1
Channel 1 output
14
VB1
Channel 1 floating supply
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
www.fairchildsemi.com
4
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified.
Symbol
Parameter
Min.
Max.
Unit
VS
High-side offset voltage VS1 ,VS2
VB-25
VB+0.3
V
VB
High-side floating supply voltage VB1 ,VB2
-0.3
625
V
VHO
High-side floating output voltage HO1, HO2
VS-0.3
VB+0.3
V
VDD
Low-side and logic-fixed supply voltage
-0.3
25
V
-0.3
VDD+0.3
V
VDD-25
VDD+0.3
V
Allowable offset voltage slew rate
50
V/ns
Power dissipation
1.0
W
VIN
GND
dVS/dt
PD(2)(3)(4)
Logic input voltage (IN1, IN2)
Logic ground
θJA
Thermal resistance, junction-to-ambient
110
°C/W
TJ
Junction temperature
150
°C
TS
Storage temperature
150
°C
Notes:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
3. Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
4. Do not exceed PD under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Min.
Max.
Unit
VB
High-side floating supply voltage
Parameter
VS+10
VS+20
V
VS
High-side floating supply offset voltage
6-VDD
600
V
10
20
V
VDD
Supply voltage
VHO
High-side (HO1, HO2) output voltage
VIN
Logic input voltage (IN1, IN2)
TA
Ambient temperature
Condition
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
VS
VB
V
GND
VDD
V
-40
125
°C
www.fairchildsemi.com
5
FAN7385 Dual-Channel High-Side Gate-Drive IC
Absolute Maximum Ratings
VBIAS (VDD, VBS1, VBS2) = 15.0V, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to
GND. The VO and IO parameters are referenced to VS1 and VS2 and are applicable to the respective outputs HO1 and
HO2.
Symbol
Characteristics
Condition
Min. Typ. Max. Unit
SUPPLY CURRENT SECTION
IQDD
Quiescent VDD supply current
VIN1=VIN2=0V or 5V
28
50
μA
IPDD
Operating VDD supply current
fIN1=fIN2=10kHz, rms value
35
70
μA
BOOTSTRAPPED POWER SUPPLY SECTION
VBSUV+
VBS1 and VBS2 supply under-voltage
positive going threshold
VBS1=VBS2=Sweep
8.2
9.1
10.2
V
VBSUV-
VBS1 and VBS2 supply under-voltage
negative going threshold
VBS1=VBS2=Sweep
7.6
8.5
9.6
V
VBSHYS
VBS1 and VBS2 supply under-voltage
lockout hysteresis
VBS1=VBS2=Sweep
0.6
V
Offset supply leakage current
VB=VS=600V
10
μA
IQBS1,2
Quiescent VBS1 and VBS2 supply current
VIN1=0V or 5V
50
85
μA
IPBS1,2
Operating VBS1 and VBS2 supply current
fIN1=10kHz, rms value
220
300
μA
ILK
GATE DRIVER OUTPUT SECTION
VOH
High-level output voltage, VBIAS-VO
IO=0mA (No Load)
30
mV
VOL
Low-level output voltage, VO
IO=0mA (No Load)
30
mV
IO+
Output HIGH short-circuit pulse current
VO=0V, VIN=5V with PW<10µs
250
350
mA
IO-
Output LOW short-circuit pulsed current
VO=15V, VIN=0V with PW<10µs
500
650
mA
VS
Allowable negative VS pin voltage for IN
signal propagation to HO
-9.8
-7.0
V
LOGIC INPUT SECTION (IN1 AND IN2)
VIH
Logic "1" input voltage
VIL
Logic "0" input voltage
2.5
IIN+
Logic "1" input bias current
VIN=5V
IIN-
Logic "0" input bias current
VIN=0V
RIN
Input pull-down resistance
V
10
400
500
1.3
V
20
μA
2.0
μA
600
KΩ
Dynamic Electrical Characteristics
TA=25°C, VBIAS (VDD, VBS1, VBS2) = 15.0V, VS1 = VS2 = GND, CLoad = 1000pF unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
ton
Turn-on propagation delay
VS=0V
110
180
ns
toff
Turn-off propagation delay
VS=0V or 600V(5)
110
180
ns
tr
Turn-on rise time
50
90
ns
tf
Turn-off fall time
30
70
ns
Delay matching, Channel 1 & 2 turnon/off
0
MT
ns
Notes:
5. This parameter guaranteed by design.
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
www.fairchildsemi.com
6
FAN7385 Dual-Channel High-Side Gate-Drive IC
Electrical Characteristics
10.00
9.0
9.75
8.8
VBSUVN [V]
VBSUVP [V]
9.50
9.25
9.00
8.75
8.50
8.6
8.4
8.2
8.25
8.00
-40
-20
0
20
40
60
80
100
8.0
-40
120
-20
0
Temperature [°C]
Figure 6. VBS UVLO (+) vs. Temperature
40
60
80
100
120
Figure 7. VBS UVLO (-) vs. Temperature
70
1.0
VIN1= VIN2=GND
60
0.8
50
IQDD [μA]
VBSHYS [V]
20
Temperature [°C]
0.6
0.4
40
30
20
0.2
0.0
-40
10
-20
0
20
40
60
80
100
0
-40
120
-20
0
Temperature [°C]
Figure 8. VBS UVLO Hysteresis vs. Temperature
80
100
120
70
50
60
IPDD [μA]
IQBS [μA]
60
80
VIN1= VIN2=GND
60
40
30
50
40
20
30
10
20
-20
0
20
40
60
80
10
-40
100 120
Temperature [°C]
-20
0
20
40
60
80
100
120
Temperature [°C]
Figure 10. VBS Quiescent Current vs. Temperature
Figure 11. VDD Operating Current vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
40
Figure 9. VDD Quiescent Current vs. Temperature
70
0
-40
20
Temperature [°C]
www.fairchildsemi.com
7
FAN7385 Dual-Channel High-Side Gate-Drive IC
Typical Characteristics
300
20
18
16
14
12
10
8
6
4
2
0
-40
275
IN+ [μA]
IPBS [μA]
250
225
200
175
150
125
100
-40
-20
0
20
40
60
80
100
120
-20
0
Temperature [°C]
2.0
2.7
1.5
2.6
1.0
2.5
0.5
0.0
-0.5
100
120
2.4
2.3
-20
0
20
40
60
80
100
2.0
-40
120
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 14. Logic Low Input Current vs. Temperature
Figure 15. Logic Input High Voltage vs. Temperature
1000
800
RIN [kΩ]
VIL [V]
80
2.1
-1.5
600
400
200
-20
0
20
40
60
80
100
0
-40
120
Temperature [°C]
-20
0
20
40
60
80
100
120
Temperature [°C]
Figure 16. Logic Input Low Voltage vs. Temperature
Figure 17. Logic Input Resistance vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
60
2.2
-1.0
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
-40
40
Figure 13. Logic High Input Current vs. Temperature
VIH [V]
IN- [μA]
Figure 12. VBS Operating Current vs. Temperature
-2.0
-40
20
Temperature [°C]
www.fairchildsemi.com
8
FAN7385 Dual-Channel High-Side Gate-Drive IC
Typical Characteristics (Continued)
100
80
90
70
80
60
tF [ns]
tR [ns]
70
60
50
40
50
40
30
30
20
20
10
10
-40
-20
0
20
40
60
80
100
0
-40
120
-20
0
Temperature [°C]
Figure 18. Rising Time vs. Temperature
180
170
170
160
160
tOFF [ns]
tON [ns]
150
140
130
120
110
40
60
100
120
130
120
20
80
140
100
0
60
150
110
-20
40
Figure 19. Falling Time vs. Temperature
180
90
-40
20
Temperature [°C]
80
100
100
-40
120
-20
0
Temperature [°C]
20
40
60
80
100
120
Temperature [°C]
Figure 20. Turn-On Delay Time vs. Temperature
Figure 21. Turn-Off Delay Time vs. Temperature
20
-14
15
-12
VS [V]
MT [ns]
10
5
0
-8
-5
-10
-15
-40
-6
-20
0
20
40
60
80
100
120
-40
Temperature [°C]
-20
0
20
40
60
80
100
120
Temperature [°C]
Figure 22. Delay Matching Time vs. Temperature
Figure 23. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
-10
www.fairchildsemi.com
9
FAN7385 Dual-Channel High-Side Gate-Drive IC
Typical Characteristics (Continued)
750
380
700
360
650
IO- [V]
IO+ [V]
400
340
320
300
-40
600
550
-20
0
20
40
60
80
100
500
-40
120
-20
0
Temperature [°C]
40
60
80
100
120
Figure 25. Output Low Short-Circuit Pulse Current
vs. Temperature
80
80
60
60
IPDD [μA]
IQDD [μA]
Figure 24. Output High Short-Circuit Pulse Current
vs. Temperature
40
20
0
0
20
Temperature [°C]
40
20
5
10
15
20
0
0
25
5
Supply Voltage [V]
10
15
20
Supply Voltage [V]
Figure 26. VDD Quiescent Current vs.
Supply Voltage
Figure 27. VDD Operating Current vs.
Supply Voltage
250
80
70
200
tR [ns]
IPBS [μA]
60
150
100
50
40
30
50
0
0
20
5
10
15
10
10
20
Supply Voltage [V]
12
13
14
15
16
17
18
19
20
Supply Voltage [V]
Figure 28. VBS Operating Current vs. Supply Voltage
Figure 29. Rising Time vs. Supply Voltage
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
11
www.fairchildsemi.com
10
FAN7385 Dual-Channel High-Side Gate-Drive IC
Typical Characteristics (Continued)
50
160
150
140
tON [ns]
tF [ns]
40
30
20
130
120
110
100
90
10
10
11
12
13
14
15
16
17
18
19
80
10
20
11
12
Supply Voltage [V]
Output Sourcing Current [mA]
150
tOFF [ns]
140
130
120
110
100
90
12
13
14
15
16
17
16
17
18
19
20
18
19
20
500
450
400
350
300
250
200
10
11
12
13
14
15
16
17
18
19
20
Supply Voltage [V]
Supply Voltage [V]
Figure 32. Turn-Off Delay Time vs. Supply Voltage
Figure 33. Output Source Current vs. Supply Voltage
1000
-4
900
-6
800
-8
VS [V]
Output Sourcing Current [mA]
15
Figure 31. Turn-On Delay Time vs. Supply Voltage
160
11
14
Supply Voltage [V]
Figure 30. Falling Time vs. Supply Voltage
80
10
13
700
600
-10
-12
-14
500
-16
400
10
11
12
13
14
15
16
17
18
19
20
10
Supply Voltage [V]
12
13
14
15
16
17
18
19
20
Supply Voltage [V]
Figure 34. Output Sink Current vs. Supply Voltage
Figure 35. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Supply Voltage
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
11
www.fairchildsemi.com
11
FAN7385 Dual-Channel High-Side Gate-Drive IC
Typical Characteristics (Continued)
10μF
HVIC
0.1μF
50%
VDD
15V
VB
GND
IN
50%
IN
10μF
ton
0.1μF
tr
15V
IN
toff
tf
90%
90%
HO
VS
1000pF
OUT
10%
10%
(B)
(A)
FAN7385 Rev.00
Figure 36. Switching Time Test Circuit
IN1
IN2
HO1
HO2
FAN7385 Rev.00
Figure 37. Input / Output Waveforms
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
www.fairchildsemi.com
12
FAN7385 Dual-Channel High-Side Gate-Drive IC
Switching Time Definitions
1. Under-Voltage Lockout (UVLO)
2.2 Gate Drive Loop
The FAN7385 has an under-voltage lockout (UVLO)
protection circuit to prevent malfunction when VBS1 and
VBS2 are lower than the specified threshold voltage. The
UVLO circuit monitors the bootstrap capacitor voltages
(VBS1, VBS2) independently.
Current loops behave like antennae, able to receive and
transmit noise. To reduce the noise coupling/emission
and improve the power switch turn-on and off performances, gate drive loops must be reduced as much as
possible.
2.3 Ground Plane
2. Layout Consideration
To minimize noise coupling, avoid placing the ground
plane under or near the high-voltage floating side.
For optimum performance, considerations must be given
during printed circuit board (PCB) layout.
2.1 Supply Capacitors
If the output stages are able to quickly turn on a switching device with a high current value, the supply capacitors must be placed as close as possible to the device
pins (VDD and GND for the ground-tied supply, VB and
VS for the floating supply) to minimize parasitic inductance and resistance.
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
www.fairchildsemi.com
13
FAN7385 Dual-Channel High-Side Gate-Drive IC
Typical Application Information
FAN7385 Dual-Channel High-Side Gate-Drive IC
Package Dimensions
14-SOP
Dimensions are in millimeters unless otherwise noted.
MIN
#8
MAX0.10
MAX0.004
1.80
MAX
0.071
3.95 ±0.20
0.156 ±0.008
5.72
0.225
0~
8°
+0.10
0.20 -0.05
+0.004
0.008 -0.002
6.00 ±0.30
0.236 ±0.012
+0.10
0.406 -0.05
+0.004
0.016 -0.002
#7
1.27
0.050
#14
8.70
MAX
0.343
#1
8.56 ±0.20
0.337 ±0.008
(
0.47
)
0.019
1.55 ±0.10
0.061 ±0.004
0.05
0.002
0.60 ±0.20
0.024 ±0.008
January 2001, Rev. A
14sop225b_dim.pdf
Figure 38. 14-Lead Small Outline Package (SOP)
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
www.fairchildsemi.com
14
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I23
© 2006 Fairchild Semiconductor Corporation
FAN7385 Rev. 1.0.2
www.fairchildsemi.com
15
FAN7385 Dual-Channel High-Side Gate-Drive IC
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an
exhaustive list of all such trademarks.
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