Fairchild FAN7686 Pc power supply output monitoring ic Datasheet

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FAN7685/FAN7686/FAN7687
PC Power Supply Output Monitoring IC
Features
Description
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The FAN7685/FAN7686/FAN7687 is a complete output
supervisory circuitry intended for use in the secondary side
of the switched mode power supply. It provides overvoltage
protection (OVP), undervoltage protection(UVP), overcurrent protection (OCP), and power good signal generator to
monitor and control the outputs of the switching power supply system. Remote on/off(PSON) control and some precision protection features are also implemented.
It directly senses all the output rails for OVP, UVP, and OCP
without external divider resistors. As for output control,
power good output(PGO) and fault protection output(FPO)
are included. The FAN7685/FAN7686/FAN7687 offers a
simple and cost effective solution with minimum number of
external components and greatly reduces PCB board space
for power supply.
PC Power Supply Outputs Supervisory Circuitry
Few External Components
Over Voltage Protection for 3.3V, 5V and 12V Outputs
Under Voltage Protection for 3.3V, 5V and 12V Outputs
Over Current Protection for 3.3V, 5V and 12V Outputs
Dual Over Current Portection for 12V Outputs(FAN7687)
Fault Protection Output With Open Drain Output
Open Drain Power Good Output
300ms Power Good Delay
38ms PSON On/Off Delay
73us Debounce
2.3ms PSON to FPO Turn Off Delay
Latch Function Controlled by PSON
Typical Application
14DIP
• PC Switching Mode Power Supply
1
14SOP
1
Rev. 1.1.0
©2004 Fairchild Semiconductor Corporation
FAN7685/FAN7686/FAN7687
Internal Block Diagrams
Vcc
Vcc 13
Start-up
PSON
3.6V
REF.
clr
Delay
2.3ms
Vref
Oscillator
POR
VS12 10
CLK
CLK
Reset
(9)
R
UVP
VS5 12
L
L
R
L
H
VS33 11
Delay
75ms
Debounce
73us
L
S
3
FPO
H FPO
L
Q
L
CLK
CLK
L
L
R
PWR
clr
L
L
PGI_O
R
Vcc
150uA
3.6V
OVP L
PSON L
L
L
4 PSON
CLK
R
Vref
L
Debounce
38ms
L
3.6V
H
Q
IS33 9
2
L
L
H
(8)
14 PGO
L
IS5 8
L
(7)
GND
H
UVP
H
IS12 5
R
L
L
Vcc
H
Iref
Short
Detector
H
when AC ON
L
8*Iref
8*Iref
8*Iref
H
L
CLK
Debounce
73us
H Delay
clr 300ms
Vref
1.2V
FAN7685
(FAN7686)
CLK
PSON
VCC12 13
6
1
RI
PGI
Vcc
Start-up
PSON
3.6V
REF.
clr
Delay
2.3ms
Vref
Oscillator
POR
Power On Reset
CLK
CLK
Reset
R
UVP
Block
UVP
L
L
R
L
H
VS12 10
Delay
75ms
L
L
R
Debounce
73us
L
S
Q
3 FPO
H FPO
L
CLK
CLK
clr
VS5 12
L
VS33 11
OVP
Block
L
PGI_O
R
Vcc
150uA
3.6V
OVP
L
PSON L
Debounce
38ms
R
L
L
4 PSON
CLK
3.6V
H
IS33 9
Q
L
2 GND
L
L
14 PGO
IS5 8
H
OCP
COMPs
IS12 5
H
Iref
ISVCC12 7
L
L
1.2V
8*Iref
L
PSON
6
1
RI
PGI
R
H
L
CLK
Debounce
73us
H
Short
Detector
when AC ON
H
H
H Delay
clr 300ms
CLK
Vref
2
L
UVP
Vcc
FAN7687
FAN7687A
FAN7685/FAN7686/FAN7687
Pin Assignments
PGI 1
14 PGO
GND 2
RI 6
GND 2
12 VS5
FPO 3
11 VS33
PSON 4
10 VS12
IS12 5
9 IS33
NC 7
RI 6
8 IS5
IS5 7
14 PGO
PGI
1
14 PGO
13 VCC
GND
2
13 VCC12
12 VS5
FPO
3
11 VS33
PSON 4
10 NC
IS12
5
9 VS12
RI
6
8 IS33
F A N 7687
FAN7687A
IS12 5
13 VCC
F A N 7 686
PSON 4
F A N 7 685
FPO 3
PGI 1
ISVCC12 7
12 VS5
11 VS33
10 VS12
9 IS33
8 IS5
Pin Definitions
Pin Number
Pin Name
I/O
1
PGI
I
Power Good Input
2
GND
-
Ground
3
FPO
O
Fault Protection Output, Open Drain Output
4
PSON
I
Remote On/Off Control Input
5
IS12
I
12V Over Current Protection
6
RI
O
Reference Current Setting Resistor
No Connection(FAN7685)
NC
7
8
9
10
Pin Function Description
IS5*
I
5V Over Current Protection(FAN7686)
ISVCC12**
I
12V-II Over Current Protection(FAN7687)
IS5
I
5V Over Current Protection(FAN7685/7)
IS33*
I
3.3V Over Current Protection(FAN7686)
IS33
I
3.3V Over Current Protection(FAN7685/7)
VS12*
I
12V Output Over/Under Voltage Protection(FAN7686)
VS12
I
12V Output Over/Under Voltage Protection(FAN7685/7)
No Connection(FAN7686)
NC*
11
VS33
I
3.3V Output Over/Under Voltage Protection
12
VS5
I
5V Output Over/Under Voltage Protection
Vcc
I
Supply Voltage(FAN7675/6)
VCC12**
I
Supply Voltage & 12V-II OV/UV Protectioin(FAN7687)
PGO
O
Power Good Output, Open Drain Output
13
14
Notes :
* : FAN7686 Pin Definitions
** : FAN7687/FAN7687A Pin Definitions
3
FAN7685/FAN7686/FAN7687
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
VCC, VCC12
16
V
VPSON, VS5, VS33, VPGI,
IS5, IS33
8
VS12, IS12, ISVCC12
16
VPGO
8
VFPO
16
Operating Temperature
Topr
-40 ~ 125
°C
Storage Temperature
Tstg
-55 ~ 150
°C
Power Dissipation
PD
1
W
Supply Voltage
Input Voltage
Output Voltage
V
V
*Note : Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device.
Recommended Operating Conditions
Characteristic
Supply Voltage
Input Voltage
Output Voltage
Output Sink Current
Supply Voltage Rising Time, See Note1
Output Current for RI
Note
1. VCC slew rate must be less than 14V/ms.
4
Min.
Typ.
Max.
Unit
15
V
VCC, VCC12
4
VPSON , VS5, VS33, VPGI, IS5,
IS33
-
-
7
VS12, IS12, ISVCC12
-
-
15
VPGO
-
-
7
V
VFPO
-
-
15
V
IFPO
-
-
30
mA
IPGO
-
-
10
mA
tr
1
IO(RI)
12.5
V
ms
-
62.5
uA
FAN7685/FAN7686/FAN7687
Electrical Characteristics(VCC = 5V, Ta=25°C, unless otherwise specified)
Over Voltage Protection, Under Voltage Protection and FPO
Parameter
Test Condition
VS33
Over Voltage Threshold
VS5
VS12,
VCC12
VS33
Under Voltage Threshold
VS5
VS12,
VCC12
Ratio of Current Sense Sink Current to
Current Sense Setting Pin(RI) Source
Current
Iref
FAN7687A
Min.
Typ.
Max.
3.9
4.1
4.3
3.77
5.8
FAN7687A
FAN7687A(VS12)
13.71
FAN7687A(VCC12)
13.42
2.55
FAN7687A
2.88
FAN7687A
4.37
4.1
8.8
FAN7687A(VS12)
FAN7687A(VCC12)
4.06
6.1
6.4
13.8
14.3
5.71
13.3
Unit
6.16
V
14.79
14.5
2.69
2.83
3.02
4.3
4.5
4.58
9.3
V
9.8
10.5
11.0
10.21
10.71
Resistor at RI=30kΩ,
0.1% Resistor
7.6
8
8.4
Offset Voltage of OCP Comparator
Voffset
VPSON=0V
-5
-
5
mV
Leakage Current(FPO)
ILKGI
VFPO = 5V
-
-
5
uA
Low Level Output Voltage(FPO)
VOLI
IFPO=10mA
-
-
0.3
IFPO=30mA
-
-
0.7
1.16
1.20
1.24
V
V
PGI and PGO
Input Threshold Voltage(PGI)
VPGI
Leakage Current(PGO)
ILKG2
VPGO = 5V
-
-
5
uA
Low Level Output Voltage(PGO)
VOL2
IPGO=10mA
-
-
0.4
V
Input Pull-up Current
IPSON
VPSON = 0V
-
150
-
uA
High-Level Input Voltage
VIHPS
2.4
-
-
V
Low-Level Input Voltage
VILPS
-
-
1.2
V
-
-
1
mA
25
38
51
ms
PSON Control
Total Device
Supply Current
ICC
VPSON = 5V
Switching Characteristics
Debounce Time(PSON)
Noise Debounce Time
PGO Delay Time(PGI to PGO)
tb1
tb2*
td1
73
100
us
300
410
ms
td2
FPO goes low and
every time PGI > 1.2
51
75
102
ms
td4*
FPO goes low and
everytime PGI<1.2
200
300
410
ms
Internal UVP Delay Time
PSON off to FPO Delay Time
50
200
td3
tb1+1.6 tb1+2.3 tb1+3.2
ms
* : These parameters although guaranteed over the recommended operating conditions, are not 100% tested in production.
5
FAN7685/FAN7686/FAN7687
Timing Chart
1) AC Input ON/OFF - Normal State
VCC
AC Input
Enable
POR
PSON
FPO
tb1
PGI
AC Input
Disable
UVP
Threshold
OUT
tb2+td1
PGO
2) PSON ON/OFF - Normal State
PSON
FPO
td3
tb1
PGI
UVP
Threshold
OUT
tb1+tb2
PGO
6
tb2+td1
FAN7685/FAN7686/FAN7687
3) Under Voltage at Normal State
PSON
Latch
FPO
tb1
tb2
PGI
UVP
Threshold
UVP
Threshold
OUT
tb2+td1
PGO
4) Under Voltage at AC Input ON
VCC
AC Input
Enable
POR
Latch
PSON
FPO
PGI
tb1
tb2+td2
PGI
Threshold
UVP
Threshold
OUT
PGO
tb2+td1
7
FAN7685/FAN7686/FAN7687
5) Under Voltage at PSON ON/OFF
Latch
PSON
FPO
td3
tb1
tb2+td2
PGI
PGI
Threshold
UVP
Threshold
OUT
tb1+tb2
tb2+td1
PGO
6) Over Voltage at PSON ON/OFF
PSON
FPO
Latch
tb2
PGI
OUT
PGO
8
tb1
UVP
Threshold
OVP
Threshold
tb2+td1
FAN7685/FAN7686/FAN7687
Typical Application Circuits
FAN7685 Application Circuit
12V Output
RS_12V
RIS12
5V Output
RS_5V
RIS5
PWM
VS12
IS12
5V Coil
VS5
IS5
3.3V Coil
3.3V Output
RS_3.3V
RIS33
VS33
IS33
5Vsb
1 PGI
PSON
FPO
4 PSON
5 IS12
5Vsb
VCC 13
F A N 7685
3
PGO
PGO 14
2 GND
VS5
VS5 12
VS33 11
VS33
VS12 10
VS12
6 RI
IS33
9
7 NC
IS5
8
FAN7687 Application Circuit
12V-I Output
RS_12V-I
RIS12
VS12
IS12
5V Coil
5V Output
RS_5V
RIS5
PWM
VS5
IS5
3.3V Coil
3.3V Output
RIS33
RS_3.3V
VS33
IS33
12V_II Coil
12V-II Output
RS_12V-II
RISVCC12
ISVCC12
5Vsb
1 PGI
PGO 14
2 GND
FPO
PSON
4 PSON
IS12
5 IS12
5Vsb
VCC12 13
F A N 7687
3
PGO
6 RI
7 ISVCC12
VS5 12
VS5
VS33 11
VS33
VS12 10
VS12
IS33
9
IS33
IS5
8
IS5
ISVCC12
9
FAN7685/FAN7686/FAN7687
Application Information
Power Good(PGO) and Power Good Delay
A PC power supply is commonly designed to provide the motherboard with a power good signal, which is defined by the computer manufacturers. If the +3.3V, +5V, and +12V outputs are above the undervoltage threshold limit, the PC power supply
makes the power good signal high. At this time the power supply should be able to provide enough power to assure continuous
operation within the specification. Conversely, when one of the +3.3V, +5V, or +12V outputs falls below the undervoltage
threshold or rises above the overvoltage threshold, or when main power has been turned off for a sufficiently long time so that
power supply operation is no longer assured, a PGO signal will be a low state.
The AC input, power good(PGO), remote on/off(PSON), and +3.3V/+5V/+12V supply rails are shown in the below figure.
T1
T5
VAC
PSON
+12VDC
+5VDC
+3.3VDC
PGO
95%
10%
T3
T2
T4
T6
Although there is no requirement to meet specific timing parameters, the following signal timings are recommended :
-T1(Power On Time) : T1 < 500ms
-T2(Rise Time) : 0.1ms ≤ T2 ≤ 20ms
-T3(PGO Delay) : 100ms < T3 <500ms
-T4(PGO Delay Risetime) : T4 ≤ 10ms
-T5(AC Loss to PGO Hold-Up Time) : T5 ≥ 16ms
-T6(Power Down Warning) : T6 ≥ 1ms
Furthermore, motherboards should be designed to comply with the above recommended timing range. If timings other than
these are implemented or required, that information should be clearly specified.
The FAN7685/FAN7686/FAN7687 provide a power good(PGO) signal for the +3.3V, +5V and +12V supply voltage rails and
a separate power good input(PGI). An internal delay circuit is used to generate a 300ms power good delay.
If voltages at PGI(+1.2V), VS33(+3.3V), VS5(+5V), and VS12(+12V) rise above the undervoltage threshold, the open drain
power good output(PGO) will go high after a delay of 300ms. When the PGI voltage or any of +3.3V, +5V, and +12V rails
drops below the undervoltage threshold, the PGO signal will be disabled immediately.
Power Supply Remote On/Off(PSON) and Fault Protection Output(FPO)
Since the latest personal computer generation focuses on easy turn on and power saving functions, a PC power supply will
require two characteristics. One is a dc power supply remote on/off function; the other is standby power to achieve very low
power consumption of the PC power supply. Thus, the main power needs to be shut down.
The power supply remote on/off(PSON) is an active-low signal that turns on all of the main power rails including the +3.3V,
+5V, and +12V power rails. When this signal is held high by the PC motherboard or left open circuited, the signal of the fault
protect output(FPO) also goes high. Thus, the main power rails can not deliver current and are held at 0V.
When the FPO signal is held high due to a fault condition, the fault status will be latched and the outputs of the main power
rails can not deliver current and are held at 0V. Toggling the PSON input signal from low to high will reset the fault protection
latch. During this fault condition only the standby power is not affected.
When the PSON input signal goes from high to low or low to high, the 38ms debounce block will be active to avoid that a
glitch on the PSON input may disable/enable the FPO output. When the PSON is set low, the undervoltage function is disabled
for 75ms to avoid turn-on failure. At turn-off, there is an additional delay of 2.3ms from PSON to FPO.
Power should be delivered to the rails only when the PSON signal is held at ground potential, thus the FPO becomes a low
10
FAN7685/FAN7686/FAN7687
state after a debounce of 38ms. The FPO pin can be connected to +5V(or up to +15V) through a pull-up resistor.
Under Voltage Protection
The FAN7685/FAN7686/FAN7687 provide undervoltage protection(UVP) for the +3.3V, +5V, and +12V power rails. When
an undervoltage condition appears at one of the VS33(+3.3V), VS5(+5V), or VS12(+12V) input pins for more than 73us, the
PGO goes low and FPO output goes high. Also, this fault condition will be latched until the PSON is toggled from low to high
or the Vcc falls below a minimum operating voltage.
When the power supply is turned on by the AC input or PSON, an internal UVP delay time is 75ms. But at normal state an
UVP delay time is only a 73us debounce time. The need for undervoltage protection is often overlooked in off-line switching
power supply system design. But it is very important in battery powered or hand-held equipment since the TTL or CMOS
logic often malfunctions under UVP condition.
Over Voltage Protection(OVP)
The overvoltage protection(OVP) of the FAN7685/FAN7686/FAN7687 monitor +3.3V, +5V, and +12V. When an overvoltage
condition appears at one of the +3.3V, +5V, or +12V input pins for more than 73us, the FPO output goes high and the PGO
goes low. Also, this fault condition will be latched until the PSON is toggled from low to high or Vcc drops below a minimum
operating voltage. During overvoltage condition, most power supplies have the potential to deliver higher output voltages than
those normally specified or required. In unprotected equipment, it is possible for output voltages to be high enough to cause
internal or external damage to the system. To protect the system under these abnormal conditions, it is common practice to provide overvoltage protection within the power supply.
Because TTL and CMOS circuits are very vulnerable to overvoltage, it is becoming industry standard to provide overvoltage
protection on all +3.3V, +5V, and +12V outputs. Therefore, not only the +3.3V and +5V rails for the logic circuits on the motherboard need to be protected, but also the +12V peripheral devices such as the hard disk, flopply disk, and CD-ROM players
etc., need to be protected.
Over Current Protection
In bridge or forward type, off-line switching power supplies, usually designed from medium to large power, the overload protection design needs to be very precise. Most of these types of power supplies are sensing the output current for an overload
condition. The trigger point needs to be set higher than the maximum load in order to prevent false turn-on.
During safety testing the power supply might have tied the output voltage direct to ground. If this happens during the nomal
operating, this is called a short-circuit or over current condition. When it happens before the power supply turns on, this is
called a short-circuit power supply turn-on. It can happen during the design period, in the production line, at quality control
inspection or at the end user. The FAN7685/FAN7686/FAN7687 provide an UVP and OCP with a 75ms delay after PSON is
set low.
The FAN7685/FAN7686/FAN7687 provide overcurrent protection(OCP) for the 3.3V, 5V, and 12V rails. When an overcurrent
condition appears at the OCP comparator input pins for more than 73us, the FPO output goes high and PGO goes low. Also,
this fault condition will be latched until PSON is toggled from low to high or Vcc is removed.
The resistor connected between the RI pin and the GND pin will introduce an accurate IO(RI) for the OCP function. Of course,
a more accurate resistor tolerance will be better. The formula for choosing the RI resistor is VRI/IO(RI). The IO(RI) range is
from 12.5uA to 62.5uA. Four OCP comparators and the IO(RI) section are supplied by VS12. Current drawn from the VS12pin
is less than 1mA.
Following is an example on calculating OCP for the 12V rail :
V RI
1.2V- = 60kΩ
RI = ------------- = ------------I O ( RI )
20uA
I O ( RI ) × K × R ( IS12 ) = R ( sense ) × I ( OCP – Trip )
I ( OCP – Trip ) = 20u × 8 × 560Ω ⁄ ( 0.01Ω ) = 9.2A
11
FAN7685/FAN7686/FAN7687
Mechanical Dimensions
Package
Dimensions in millimeters/inches
14-DIP
12
FAN7685/FAN7686/FAN7687
Mechanical Dimensions
Package
Dimensions in millimeters/inches
14-SOP
13
FAN7685/FAN7686/FAN7687
Ordering Information
Product Number
Package
Operating Temperature
Packing
14DIP
-40 ~ 125°C
Tube
14SOP
-40 ~ 125°C
Tube
14SOP
-40 ~ 125°C
Tape & Reel
FAN7685N
FAN7686N
FAN7687N
FAN7687AN
FAN7685M
FAN7686M
FAN7687M
FAN7687AM
FAN7685MX
FAN7686MX
FAN7687MX
FAN7687AMX
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
3/9/04 0.0m 001
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 2004 Fairchild Semiconductor Corporation
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