FD5T Series FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 • Pletronics’ FD51T Series is a quartz crystal controlled precision square wave generator • Output frequency 32.768KHz • Selectable low jitter or spread spectrum output. • Device characteristics may be either factory or field programmable • Tape and Reel or cut tape packaging is available • • 3.2 x 5 mm LCC Ceramic Package • Stability is much better than an XY cut watch crystal • Very fast Start-up time, <10mS • Low power • 1.8V, 2.5 or 3.3V LVCMOS outputs • Designed for high density SMD needs Vdd 1.8V (5) Vddout Reference oscillator optional Voltage controlled (6) Optional Vcontrol S2/SCL (1) S1/SDA (2) Ground (3) PLL Multiplier #1 optional Spread Spectrum optional Bypass Mode MUX #1 Divider #1 /1 to /1023 Y1 (4) Out - Programming control - eePROM - SDA/SCL Registers - Sx Control Pletronics Inc. certifies this device is in accordance with the RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives. Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s Weight of the Device: 0.09 grams Moisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e4 Absolute Maximum Ratings: Parameter Unit VDD -0.5V to +2.5V VDDOUT -0.5V to +4.6V Vi Input Voltage -0.5V to VDD+ 0.5V Vo Output Voltage -0.5V to VDDOUT + 0.5V Io Continuous Output Current _ + 50 mA Tj Maximum Junction Temperature 125oC Thermal Resistance, Junction to Case 50oC/Watt Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty. Production processsing does not necessarily include testing of all parameters. Copyright © 2009, Pletronics Inc. FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 Description: The FD51xxT-32.768K is derived from the PLE FD51T series Programmable CMOS Clock Oscillator which is a modular PLL-based low cost, high-performance oscillator. The frequency output is set to 32.768KHz. The FD51xxT-32.768K base frequency is a 24.576MHz AT cut fundamental mode crystal. The FD5T has a separate output supply pin, VDDOUT, for either 1.8, 2.5 or 3.3V output logic levels. The device supply, VDD which provides power to all the internal circuits, is nominally 1.8V. The PLL is only utilized to support Spread Spectrum Clocking (SSC), in all other cases the PLL is disabled to reduce power. SSC may be programmed to be either center-spread or down-spread. This is an important technique to reduce electro-magnetic interference (EMI). The device supports non-volatile eePROM programming for easy customization of the device. As shipped, the device is pre-programmed. However, the FD51xxT-32.768K may be reprogrammed to a different configuration. Reprogramming may be either prior to assembly, or in-circuit via a 2-wire SDA/SCL I2C bus. In-circuit programming is not allowed if the VCXO function is needed. Two programmable control inputs, S1 and S2, may be used to control various aspects of FD51xxT-32.768K operation including selection of alternative frequency set(s), selection of SSC functionality, output tri-state and power-down. Reference Oscillator The VCXO input has a limited voltage range, the VCXO is associated with the internal 1.8V core. A resistor in series with the Vcontrol input will permit interfacing to 3.3V analog circuits, the voltage range that changes the frequency will still be limited but the larger voltages swings will not cause problems. The VCXO function is only enabled (internally connected) if the part number indicates a VCXO specification. When the VCXO function is enabled the I2C programming mode will be disabled. PLL Multiplier The PLL Multiplier is enabled when tight tolerances are needed or when the spread spectrum function is needed. Spread Spectrum The PLL has its individual Spread Spectrum (SS) function that can be enabled. This permits the modulation of the output frequency by a user-set amount. Divider Section The dividers operate on the output of the PLL. The divider on the PLL can divide by 1 through 1023 and is set to 750 in this case. There is only 1 setting allowed per divider. These are not set by the Sx input state. The dividers add very little jitter to the output signals. Multiplexers MUX #1 selects the input to the Divider #1, this can be the reference oscillator signal or the output from www.pletronics.com 425-776-1880 2 FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 PLL Multiplier #1. The device can make only one of the setting of connections shown in the block diagram (only one pattern stored in eePROM). Control Inputs The two inputs, S1/SDA and S2/SCL can be configured in two ways. 1) Used as 2 user inputs to permit up to 4 states, Sx input setting. 2) The SDA and SCL become clock and data inputs to write to the FD5T internal setting memory. The interface follows the I2C protocol. If the SDA and SCL are not set then the internal eePROM sets the operation. (Not allowed if the VCXO function is specified.) Standard Configuration S1 S2 Output SS PLL Low Low Tri State --- Disable High Low 32.768KHz ±1% centered Enable Low High 32.768KHz ±2% centered Enable High High 32.768KHz none Disable www.pletronics.com 425-776-1880 3 FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 PART NUMBER: FD5 1 45 T L E -32.768K -YYY Packaging code or blank T250 = 250 per Tape and Reel T500 = 500 per Tape and Reel T1K = 1000 per Tape and Reel Output Frequency - 32.768KHz Optional Enhanced Operating temperature Range Blank = Temp. range -20oC to +70oC E = Temp. range -40oC to +85oC Blank = VDDOUT 3.3V, 2.5V and 1.8V device L = VDDOUT 1.8V only - high output drive level device Series Model Frequency Stability for fixed frequency oscillator 45 = + _ 50 ppm 15 = + _ 15 ppm1 44 = _ + 25 ppm 10 = + _ 10 ppm1 20 = _ + 20 ppm Frequency Pull Ability for VCXO option enabled 99 = _ + 100 ppm Absolute Pull Range (APR) 75 = _ + 25 ppm Absolute Pull Range (APR) 50 = _ + 50 ppm Absolute Pull Range (APR) 1 = 1 output 1 PLL version Series Model 1 In these cases the PLL will be enabled and the power dissipation will be higher. Part Marking: PLE FD51 32.768K YMD Marking Legend: PLE = Pletronics YMD = Date of Manufacture (year-month-day) All other marking is internal factory codes Codes for Date Code YMD Code 8 9 0 1 2 Code A B C D E F G H J K L M Year 2008 2009 2010 2011 2012 Month JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC Code Day Code Day 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A 10 B 11 C 12 D 13 E 14 F 15 H 17 J 18 K 19 L 20 M 21 N 22 P 23 R 24 T 25 U 26 V 27 W 28 X 29 Y 30 Z 31 www.pletronics.com 425-776-1880 4 G 16 FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 Electrical Specification over the specified temperature range, Item Min Max Unit Condition “45" -50 +50 ppm “44" -25 +25 For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures “20" -20 +20 “15" -15 +15 “10" -10 +10 -- 10 mS Device Supply Voltage VDD 1.7 1.9 V Output Supply Voltage VDDOUT 1.7 3.6 V Output Supply Voltage “L” VDDOUT 1.7 1.9 V Low Level Input voltage -- 30 % of VDD High Level Input voltage 70 -- % of VDD Input Voltage Range, S1, S2 0 3.6 V VTH is 0.5 * VDD Input current for: S1, S2 0 5 µA VIN = VDD; VDD = 1.9V -4 0 µA VIN = 0.0VD; VDD = 1.9V Output Current, VDDOUT = 3.3V -12 +12 mA Output Current, VDDOUT = 2.5V -10 +10 mA Output Current, VDDOUT = 1.8V -5 +5 mA Output Current “L”, VDDOUT = 1.8V -8 +8 mA Output Load, LVCMOS -- 10 pf Higher loads can be used 2.9 -- V IOH = -0.1 mA 2.4 -- V IOH = -8.0 mA 2.2 -- V IOH = -12.0 mA -- 0.1 V IOH = +0.1 mA -- 0.5 V IOH = +8.0 mA -- 0.8 V IOH = +12.0 mA Rise & Fall Time -- 0.6 nS VDDOUT = 3.3v, 20 - 80%, 10pF Load IDD (no PLL enabled) -- 2.5 mA IDD (PLL enabled) -- 9 mA SS option or 15ppm or 10 ppm stability -- 5 uA 10pF Load 45 55 % at 50% point of VDDOUT -- 10 pS Frequency Accuracy Start-up Time Recommended Operating Conditions LVCMOS Output Parameters for VDDOUT = 3.3v Output High, VDDOUT = 3.3V Output Low, VDDOUT = 3.3V IDDOUT Output Symmetry (1) Peak-to-Peak Jitter www.pletronics.com 425-776-1880 (No SS and PLL disabled) 5 FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 Item Min Max Unit Condition 2.2 -- V IOH = -0.1 mA 1.7 -- V IOH = -6.0 mA 1.6 -- V IOH = -10.0 mA -- 0.1 V IOH = +0.1 mA -- 0.5 V IOH = +6.0 mA -- 0.7 V IOH = +10.0 mA Rise & Fall Time -- 0.6 nS VDDOUT = 2.5v, 20 - 80%, 10pF Load Output Symmetry 45 55 % at 50% point of VDDOUT IDD (no PLL enabled) -- 2.5 mA IDD (PLL enabled) -- 9 mA SS option or 15ppm or 10 ppm stability -- 4 uA 10pF Load -- 10 pS (No SS and PLL disabled) 1.6 -- V IOH = -0.1 mA 1.4 -- V IOH = -3.0 mA 1.1 -- V IOH = -6.0 mA -- 0.1 V IOH = +0.1 mA -- 0.3 V IOH = +3.0 mA -- 0.6 V IOH = +6.0 mA Rise & Fall Time -- 0.9 nS VDDOUT = 1.8v, 20 - 80%, 10pF Load Output Symmetry 45 55 % at 50% point of VDDOUT IDD (no PLL enabled) -- 2.5 mA IDD (PLL enabled) -- 9 mA SS option or 15ppm or 10 ppm stability -- 2.5 uA 10pF Load -- 10 pS (No SS and PLL disabled) LVCMOS Output Parameters for VDDOUT = 2.5v Output High, VDDOUT = 2.5V Output Low, VDDOUT = 2.5V IDDOUT (1) Peak-to-Peak Jitter LVCMOS Output Parameters for VDDOUT = 1.8v Output High, VDDOUT = 1.8V Output Low, VDDOUT = 1.8V IDDOUT (1) Peak-to-Peak Jitter LVCMOS Output Parameters for VDDOUT = 1.8v Output High, VDDOUT = 1.8V Output Low, VDDOUT = 1.8V Rise & Fall Time www.pletronics.com “L” Version 1.6 -- V IOH = -0.1 mA 1.4 -- V IOH = -4.0 mA 1.1 -- V IOH = -8.0 mA -- 0.1 V IOH = +0.1 mA -- 0.3 V IOH = +4.0 mA -- 0.6 V IOH = +8.0 mA 0.7 nS VDDOUT = 1.8v, 20 - 80%, 10pF Load 425-776-1880 6 FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 Item Min Max Unit Output Symmetry 45 55 % IDD (no PLL enabled) -- 2.5 mA IDD (PLL enabled) -- 9 mA SS option or 15ppm or 10 ppm stability -- 3 uA 10pF Load -- 10 pS (No SS and PLL disabled) Vcontrol Input Range Usable 0.5 VDD - 0.5V V The slope is positive Vcontrol Input Range Allowed - Direct connect to Vcontrol - Limit current to + _ 3mA 0.0 -1.0 VDD 4.0 V The slope is positive Recommend >=1K ohm to Vcontrol Pull Ability specified in the P.N. -- -- -10 +10 IDDOUT (1) Peak-to-Peak Jitter Condition at 50% point of VDDOUT VCXO Function Linearity % (1) 10,000 cycles www.pletronics.com 425-776-1880 7 FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 Load Circuit and Test Waveform Symmetry Vhigh 90% * Vcc 50% * Vcc 10% * Vcc Vlow Ground Trise Tfall Reliability: Environmental Compliance Parameter Condition Mechanical Shock MIL-STD-883 Method 2002, Condition B Vibration MIL-STD-883 Method 2007, Condition A Solderability MIL-STD-883 Method 2003 Thermal Shock MIL-STD-883 Method 1011, Condition A ESD Rating Model Minimum Voltage Conditions Human Body Model 1500 MIL-STD-883 Method 3115 Charged Device Model 1000 JESD 22-C101 Package Labeling Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Courier New Bar code is 39-Full ASCII (Label will show FD51xxT-32.768K) www.pletronics.com 425-776-1880 Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Arial 8 FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 Mechanical: Inches 1 1 6 2 5 3 4 Contacts: Gold 11.8 µinches 0.3 µm minimum over Nickel 50 to 350 µinches 1.27 to 8.89 µm 1 Typical dimensions Not to Scale mm A 0.197 + _ 0.006 5.00 + _ 0.15 B 0.125 + _ 0.006 3.20 + _ 0.15 C 0.053 max 1.35 max D1 0.050 1.27 E1 0.050 1.27 F1 0.004 0.10 G1 0.039 1.00 H1 0.025 0.63 I1 0.020 0.50 J1 0.004R 0.10R K1 0.008R 0.20R Pad Functions: Pad Function Note 1 S1/SDA Serial Data Clock (optional V control - VCXO) S2 2 S2/SCL Serial Data S1 3 Ground (GND) 4 Out (Y3) 5 VDD 1.8V, powers internal circuitry of the oscillator. Bypass capacitor required near the package pin. 6 VDDOUT 1.8V, 2.5V or 3.3V supply for the output buffers. Sets CMOS output level. Bypass capacitor required near the package pin. Input to select 1 of 4 preprogrammed functions of the outputs (optional) Crystal reference frequency divided by 1 through 1023 PLL1 frequency divided by 1 through 1023 All unused inputs should be pulled high. www.pletronics.com 425-776-1880 9 FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 Temperature (°C) Reflow Cycle (typical for lead free-processing) 260°C Maximum 10 Seconds Maximum 250 215°C±10°C 200 175°C±10°C 150 100 Approximately 50 Seconds 120 to 160 Seconds Allowed rate of temperature change Maximum 4°C per second The part may be reflowed 2 times without degradation. Tape and Reel: available for quantities of 250 to 1000 per reel, cut tape for < 250 Constant Dimensions Table 1 Tape Size D0 8mm D1 Min E1 P0 1.0 12mm 1.5 16mm +0.1 -0.0 24mm P2 S1 Min T Max 0.6 0.6 T1 Max 2.0 +0.05 _ 1.75 1.5 4.0 _ +0.1 _0.1 + 1.5 0.1 2.0 _ +0.1 1.5 Variable Dimensions Table 2 Tape Size B1 Max E2 Min F P1 T2 Max W Max Ao, Bo & Ko 16 mm 12.1 14.25 7.5 _ +0.1 8.0 + _0.1 8.0 16.3 Note 1 Note 1: Embossed cavity to conform to EIA-481-B Not to scale REEL DIMENSIONS A B inches 7.0 10.0 13.0 mm 177.8 254.0 330.2 inches 2.50 4.00 3.75 mm 63.5 101.6 95.3 Tape Width 16.4 +2.0 -0.0 16.0 C mm D mm 13.0 +0.5 / -0.2 16.4 +2.0 -0.0 16.4 +2.0 -0.0 Reel dimensions may vary from the above www.pletronics.com 425-776-1880 10 FD51xxT-32.768KHz CMOS Clock Oscillator March 2009 IMPORTANT NOTICE Pletronics Incorporated (PLE) reserves the right to make corrections, improvements, modifications and other changes to this product at any time. PLE reserves the right to discontinue any product or service without notice. Customers are responsible for obtaining the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to PLE’s terms and conditions of sale supplied at the time of order acknowledgment. PLE warrants performance of this product to the specifications applicable at the time of sale in accordance with PLE’s limited warranty. Testing and other quality control techniques are used to the extent PLE deems necessary to support this warranty. Except where mandated by specific contractual documents, testing of all parameters of each product is not necessarily performed. PLE assumes no liability for application assistance or customer product design. Customers are responsible for their products and applications using PLE components. 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Resale of PLE products or services with statements different from or beyond the parameters stated by PLE for that product or service voids all express and implied warranties for the associated PLE product or service and is an unfair or deceptive business practice. PLE is not responsible for any such statements. Contacting Pletronics Inc. Pletronics Inc. 19013 36th Ave. West Lynnwood, WA 98036-5761 USA Tel: 425-776-1880 Fax: 425-776-2760 E-mail: [email protected] URL: www.pletronics.com Copyright © 2009 Pletronics Inc. www.pletronics.com 425-776-1880 11