FDG315N N-Channel Logic Level PowerTrench MOSFET General Description Features This N-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. • These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Applications • • • 2 A, 30 V. RDS(ON) = 0.12 Ω @ VGS = 10 V RDS(ON) = 0.16 Ω @ VGS = 4.5 V. • Low gate charge (2.1nC typical). • High performance trench technology for extremely low RDS(ON). • Compact industry standard SC70-6 surface mount package. DC/DC converter Load switch Power Management D S 1 6 2 5 3 4 D SC70-6 D D G Absolute Maximum Ratings Symbol TA = 25°C unless otherwise noted Parameter VDSS Drain-Source Voltage VGSS ID Gate-Source Voltage Drain Current - Continuous - Pulsed (Note 1a) PD Power Dissipation for Single Operation (Note 1a) (Note 1b) TJ, Tstg Operating and Storage Junction Temperature Range Ratings Units 30 ±20 2 6 V 0.75 W 0.48 -55 to +150 °C 260 °C/W Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) V A Package Marking and Ordering Information Device Marking .15 2000 Fairchild Semiconductor International Device Reel Size Tape Width Quantity FDG315N 7’’ 8mm 3000 units FDG315N Rev. C FDG315N July 2000 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 µA IGSS Gate-Body Leakage Forward VGS = 16 V, VDS = 0 V 100 nA IGSS Gate-Body Leakage Reverse VGS = -16 V, VDS = 0 V -100 nA 3 V On Characteristics 30 V 26 mV/°C (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -4 Static Drain-Source On-Resistance 0.100 0.140 0.130 ID(on) On-State Drain Current VGS = 10 V, ID = 2 A VGS = 10 V, ID = 2 A, TJ = 125°C VGS = 4.5 V, ID = 1.7 A VGS = 4.5 V, VDS = 5 V GFS Forward Transconductance VDS = 5 V, ID = 2 A 1 1.8 mV/°C 0.12 0.20 0.16 3 Ω A 5 S Dynamic Characteristics VDS = 15 V, VGS = 0 V, f = 1.0 MHz Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics Id(on) Turn-On Delay Time tr Turn-On Rise Time td(off) tf Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge 220 pF 50 pF 20 pF (Note 2) VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 3 6 ns 11 22 ns Turn-Off Delay Time 7 14 ns Turn-Off Fall Time 3 6 ns 2.1 4 nC VDS = 15 V, ID = 2 A, VGS = 5 V 0.8 nC 0.7 nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.42 A (Note 2) 0.7 0.42 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 170°C/W when mounted on a 1 in2 pad of 2oz copper. b) 260°C/W when mounted on a minimum pad. 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDG315N Rev. C FDG315N Electrical Characteristics FDG315N Typical Characteristics 2 VGS = 10V 4.5V 6.0V 8 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID, DRAIN-SOURCE CURRENT (A) 10 4.0V 5.0V 6 3.5V 4 3.0V 2 0 1.8 V GS = 3.5V 1.6 4.0V 1.4 4.5V 5.0V 1.2 6.0V 8.0V 1 0.8 0 1 2 3 4 0 2 4 VDS, DRAIN-SOURCE VOLTAGE (V) 8 10 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.35 1.6 ID = 1A ID = 2A VGS = 10V RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 6 I D, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. 1.4 1.2 1 0.8 0.6 0.3 0.25 0.2 TA = 125oC 0.15 0.1 TA = 25oC 0.05 0 -50 -25 0 25 50 75 100 125 150 2 4 o TJ, JUNCTION TEMPERATURE ( C) 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 10 T A = -55oC 25oC IS, REVERSE DRAIN CURRENT (A) VDS = 5V o ID, DRAIN CURRENT (A) 10V 125 C 8 6 4 2 V GS = 0V 1 TA = 125oC 25oC 0.1 -55 oC 0.01 0.001 0 1 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 0.2 0.4 0.6 0.8 1 1.2 V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDG315N Rev. C (continued) 300 10 ID = 2A f = 1MHz VGS = 0 V VDS = 5V 250 10V 8 15V CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) FDG315N Typical Characteristics 6 4 CISS 200 150 100 2 50 0 0 COSS CRSS 0 1 2 3 4 0 5 5 10 15 20 25 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate-Charge Characteristics. Figure 8. Capacitance Characteristics. 10 30 RDS(ON) LIMIT SINGLE PULSE 1ms 10ms 1 POWER (W) 100ms 1s 10s DC VGS = 10V SINGLE PULSE o RθJA = 260 C/W 0.1 o TA= 25 C 18 12 6 o TA = 25 C 0 0.01 0.1 1 10 0.0001 100 0.001 VDS, DRAIN-SOURCE VOLTAGE (V) 0.01 0.1 1 10 100 1000 SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. TRANSIENT THERMAL RESISTANCE 1 r(t), NORMALIZED EFFECTIVE ID, DRAIN CURRENT (A) o RθJA= 260 C/W 24 0.5 D = 0.5 R θJA (t) = r(t) * R θJA R θJA =260°C/W 0.2 0.1 0.05 0.1 P(pk) 0.05 0.01 t1 0.02 Single Pulse 0.01 0.005 0.0001 t2 TJ - TA = P * R θJA (t) Duty Cycle, D = t 1 / t 2 0.001 0.01 0.1 1 10 100 300 t1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient themal response will change depending on the circuit board design. FDG315N Rev. C TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST® FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. F1