Fairchild FDMS7602S Dual n-channel powertrench mosfet Datasheet

FDMS7602S
Dual N-Channel PowerTrench® MOSFET
Q1: 30 V, 30 A, 7.5 mΩ Q2: 30 V, 30 A, 5.0 mΩ
Features
General Description
Q1: N-Channel
This device includes two specialized N-Channel MOSFETs in a
„ Max rDS(on) = 7.5 mΩ at VGS = 10 V, ID = 12 A
dual MLP package.The switch node has been internally
„ Max rDS(on) = 12 mΩ at VGS = 4.5 V, ID = 10 A
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
Q2: N-Channel
SyncFET (Q2) have been designed to provide optimal power
„ Max rDS(on) = 5.0 mΩ at VGS = 10 V, ID = 17 A
efficiency.
„ Max rDS(on) = 6.8 mΩ at VGS = 4.5 V, ID = 14 A
Applications
„ RoHS Compliant
„ Computing
„ Communications
„ General Purpose Point of Load
„ Notebook VCORE
S2
S2
S2
G2
S1/D2
D1
D1
D1
D1
Top
G1
Bottom
Q2
4 D1
S2
5
S2
6
3 D1
S2
7
2 D1
G2
8
1 G1
Q1
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Units
V
V
(Note 3)
±20
±20
TC = 25 °C
30
30
-Continuous (Silicon limited)
TC = 25 °C
50
80
-Continuous
TA = 25 °C
121a
171b
40
60
Power Dissipation for Single Operation
TA = 25 °C
2.21a
2.51b
Power Dissipation for Single Operation
TA = 25 °C
1.01c
1.01d
ID
-Pulsed
TJ, TSTG
Q2
30
-Continuous (Package limited)
Drain Current
PD
Q1
30
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
Thermal Resistance, Junction to Ambient
571a
501b
RθJA
Thermal Resistance, Junction to Ambient
1251c
1201d
RθJC
Thermal Resistance, Junction to Case
3.5
2
RθJA
°C/W
Package Marking and Ordering Information
Device Marking
FDMS7602S
Device
FDMS7602S
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
Package
Power 56
1
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMS7602S Dual N-Channel PowerTrench® MOSFET
August 2010
Symbol
Parameter
Test Conditions
Type
Min
30
30
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ID = 1 mA, VGS = 0 V
Q1
Q2
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
ID = 1 mA, referenced to 25 °C
Q1
Q2
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
Q1
Q2
1
500
μA
μA
IGSS
Gate to Source Leakage Current
VGS = 20 V, VDS= 0 V
VGS = 20 V, VDS= 0 V
Q1
Q2
100
100
nA
nA
3
3
V
V
15
15
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 1 mA
Q1
Q2
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
ID = 1 mA, referenced to 25 °C
Q1
Q2
-6
-5
VGS = 10 V, ID = 12 A
VGS = 4.5 V, ID = 10 A
VGS = 10 V, ID = 12 A , TJ = 125 °C
Q1
6.0
8.5
8.3
7.5
12
12
VGS = 10 V, ID = 17 A
VGS = 4.5 V, ID = 14 A
VGS = 10 V, ID = 17 A , TJ = 125 °C
Q2
4.2
5.4
4.9
5.0
6.8
7.2
VDS = 5 V, ID = 12 A
VDS = 5 V, ID = 17 A
Q1
Q2
63
87
Q1:
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
1315
2020
1750
2690
pF
Q1
Q2
445
860
600
1145
pF
Q1
Q2
45
95
70
145
pF
Q1
Q2
0.9
0.7
rDS(on)
gFS
Drain to Source On Resistance
Forward Transconductance
1
1
1.8
1.8
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
Q2:
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
Qg
Total Gate Charge
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
Q1:
VDD = 15 V, ID = 12 A, RGEN = 6 Ω
Q2:
VDD = 15 V, ID = 17 A, RGEN = 6 Ω
VGS = 0 V to 10 V Q1
VDD = 15 V,
VGS = 0 V to 4.5 V ID = 12 A
Q2
VDD = 15 V,
ID = 17 A
Q1
Q2
8.6
11
18
20
ns
Q1
Q2
2.5
3.8
10
10
ns
Q1
Q2
20
27
32
43
ns
Q1
Q2
2.3
3.2
10
10
ns
Q1
Q2
20
33
28
46
nC
Q1
Q2
9.3
16
13
22
nC
Q1
Q2
4.3
5.8
nC
Q1
Q2
2.2
4.6
nC
www.fairchildsemi.com
FDMS7602S Dual N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Q1
Q2
0.8
0.8
1.2
1.2
V
Q1
Q2
27
29
43
46
ns
Q1
Q2
10
31
18
50
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 12 A
VGS = 0 V, IS = 17 A
(Note 2)
(Note 2)
Q1
IF = 12 A, di/dt = 100 A/μs
Q2
IF = 17 A, di/dt = 300 A/μs
Notes:
1: RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined
by the user's board design.
a. 57 °C/W when mounted on
a 1 in2 pad of 2 oz copper
c. 125 °C/W when mounted on a
minimum pad of 2 oz copper
b. 50 °C/W when mounted on
a 1 in2 pad of 2 oz copper
d. 120 °C/W when mounted on a
minimum pad of 2 oz copper
2: Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3: As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
www.fairchildsemi.com
FDMS7602S Dual N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
40
4
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 10 V
VGS = 6 V
30
VGS = 4.5 V
VGS = 4 V
20
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 3.5 V
0
0.0
0.5
1.0
1.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3
VGS = 3.5 V
VGS = 4 V
2
VGS = 4.5 V
1
VGS = 6 V
0
2.0
0
Figure 1. On Region Characteristics
30
40
40
ID = 12 A
VGS = 10 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
-75
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
10
20
ID, DRAIN CURRENT (A)
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
30
ID = 12 A
20
TJ = 125 oC
10
TJ = 25 oC
0
-50
2
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
40
40
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
VGS = 10 V
30
VDS = 5 V
TJ = 150 oC
20
TJ = 25 oC
10
TJ = -55 oC
0
1.5
2.0
2.5
3.0
3.5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
4.0
VGS = 0 V
10
1
TJ = 150 oC
TJ = 25 oC
0.1
0.01
TJ = -55 oC
0.001
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
www.fairchildsemi.com
FDMS7602S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted
VGS, GATE TO SOURCE VOLTAGE (V)
10
2000
ID = 12 A
1000
Ciss
8
CAPACITANCE (pF)
VDD = 10 V
6
VDD = 15 V
4
VDD = 20 V
Coss
100
2
Crss
f = 1 MHz
VGS = 0 V
0
0
5
10
15
10
0.1
20
Figure 7. Gate Charge Characteristics
10
30
Figure 8. Capacitance vs Drain
to Source Voltage
60
100
o
RθJC = 3.5 C/W
100us
ID, DRAIN CURRENT (A)
VGS = 10 V
ID, DRAIN CURRENT (A)
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
40
VGS = 4.5 V
20
Limited by Package
10
1 ms
1
0.1
10 ms
THIS AREA IS
LIMITED BY rDS(on)
100 ms
SINGLE PULSE
TJ = MAX RATED
1s
10s
o
RθJA = 125 C/W
DC
TA = 25 oC
0
25
50
75
100
125
0.01
0.01
150
o
TC, CASE TEMPERATURE ( C)
0.1
1
10
100 200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Maximum Continuous Drain
Current vs Case Temperature
Figure 10. Forward Bias Safe
Operating Area
P(PK), PEAK TRANSIENT POWER (W)
1000
SINGLE PULSE
o
RθJA = 125 C/W
o
TA = 25 C
100
10
1
0.5
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (s)
Figure 11. Single Pulse Maximum Power Dissipation
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
www.fairchildsemi.com
FDMS7602S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
SINGLE PULSE
t2
o
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
RθJA = 125 C/W
(Note 1c)
0.001
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
www.fairchildsemi.com
FDMS7602S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel)TJ = 25°C unless otherwise noted
60
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
5
ID, DRAIN CURRENT (A)
VGS = 10 V
VGS = 4.5 V
40
VGS = 4 V
VGS = 3.5 V
20
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 3 V
0
0.0
0.5
1.0
1.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 3 V
3
VGS = 3.5 V
2
VGS = 4 V
1
VGS = 10 V
VGS = 4.5 V
0
0
20
40
60
ID, DRAIN CURRENT (A)
Figure 14. Normalized on-Resistance vs Drain
Current and Gate Voltage
20
ID = 17 A
VGS = 10 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
-75
SOURCE ON-RESISTANCE (mΩ)
1.6
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
4
2.0
Figure 13. On-Region Characteristics
15
ID = 17 A
10
TJ = 125 oC
5
TJ = 25 oC
2
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
IS, REVERSE DRAIN CURRENT (A)
40
TJ = 125 oC
TJ = 25 oC
TJ = -55 oC
2.5
3.0
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 17. Transfer Characteristics
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
8
10
60
VDS = 5 V
2.0
6
Figure 16. On-Resistance vs Gate to
Source Voltage
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
20
4
VGS, GATE TO SOURCE VOLTAGE (V)
60
0
1.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
-50
Figure 15. Normalized On-Resistance
vs Junction Temperature
ID, DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3.5
VGS = 0 V
10
TJ = 125 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Source to Drain Diode
Forward Voltage vs Source Current
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FDMS7602S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 SyncFET)
VGS, GATE TO SOURCE VOLTAGE (V)
10
3000
ID = 17 A
Ciss
CAPACITANCE (pF)
8
VDD = 10 V
6
VDD = 15 V
4
VDD = 20 V
2
1000
Coss
100 f = 1 MHz
0
0
10
20
30
40
1
Qg, GATE CHARGE (nC)
100
o
RθJC = 2 C/W
VGS = 10 V
ID, DRAIN CURRENT (A)
80
60
VGS = 4.5 V
40
20
75
100 us
10
1 ms
1
0.1
10 ms
THIS AREA IS
LIMITED BY rDS(on)
100 ms
1s
SINGLE PULSE
TJ = MAX RATED
10 s
RθJA = 120 oC/W
Limited by package
50
30
Figure 20. Capacitance vs Drain
to Source Voltage
100
0
25
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 19. Gate Charge Characteristics
ID, DRAIN CURRENT (A)
Crss
VGS = 0 V
60
0.1
DC
TA = 25 oC
100
125
0.01
0.01
150
o
TC, CASE TEMPERATURE ( C)
0.1
1
100 200
10
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 21. Maximum Continuous Drain
Current vs Case Temperature
Figure 22. Forward Bias Safe Operating Area
P(PK), PEAK TRANSIENT POWER (W)
1000
SINGLE PULSE
RθJA = 120 oC/W
TA = 25 oC
100
10
1 -4
10
-3
10
-2
10
-1
10
1
10
2
10
3
10
t, PULSE WIDTH (sec)
Figure 23. Single Pulse Maximum Power Dissipation
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
www.fairchildsemi.com
FDMS7602S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 SyncFET)
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
SINGLE PULSE
t2
o
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
RθJA = 120 C/W
(Note 1d)
0.001
-4
10
-3
10
-2
10
-1
10
1
10
2
10
3
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 24. Junction-to-Ambient Transient Thermal Response Curve
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
www.fairchildsemi.com
FDMS7602S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 SyncFET)
SyncFET Schottky body diode
Characteristics
20
CURRENT (A)
15
10
di/dt = 300 A/μs
5
0
-5
0
50
100
150
TIME (ns)
Figure 25. FDMS7602S SyncFET body
diode reverse recovery characteristic
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
200
Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power
in the device.
IDSS, REVERSE LEAKAGE CURRENT (uA)
Fairchild’s SyncFET process embeds a Schottky diode in parallel
with PowerTrench MOSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
with a MOSFET. Figure 25 shows the reverse recovery
characteristic of the FDMS7602S.
10000
TJ = 125 oC
1000
TJ = 100 oC
100
10
TJ = 25 oC
1
0
5
10
15
20
25
30
VDS, REVERSE VOLTAGE (V)
Figure 26. SyncFET body diode reverse
leakage versus drain-source voltage
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FDMS7602S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (continued)
FDMS7602S Dual N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
www.fairchildsemi.com
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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No Identification Needed
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I48
©2010 Fairchild Semiconductor Corporation
FDMS7602S Rev.C1
www.fairchildsemi.com
FDMS7602S Dual N-Channel PowerTrench® MOSFET
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μSerDes™
SuperFET™
Motion-SPM™
Fairchild Semiconductor®
SuperSOT™-3
OptiHiT™
FACT Quiet Series™
SuperSOT™-6
OPTOLOGIC®
FACT®
UHC®
SuperSOT™-8
OPTOPLANAR®
FAST®
®
Ultra FRFET™
SupreMOS™
FastvCore™
UniFET™
SyncFET™
FETBench™
VCX™
Sync-Lock™
FlashWriter® *
PDP SPM™
VisualMax™
FPS™
XS™
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