Fairchild FDR8308P Dual p-channel, logic level, powertrenchtm mosfet Datasheet

November 1998
FDR8308P
Dual P-Channel, Logic Level, PowerTrenchTM MOSFET
General Description
Features
The SuperSOT-8 family of P-Channel Logic Level MOSFETs
have been designed to provide a low profile, small footprint
alternative to industry standard SO-8 little foot type product.
-3.2 A, -20 V. RDS(ON) = 0.050 Ω @ VGS = -4.5 V,
RDS(ON) = 0.070 Ω @ VGS = -2.5 V.
These P-Channel Logic Level MOSFETs are produced using
Fairchild Semiconductor's advanced PowerTrench process that
has been tailored to minimize the on-state resistance and yet
maintain superior switching performance.
Low gate charge (13nC typical).
These devices are well suited for portable electronics
applications: load switching and power management, battery
charging circuits, and DC/DC conversion.
SuperSOTTM-8 package: small footprint (40% less than
SO-8); low profile(1mmthick); maximum power
comparable to SO-8.
SuperSOTTM-8
SuperSOTTM-6
SOT-23
High performance trench technology for extremely low
RDS(ON).
SO-8
SOT-223
D2
D1
D2
P
08
83
D1
G2
pin 1
TM
SuperSOT -8
G1
Absolute Maximum Ratings
S2
S1
SOIC-16
5
4
6
3
7
2
8
1
TA = 25oC unless otherwise noted
Symbol
Parameter
FDR8308P
Units
VDSS
VGSS
Drain-Source Voltage
-20
V
Gate-Source Voltage
±8
V
ID
Draint Current - Continuous
-3.2
A
PD
Maximum Power Dissipation
TJ,TSTG
Operating and Storage Temperature Range
(Note 1)
- Pulsed
-20
(Note 1)
0.8
W
-55 to 150
°C
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
156
°C/W
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
40
°C/W
© 1998 Fairchild Semiconductor Corporation
FDR8308P Rev.C
Electrical Characteristics
Symbol
(TA = 25OC unless otherwise noted )
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
-20
∆BVDSS/∆TJ
Breakdown Voltage Temp. Coefficient
ID = -50 µA, Referenced to 25 C
IDSS
Zero Gate Voltage Drain Current
VDS = -16 V, VGS = 0 V
o
V
mV /oC
-16
TJ = 55°C
-1
µA
-10
µA
IGSS
Gate - Body Leakage Current
VGS = 8 V, VDS = 0 V
100
nA
IGSS
Gate - Body Leakage, Reverse
VGS = -8 V, VDS = 0 V
-100
nA
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
∆VGS(th)/∆TJ
Gate Threshold Voltage Temp.Coefficient
ID = -50 µA, Referenced to 25 oC
-0.4
RDS(ON)
Static Drain-Source On-Resistance
VGS = -4.5 V, ID = -3.2 A
-0.9
-1.5
TJ = 125°C
VGS = -2.5 V, ID = -2.7 A
V
mV /oC
2.5
0.038
0.05
0.053
0.075
0.054
0.07
-20
Ω
ID(ON)
On-State Drain Current
VGS = -4.5 V, VDS = -5 V
gFS
Forward Transconductance
VDS = -4.5 V, ID = -3.2 A
13
A
S
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
1240
pF
270
pF
100
pF
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
tD(on)
Turn - On Delay Time
VDD = -5 V, ID = -1 A,
8
16
ns
tr
Turn - On Rise Time
VGS = -4.5 V, RGEN = 6 Ω
15
27
ns
tD(off)
Turn - Off Delay Time
45
65
ns
tf
Turn - Off Fall Time
30
50
ns
Qg
Total Gate Charge
VDS = -10 V, ID = -4.5 A,
13
19
nC
Qgs
Gate-Source Charge
VGS = -4.5 V
1.8
nC
Qgd
Gate-Drain Charge
3
nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = -0.67 A
(Note 2)
-0.7
-0.67
A
-1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed
by design while RθCA is determined by the user's board design.
156OC/W on a 0.0025 in2 pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDR8308P Rev.C
Typical Electrical Characteristics
2.5
VGS = -4.5V
-3.0V
R DS(on) , NORMALIZED
-2.5V
16
12
8
-2.0V
4
-1.5V
DRAIN-SOURCE ON-RESISTANCE
- I D , DRAIN-SOURCE CURRENT (A)
20
VGS = -2.0 V
2
-2.5V
1.5
-3.0V
-3.5V
-4.5V
1
0.5
0
0
1
2
-V
DS
3
4
0
5
5
10
15
20
- ID , DRAIN CURRENT (A)
, DRAIN-SOURCE VOLTAGE (V)
Figure 2. On-Resistance Variation with
Figure 1. On-Region Characteristics.
Drain Current and Gate Voltage.
0.2
R DS(ON) , ON-RESISTANCE (OHM)
I D = -3.2A
VGS = -4.5V
1.4
1.2
1
0.8
0.6
-50
-25
0
25
50
75
100
125
150
TJ , JUNCTION TEMPERATURE (°C)
I D = -1.6A
0.15
0.1
TA = 125o C
0.05
25°C
0
1
3
4
5
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
with Temperature.
15
TJ =-55°C
VDS = -5V
- I S , REVERSE DRAIN CURRENT (A)
15
25°C
12
125°C
9
6
3
0
0.9
2
- VGS , GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation
- I D , DRAIN CURRENT (A)
R DS(ON) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.6
VGS = 0V
TJ = 125°C
1
25°C
-55°C
0.1
0.01
0.001
1.2
1.5
1.8
2.1
-VGS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
2.4
2.7
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDR8308P Rev.C
Typical Electrical Characteristics (continued)
2500
I D = -3.2A
VDS = -5V
Ciss
4
-10V
CAPACITANCE (pF)
-V GS , GATE-SOURCE VOLTAGE (V)
5
-15V
3
2
1000
400
Coss
200
Crss
f = 1 MHz
VGS = 0 V
100
1
50
0.1
0
0
3
6
9
12
0.3
1
3
10
20
-VDS , DRAIN TO SOURCE VOLTAGE (V)
15
Q g , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
RD
S(O
L
N)
IM
50
100
us
IT
1m
s
10m
s
10
0m
s
1s
0.5
DC
0.05
0.01
0.1
VGS = -4.5V
SINGLE PULSE
RθJA = 156°C/W
TAA = 25°C
0.2
SINGLE PULSE
R θJA= 156°C/W
TA = 25°C
40
POWER (W)
5
30
20
10
0.5
1
2
5
10
20
0
0.0001
30
0.001
0.01
0.1
1
10
100 300
SINGLE PULSE TIME (SEC)
- VDS , DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
TRANSIENT THERMAL RESISTANCE
1
r(t), NORMALIZED EFFECTIVE
- ID, DRAIN CURRENT (A)
30
Figure 8. Capacitance Characteristics.
0.5
0.2
0.1
0.05
0.02
0.01
0.005
D = 0.5
R θJA (t) = r(t) * R θJA
R θJA = 156 °C/W
0.2
0.1
0.05
P(pk)
0.02
t1
0.01
Single Pulse
0.002
0.001
0.0001
0.001
t2
TJ - TA = P * R JA (t)
θ
Duty Cycle, D = t 1/ t 2
0.01
0.1
1
10
100
300
t1 , TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1.
Transient thermal response will change depending on the circuit board design.
FDR8308P Rev.C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions
SSOT-8 Packaging
Configuration: Figure 1.0
F63TNR
Label
Customized
Label
Antistatic Cover Tape
Conductive Embossed
Carrier Tape
F852
831N
F852
831N
F852
831N
F852
831N
Pin 1
SSOT-8 Unit Orientation
SSOT-8 Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Standard
(no flow code)
TNR
L84Z
TNR
3,000
500
13” Dia
7” Dia
343x64x343
184x187x47
Max qty per Box
5,000
1,000
Weight per unit (gm)
0.0416
0.0416
Weight per Reel (kg)
0.5615
0.0980
343mm x 342mm x 64mm
Intermediate box for Standard Option
F63TNR Label
Note/Comments
F63TNR
Label
F63TNR Label sample
184mm x 184mm x 47mm
Pizza Box for L84Z Option
F63TNR
Label
SSOT-8 Tape Leader and Trailer
Configuration: Figure 2.0
LOT: CBVK741B019
QTY: 3000
FSID: FDR835N
SPEC:
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
QARV:
(F63TNR)2
Carrier Tape
Cover Tape
Trailer Tape
160mm minimum
Components
Leader Tape
390mm minimum
November 1998, Rev. A
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SSOT-8 Embossed Carrier Tape
Configuration: Figure 3.0
P0
D0
T
E1
F
K0
Wc
W
E2
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
Pkg type
A0
B0
SSOT-8
(12mm)
4.47
+/-0.10
5.00
+/-0.10
W
12.0
+/-0.3
D0
D1
E1
E2
1.55
+/-0.05
1.50
+/-0.10
1.75
+/-0.10
F
10.25
min
5.50
+/-0.05
P1
P0
8.0
+/-0.1
4.0
+/-0.1
K0
T
Wc
1.37
+/-0.10
0.280
+/-0.150
9.5
+/-0.025
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
0.06
+/-0.02
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
B0
Tc
0.5mm
maximum
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
A0
Component Rotation
Sketch C (Top View)
Component lateral movement
Sketch B (Top View)
SSOT-8 Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7” Diameter Option
B Min
Dim C
See detail AA
W3
13” Diameter Option
Dim D
min
W2 max Measured at Hub
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
5.906
150
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
12mm
7” Dia
7.00
177.8
12mm
13” Dia
13.00
330
 1998 Fairchild Semiconductor Corporation
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
November 1998, Rev. A
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SuperSOT-8 (FS PKG Code 34, 35)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0416
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.