WJ FP1189-PCB2140S 1/2 - watt hfet Datasheet

FP1189
½ - Watt HFET
Product Information
Product Features
Product Description
Functional Diagram
50 – 4000 MHz
+27 dBm P1dB
+40 dBm Output IP3
High Drain Efficiency
20.5 dB Gain @ 900 MHz
The FP1189 is a high performance ½-Watt HFET
(Heterostructure FET) in a low-cost SOT-89 surfacemount package. This device works optimally at a drain
bias of +8 V and 125 mA to achieve +40 dBm output IP3
performance and an output power of +27 dBm at 1-dB
compression, while providing 20.5 dB gain at 900 MHz.
GND
• Lead-free/Green/RoHScompliant SOT-89 Package
• MTTF >100 Years
The device conforms to WJ Communications’ long history
of producing high reliability and quality components. The
FP1189 has an associated MTTF of greater than 100 years
at a mounting temperature of 85°C and is available in both
the standard SOT-89 package and the environmentallyfriendly lead-free/green/RoHS-compliant and green SOT89 package. All devices are 100% RF & DC tested.
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Applications
•
•
•
•
•
•
Mobile Infrastructure
CATV / DBS
W-LAN / ISM
RFID
Defense / Homeland Security
Fixed Wireless
Saturated Drain Current, I dss (1)
Transconductance, Gm
Pinch Off Voltage, Vp (2)
RF Parameter (3)
Operational Bandwidth
Test Frequency
Small Signal Gain
SS Gain (50 Ω, unmatched)
Maximum Stable Gain
Output P1dB
Output IP3 (4)
Noise Figure
Drain Bias
1
2
3
RF IN
GND
RF OUT
Function
Input / Gate
Output / Drain
Ground
Pin No.
1
3
2, 4
The product is targeted for use as driver amplifiers for
wireless infrastructure where high performance and high
efficiency are required.
Typical Performance (5)
Specifications
DC Parameter
4
Units
Min
mA
mS
V
220
Units
Min
MHz
MHz
dB
dB
dB
dBm
dBm
dB
Typ Max
290
155
-2.1
360
Typ Max
50 - 4000
800
20.5
17
Parameter
Frequency
Gain
Input Return Loss
Output Return Loss
Output P1dB
Output IP3 (4)
Noise Figure
IS-95 Channel Power
@ -45 dBc ACPR
21
24
+27.4
+40
2.7
+8 V @ 125 mA
Units
Typical
MHz
dB
dB
dB
dBm
dBm
dB
915
1960 2140 2450
20.6
15.7
14.7 13.2
13
26
24
36
6.0
9.6
9.0
7.6
+27.4 +27.2 +27.2 +28.1
+39.9 +40.4 +39.7 +40.0
2.7
3.7
4.3
dBm
+21
+20.8
W-CDMA Ch. Power
+18.4
@ -45 dBc ACLR
Drain Voltage
Drain Current
V
mA
+8
125
5. Typical parameters represent performance in a tuned application circuit.
1. I dss is measured with Vgs = 0 V, V ds = 3 V.
2. Pinch-off voltage is measured when Ids = 1.2 mA.
3. Test conditions unless otherwise noted: T = 25ºC, VDS = 8 V, IDQ = 125 mA, in a tuned application
circuit with ZL = Z LOPT, ZS = Z SOPT (optimized for output power).
4. 3OIP measured with two tones at an output power of +12 dBm/tone separated by 1 MHz. The
suppression on the largest IM3 product is used to calculate the 3OIP using a 2:1 rule.
Absolute Maximum Rating
Ordering Information
Parameter
Rating
Part No.
Description
Operating Case Temperature
Storage Temperature
DC Power
RF Input Power (continuous)
Drain to Gate Voltage, Vdg
Junction Temperature
-40 to +85 °C
-55 to +150 °C
2.0 W
6 dB above Input P1dB
+14 V
+220° C
FP1189
½ -Watt HFET
FP1189-G
½ -Watt HFET
FP1189-PCB900S
FP1189-PCB1900S
FP1189-PCB2140S
870 – 960 MHz Application Circuit
1930 – 1990 MHz Application Circuit
2110 – 2170 MHz Application Circuit
(leaded SOT-89 Pkg)
(lead-free/green/RoHS-compliant SOT-89 Pkg)
Operation of this device above any of these parameters may cause permanent damage.
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
Typical Device Data
S-Parameters (VDS = +8 V, IDS = 125 mA, T = 25°C, calibrated to device leads)
S11
1.0
0.8
2
-0.
10.0
5.0
4.0
3.0
2.0
1.0
0.8
0.6
3
2
1
-0.8
Swp Min
0.05GHz
.0
-2
.4
-0
-1.0
1
0.4
0.2
5
4
-0
.6
6
.0
-2
5
-0.8
2
3
4
Frequency (GHz)
-1.0
1
2
-0
.6
0
.4
-0
-3
.0
0
0
10.0
5.0
4.0
3.0
2.0
1.0
0.8
0.6
0.4
0.2
0
2
-0.
DB(MSG)
-4
.0
-5.
0
DB(|S[2,1]|)
10.0
6
-10.0
S21, MSG (dB)
3
5
5.0
10.0
-3
.0
10
0
4.
5.0
-4
.0
0.2
15
0
3.
0
2
4
GH
4.
0.
0.
4
20
3.0
5
GH
0
6
0.
4
25
2.
0
2.
0
0.6
6
0.
Swp Max
6GHz
-5.
0
0.8
1.0
S22
Swp Max
6GHz
-1 0.
S21, Maximum Stable Gain vs. Frequency
30
Swp Min
0.05GHz
Note:
Measurements were made on the packaged device in a test fixture with 50 ohm input and output lines.
The S-parameters shown are the de-embedded data down to the device leads and represents typical performance of the device.
Freq (MHz)
50
250
500
750
1000
1250
1500
1750
2000
2250
2500
2750
3000
3250
3500
3750
4000
4250
4500
4750
5000
5250
5500
5750
6000
S11 (mag)
S11 (ang)
S21 (mag)
S21 (ang)
S12 (mag)
S12 (ang)
S22 (mag)
1.000
-4.52
10.313
176.55
0.002
87.44
0.544
0.988
-21.51
10.120
163.88
0.010
76.64
0.535
0.959
-42.21
9.681
148.45
0.020
64.73
0.520
0.933
-61.23
9.005
134.71
0.028
53.45
0.495
0.895
-78.75
8.270
122.08
0.035
44.25
0.469
0.860
-95.09
7.561
109.58
0.040
34.30
0.447
0.848
-109.61
7.028
99.15
0.044
26.69
0.428
0.821
-122.91
6.408
88.96
0.046
19.57
0.407
0.807
-135.32
5.950
79.64
0.048
13.93
0.400
0.796
-147.01
5.474
70.37
0.049
7.21
0.386
0.785
-157.00
5.087
62.43
0.050
2.99
0.374
0.780
-166.26
4.732
53.97
0.050
-1.58
0.376
0.775
-175.87
4.415
45.54
0.049
-6.79
0.369
0.766
175.78
4.082
38.18
0.049
-9.36
0.368
0.770
167.34
3.843
30.76
0.048
-12.48
0.372
0.771
159.87
3.602
23.91
0.050
-14.97
0.369
0.771
152.07
3.408
16.74
0.050
-17.53
0.374
0.771
145.63
3.241
9.15
0.048
-19.53
0.382
0.772
138.97
3.053
2.49
0.048
-21.27
0.387
0.770
132.07
2.876
-4.50
0.050
-23.00
0.396
0.780
126.56
2.743
-10.47
0.048
-25.08
0.408
0.794
120.21
2.622
-17.28
0.049
-26.64
0.412
0.795
114.22
2.507
-24.43
0.051
-30.44
0.423
0.794
108.27
2.346
-31.21
0.052
-30.16
0.442
0.798
102.86
2.237
-36.95
0.052
-31.18
0.446
Device S-parameters are available for download off of the website at: http://www.wj.com
S22 (ang)
-3.02
-13.77
-27.13
-39.31
-50.54
-60.96
-70.64
-79.82
-88.93
-97.59
-105.24
-113.47
-121.84
-129.77
-137.25
-144.61
-152.17
-161.00
-168.31
-175.08
177.65
170.89
162.41
154.66
147.41
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
Application Circuit: 870 – 960 MHz (FP1189-PCB900S)
The application circuit is matched for output power.
Typical RF Performance
Drain Bias = +8 V, Ids = 125 mA, 25°C
Frequency
S21 – Gain
S11 – Input Return Loss
S22 – Output Return Loss
Output P1dB
Output IP3
(+12 dBm / tone, 1 MHz spacing)
Noise Figure
IS-95 Channel Power
@ -45 dBc ACPR
-Vgg
MHz
dB
dB
dB
dBm
870
20.9
-10
-5.2
+27.5
dBm
915
20.6
-13
-6.0
+27.4
+39.9
dB
2.7
dBm
2.7
CAP
ID=C10
C=DNP pF
Vds = 8 V @ 125 mA
CAP
ID=C11
C=1e5 pF
CAP
ID=C3
C=68 pF
RES
ID=R1
R= 20 Ohm
CAP
ID=C8
C=1000 pF
CAP
ID=C7
C=68 pF
CAP
ID=C2
C=18 pF
IND
ID=L4
L=12 nH
CAP
ID=C6
C=18 pF
SUBCKT
ID=Q1
NET="FP1189"
IND
ID=L1
L=47 nH
CAP
ID=C1
C= 68 pF
2.6
+21
CAP
ID=C4
C=1000 pF
PORT
P= 1
Z =50 Ohm
960
19.8
-10
-7.6
+27.5
RES
ID=R2
R= 10 Ohm
2
IND
ID= L3
L =47 nH
RES
ID=L2
R=0 Ohm
CAP
ID=C9
C=68 pF
PORT
P= 2
Z =50 Ohm
1
CAP
ID=C13
C=3.9 pF
CAP
ID=C12
C= DNP pF
CAP
ID=C5
C=DNP pF
Bill of Materials
Ref. Desig.
C1, C3, C7, C9
C2, C6
C4, C8
C11
C13
L1, L3
L2
L4
R1
R2
Q1
C5, C12, C10
Value
68 pF
18 pF
1000 pF
0.1 µF
3.9 pF
47 nH
0O
12 nH
10 O
20 O
FP1189
Part style
Chip capacitor
Chip capacitor
Chip capacitor
Chip capacitor
Chip capacitor
Multilayer chip inductor
Chip resistor
Multilayer chip inductor
Chip resistor
Chip resistor
WJ 0.5W HFET
Do Not Place
Size
0603
0603
0603
1206
0603
0603
0603
0603
0603
0603
SOT-89
14 mil GETEKTM ML200DSS (er = 4.2)
The main microstrip line has a line impedance of 50 O.
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
FP1189-PCB900S Application Circuit Performance Plots
S11 vs. Frequency
S21 vs. Frequency
21
-5
+85c
-10
S21 (dB)
-15
-20
20
19
-25
18
-30
17
-40c
860
880
900
920
940
960
860
880
5
26
24
920
940
960
860
+25c
-40c
940
960
+25c
-50
-40 C
860
880
900
920
940
960
16
IMD products (dBm)
60
4
14
Output Power
10
12
-4
0
4
Input Power (dBm)
8
12
20
Gain (dB)
18
-8
24
0
4
26
18
22
16
18
14
Output Power
-8
-4
0
4
Input Power (dBm)
8
24
30
22
10
12
-12
20
frequency = 915 MHz, Temp = +85° C
Gain
14
8
12
16
Output Power (dBm)
Output Power / Gain vs. Input Power
30
22
Output Power (dBm)
16
-12
20
frequency = 915 MHz, Temp = +25° C
22
14
8
12
16
Output Power (dBm)
Output Power / Gain vs. Input Power
18
24
25
0
frequency = 915 MHz, Temp = -40° C
26
23
30
IMD_High
Output Power / Gain vs. Input Power
Gain
22
OIP3 (dBm)
IMD_Low
Temperature (°C)
30
21
35
85
22
20
OIP3 vs. Output Power
26
20
Gain
Gain (dB)
35
19
fundamental frequency = 915 MHz, 916 MHz; Temp = +25° C
-80
10
18
40
-60
32
+85 C
45
-40
-15
17
IMD products vs. Output Power
freq = 915, 916 MHz
+12 dBm / tone
+25 C
Output Channel Power (dBm)
fundamental frequency = 915 MHz, 916 MHz; Temp = +25° C
36
960
-40
+85c
-20
38
940
freq = 915 MHz
Frequency (MHz)
40
920
-70
OIP3 vs. Temperature
-40
900
-60
1
42
34
880
ACPR vs. Channel Power
0
920
+85c
IS-95, 9 Ch. Forward, ±885 kHz offset, 30 kHz Meas BW
2
+85c
+25c
Frequency (MHz)
-30
Frequency (MHz)
OIP3 (dBm)
900
3
20
Gain (dB)
-40c
4
22
20
-25
+85c
ACPR (dBc)
28
900
-20
Noise Figure vs. Frequency
6
NF (dB)
P1dB (dBm)
P1dB vs. Frequency
880
-15
Frequency (MHz)
30
860
-10
-30
Frequency (MHz)
-40c
+25c
Output Power (dBm)
S11 (dB)
+25c
0
S22 (dB)
-40c
-5
S22 vs. Frequency
22
18
22
16
18
14
14
Output Power
10
12
12
-12
Output Power (dBm)
0
-8
-4
0
4
Input Power (dBm)
8
12
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
Application Circuit: 1930 – 1990 MHz (FP1189-PCB1900S)
The application circuit is matched for output power.
Typical RF Performance
Drain Bias = +8 V, Ids = 125 mA, 25°C
Frequency
S21 – Gain
S11 – Input Return Loss
S22 – Output Return Loss
Output P1dB
Output IP3
MHz
dB
dB
dB
dBm
(+12 dBm / tone, 1 MHz spacing)
Noise Figure
IS-95 Channel Power
@ -45 dBc ACPR
1930
15.8
-26
-9.2
+27.4
1960
15.7
-26
-9.6
+27.2
dBm
+40.4
dB
3.7
dBm
+20.8
CAP
CAP
CAP
ID= C4
ID= C10
ID= C3
C= 33 pF C=DNP pF C= DNP pF
1990
15.5
-24
-9.0
+27.4
Vds = 8 V @ 125 mA
CAP
ID=C11
C=1e5 pF
-Vgg
CAP
ID=C12
C= DNP pF
RES
ID=R1
R=100 Ohm
PORT
P=1
Z=50 Ohm
CAP
ID= C8
C= DNP pF
CAP
ID= C13
C=DNP pF
CAP
ID= C7
C= DNP pF
CAP
ID= C2
C=DNP pF
CAP
ID= C6
C= 33 pF
CAP
ID=C1
C= 33 pF
SUBCKT
ID= Q1
NET= "FP1189"
IND
ID= L1
L= 22 nH
2
IND
ID= L3
L= 22 nH
IND
ID=L2
L= 2.7 nH
CAP
ID=C9
C=33 pF
PORT
P=2
Z=50 Ohm
1
CAP
ID= C15
C= 1.8 pF
RES
ID= R2
R= 10 Ohm
CAP
ID=C13
C= DNP pF
CAP
ID= C5
C= 0.5 pF
Bill of Materials
Ref. Desig.
C1, C4, C6, C9
C5
C11
C15
L1, L3
L2
R1
R2
Q1
C2, C3, C7, C8,
C10, C12, C13, C14
Value
33 pF
0.5 pF
0.1 µF
1.8 pF
22 nH
2.7 nH
100 O
10 O
FP1189
Part style
Chip capacitor
Chip capacitor
Chip capacitor
Chip capacitor
Multilayer chip inductor
Multilayer chip inductor
Chip resistor
Chip resistor
WJ 0.5W HFET
Size
0603
0603
1206
0603
0603
0603
0603
0603
SOT-89
Do Not Place
14 mil GETEKTM ML200DSS (er = 4.2)
The main microstrip line has a line impedance of 50 O.
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
FP1189-PCB1900S Application Circuit Performance Plots
S11 vs. Frequency
S21 vs. Frequency
16
-5
+85C
-10
S21 (dB)
-15
-20
15
14
13
-25
-30
1950
1970
1990
1930
1950
5
26
24
22
1970
1990
2
-40C
-40
-50
-60
+85C
-40 C
-70
1930
1950
1970
16
1990
IMD products vs. Output Power
32
60
IMD_Low
30
25
0
Output Power / Gain vs. Input Power
4
12
18
14
Output Power
8
10
16
24
0
4
20
16
26
Gain
22
12
18
10
14
Output Power
4
8
12
Input Power (dBm)
18
30
16
26
14
22
Gain
18
12
14
10
10
0
24
Output Power
8
-4
20
frequency = 1960 MHz, Temp = +85° C
30
14
8
12
16
Output Power (dBm)
Output Power / Gain vs. Input Power
18
Gain (dB)
22
Output Power (dBm)
26
4
8
12
Input Power (dBm)
20
frequency = 1960 MHz, Temp = +25° C
Gain
0
8
12
16
Output Power (dBm)
Output Power / Gain vs. Input Power
frequency = 1960 MHz, Temp = -40° C
16
24
IMD_High
Temperature (°C)
30
23
35
85
18
22
OIP3 vs. Output Power
Gain (dB)
35
21
fundamental frequency = 1960, 1961 MHz; Temp = +25° C
-80
10
20
40
-60
freq = 1960, 1961 MHz
+12 dBm / tone
19
OIP3 (dBm)
36
18
+85 C
45
-40
-15
17
+25 C
Output Channel Power (dBm)
fundamental frequency = 1960, 1961 MHz; Temp = +25° C
IMD products (dBm)
OIP3 (dBm)
+25C
-20
38
1990
freq = 1960 MHz
Frequency (MHz)
40
1970
ACPR vs. Channel Power
3
OIP3 vs. Temperature
-40
1950
+85C
Frequency (MHz)
4
+85C
42
Gain (dB)
1930
+25C
IS-95, 9 Ch. Forward, ±885 kHz offset, 30 kHz Meas BW
Frequency (MHz)
-4
1990
0
1950
-40C
-30
1
+25C
20
10
1970
ACPR (dBc)
28
14
+85C
Noise Figure vs. Frequency
6
NF (dB)
P1dB (dBm)
P1dB vs. Frequency
1930
-20
Frequency (MHz)
30
-40C
-15
-30
Frequency (MHz)
34
+25C
12
1930
-10
-25
-40C
Output Power (dBm)
S11 (dB)
+25C
0
S22 (dB)
-40C
-5
S22 vs. Frequency
17
Output Power (dBm)
0
16
10
8
20
-4
0
4
8
12
Input Power (dBm)
16
20
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
Application Circuit: 2110 – 2170 MHz (FP1189-PCB2140S)
The application circuit is matched for output power.
Typical RF Performance
Drain Bias = +8 V, Ids = 125 mA, 25°C
Frequency
S21 – Gain
S11 – Input Return Loss
S22 – Output Return Loss
Output P1dB
Output IP3
MHz
dB
dB
dB
dBm
dBm
(+12 dBm / tone, 1 MHz spacing)
Noise Figure
W-CDMA Channel Power
RES
ID=R1
R =100 Ohm
PORT
P=1
Z =50 Ohm
CAP
ID=C1
C=22 pF
2140
14.7
-24
-9.0
+27.2
2170
14.7
-24
-9.8
+26.8
+39.7
dB
4.2
dBm
@ -45 dBc ACPR
-Vgg
2110
14.7
-24
-7.6
+27.1
4.3
4.2
+18.4
CAP
ID=C3
C=33 pF
Vds = 8 V @ 125 mA
CAP
ID=C8
C=1e5 pF
CAP
ID=C11
C=DNP pF
CAP
ID=C7
C=22 pF
CAP
ID=C2
C=DNP pF
CAP
ID=C6
C=DNP pF
IND
ID=L1
L=18 nH
SUBCKT
ID=Q1
NET="FP1189"
2
RES
ID=R2
R =10 Ohm
IND
ID=L2
L=18 nH
IND
ID=L3
L=2.7 nH
CAP
ID=C9
C=22 pF
PORT
P=2
Z =50 Ohm
Part style
Chip capacitor
Chip capacitor
Chip capacitor
Chip capacitor
Chip capacitor
Multilayer chip inductor
Multilayer chip resistor
Chip resistor
Chip resistor
WJ 0.5W HFET
Do Not Place
Size
0603
0805
0603
1206
0603
0603
0603
0603
0603
SOT-89
1
CAP
ID=C10
C =1.5 pF
CAP
ID=C5
C =0.5 pF
CAP
ID=C4
C=DNP pF
Bill of Materials
Ref. Desig.
C1, C7, C9
C3
C5
C8
C10
L1, L2
L3
R1
R2
Q1
C2, C4, C6, C11
Value
22 pF
33 pF
0.5 pF
0.1 µF
1.5 pF
18 nH
2.7 nH
100 O
10 O
FP1189
14 mil GETEKTM ML200DSS (er = 4.2)
The main microstrip line has a line impedance of 50 O.
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
FP1189-PCB2140S Application Circuit Performance Plots
S11 vs. Frequency
S21 vs. Frequency
15
-5
+85c
-10
S21 (dB)
-15
-20
14
13
12
-25
-30
2130
2150
2170
2110
2130
-20
+85c
2150
2170
2110
ACPR (dBc)
-40
NF (dB)
5
22
4
3
2
1
+85C
-40c
20
2130
2150
2170
2110
OIP3 vs. Temperature
-40 C
2130
2150
2170
13
Gain (dB)
22
10
18
32
Output Power
14
35
60
85
0
4
Temperature (°C)
Output Power / Gain vs. Input Power
12
22
10
18
14
Output Power
Output Power (dBm)
26
Gain
16
25
0
20
4
10
20
20
frequency = 2140 MHz, Temp = +85° C
IMD_Low
30
14
26
12 Gain
22
10
18
14
8
Output Power
-80
10
6
0
4
8
12
16
Output Power (dBm)
24
Output Power / Gain vs. Input Power
-40
-60
8
12
16
Output Power (dBm)
16
IMD_High
6
8
12
16
Input Power (dBm)
30
-20
IMD products (dBm)
14
21
35
fundamental frequency = 2140, 2141 MHz; Temp = +25° C
30
20
40
IMD products vs. Output Power
frequency = 2140 MHz, Temp = -40° C
16
4
8
12
Input Power (dBm)
19
Gain (dB)
10
18
45
10
6
-15
17
OIP3 (dBm)
26
Gain
8
16
OIP3 vs. Output Power
12
freq = 2140, 2141 MHz
+12 dBm / tone
15
+85 C
fundamental frequency = 1960, 1961 MHz; Temp = +25° C
30
14
-40
14
+25 C
Output Channel Power (dBm)
frequency = 2140 MHz, Temp = +25° C
36
Gain (dB)
-55
Output Power / Gain vs. Input Power
38
0
-50
-60
+85c
16
40
8
-45
Frequency (MHz)
42
2170
freq = 2140 MHz
-65
Frequency (MHz)
34
+25c
0
2110
2150
ACPR vs. Channel Power
28
24
+85c
3GPP W-CDMA, Test Model 1 +64 DPCH, ±5 MHz offset
-35
+25C
2130
Noise Figure vs. Frequency
6
26
+25c
Frequency (MHz)
30
-40C
-40c
Frequency (MHz)
P1dB vs. Frequency
P1dB (dBm)
-15
-30
Frequency (MHz)
OIP3 (dBm)
+25c
11
2110
-10
-25
-40c
Output Power (dBm)
S11 (dB)
+25c
0
S22 (dB)
-40c
-5
S22 vs. Frequency
16
Output Power (dBm)
0
20
24
0
4
8
12
Input Power (dBm)
16
20
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
Reference Design: 2450 MHz
The application circuit is matched for output power.
Typical RF Performance, 25°C
Frequency
S21 – Gain
S11 – Input Return Loss
S22 – Output Return Loss
Output P1dB
Output IP3
(+12 dBm / tone, 1 MHz spacing)
Drain Voltage
Drain Current
MHz
dB
dB
dB
dBm
S-Parameters
15
2450
2450
13.2
-36
-7.6
+27.5 +28.1
dBm
+38
+40
V
mA
+8
100
+8
125
10
5
DB(|S[1,1]|)
DB(|S[2,1]|)
DB(|S[2,2]|)
0
-5
-10
-15
-20
-25
The 2450 MHz Reference Circuit is shown for design purposes only. An
evaluation board is not readily available for this application. The reader can
obtain an FP1189-PCB2140S evaluation board and modify it with the circuit
shown to achieve the performance shown in this reference design. Only two
component changes are required (C4 and L3) from the FP1189-PCB2140S
evaluation board.
-30
2200
2300
2400
2500
Frequency (MHz)
2600
2700
Vds = 8 V @ 125 mA
-Vgg
RES
ID=R1
R= 100 Ohm
CAP
ID=C8
C= 100000 pF
CAP
ID=C3
C= 33 pF
CAP
ID=C6
C= DNP pF
CAP
ID=C2
C= DNP pF
PORT
P= 1
Z= 50 Ohm
CAP
ID=C1
C= 22 pF
IND
ID=L1
L= 18 nH
TLINP
ID=TL1
Z0=50 Ohm
L=135 mil
Eeff=4.2
Loss=0
F0=0 MHz
CAP
ID=C7
C= 22 pF
2
RES
ID=R2
R= 10 Ohm
TLINP
ID=TL3
Z0=50 Ohm
L= 80 mil
Eeff=4.2
Loss=0
F0=0 MHz
TLINP
ID=TL4
Z0=50 Ohm
L= 35 mil
Eeff=4.2
Loss=0
F0=0 MHz
IND
ID=L3
L=1.8 nH
IND
ID=L2
L=18 nH
PORT
P= 2
Z= 50 Ohm
1
CAP
ID=C4
C= 1.2 pF
TLINP
I D =TL2
Z 0 =50 Ohm
L=45 mil
Eeff=4.2
L o s s =0
F 0 =0 MHz
CAP
ID=C5
C =0.5 pF
CAP
I D =C7
C= 22 pF
SUBCKT
I D =Q1
NET="FP1189"
The lengths shown in the microstrip lines are referenced from the component or pin edge-to-edge.
Bill of Materials
C4
Ref. Desig.
C1, C7, C9
C3
C4
C5
C8
L1, L2
L3
R1
R2
Q1
C2, C4, C6, C11
Value
22 pF
33 pF
1.2 pF
0.5 pF
0.1 µF
18 nH
1.8 nH
100 O
10 O
FP1189
Part style
Chip capacitor
Chip capacitor
Chip capacitor
Chip capacitor
Chip capacitor
Multilayer chip inductor
Multilayer chip resistor
Chip resistor
Chip resistor
WJ 0.5W HFET
Do Not Place
Size
0603
0805
0603
0603
1206
0603
0603
0603
0603
SOT-89
14 mil GETEKTM ML200DSS (er = 4.2)
The main microstrip line has a line impedance of 50 O.
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
Application Note: Constant-Current Active-Biasing
Special attention should be taken to properly bias the FP1189.
Power supply sequencing is required to prevent the device from
operating at 100% Idss for a prolonged period of time and possibly
causing damage to the device. It is recommended that for the safest
operation, the negative supply be “first on and last off.” With a
negative gate voltage present, the drain voltage can then be applied
to the device. The gate voltage can then be adjusted to have the
device be used at the proper quiescent bias condition.
+Vdd
R1
R2
U1
4 Rohm UMT1N
5
2
An optional active-bias current mirror is recommended for use with
the application circuits shown in this datasheet. Generally in a
laboratory environment, the gate voltage is adjusted until the drain
draws the recommended operating current. The gate voltage
required can vary slightly from device to device because of device
pinchoff variation, while also varying slightly over temperature.
C1
.01 µF
1
3
6
R4
1 kΩ
R3
R5
RF OUT
RF IN
The active-bias circuit, shown on the right, uses dual PNP transistors
to provide a constant drain current into the FP1189, while also
eliminating the effects of pinchoff variation. This configuration is
best suited for applications where the intended output power level of
the amplifier is backed off at least 6 dB away from its compression
point. With the implementation of the circuit, lower P1dB values
may be measured for a Class-AB amplifier, where the device will
attempt to source more drain current while the circuit tries to provide
a constant drain current. The circuit should be connected directly in
line with where the voltage supplies would be normally connected
with the amplifier circuit, as shown the diagram. Any required
matching circuitry remains the same, although it is not shown in the
diagram. This recommended active-bias constant-current circuit
adds 7 components to the parts count for implementation, but should
cost only an extra $0.144 to realize ($0.10 for U1, $0.0029 for R1,
R3, R4, R5, $0.024 for R2, and $0.0085 for C1).
M.N.
DUT
M.N.
-Vgg
HFET Application Circuit
Parameter
Pos Supply, Vdd
Neg Supply, Vgg
Vds
Ids
R1
R2
R3
R4
R5
FP1189
+8 V
-5 V
+7.75 V
125 mA
62 Ω
2.0 Ω
1.8 kΩ
1 kΩ
1 kΩ
Temperature compensation is achieved by tracking the voltage
variation with the temperature of the emitter-to-base junction of the
two PNP transistors. As a 1st order approximation, this is achieved
by using matched transistors with approximately the same Ibe
current. Thus the transistor emitter voltage adjusts the HFET gate
voltage so that the device draws a constant current, regardless of the
temperature. A Rohm dual transistor - UMT1N - is recommended
for cost, minimal board space requirements, and to minimize the
variation between the two transistors. Minimizing the variability
between the base-to-emitter junctions allow more accuracy in setting
the current draw. More details can be found in a separate application
note “Active-bias Constant-current Source Recommended for
HFETs” found on the WJ website.
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
FP1189 (SOT-89 Package) Mechanical Information
This package may contain lead-bearing materials. The plating material on the leads is SnPb.
Outline Drawing
Product Marking
The FP1189 will be marked with an
“FP1189” designator. An alphanumeric lot
code (“XXXX-X”) is also marked below the
part designator on the top surface of the
package.
Tape and reel specifications for this part are
located on the website in the “Application
Notes” section.
MSL / ESD Rating
Land Pattern
ESD Rating:
Value:
Test:
Standard:
Class 1B
Passes /500V to <1000V
Human Body Model (HBM)
JEDEC Standard JESD22-A114
ESD Rating:
Value:
Test:
Standard:
Class IV
Passes at 2000 V min.
Charged Device Model (CDM)
JEDEC Standard JESD22-C101
MSL Rating: Level 3 at +235° C convection reflow
Standard:
JEDEC Standard J-STD-020
Mounting Config. Notes
1. Ground / thermal vias are critical for the proper
performance of this device. Vias should use a .35mm
(#80 / .0135”) diameter drill and have a final plated
thru diameter of .25 mm (.010”).
2. Add as much copper as possible to inner and outer
layers near the part to ensure optimal thermal
performance.
3. Mounting screws can be added near the part to fasten
the board to a heatsink. Ensure that the ground /
thermal via region contacts the heatsink.
4. Do not put solder mask on the backside of the PC board
in the region where the board contacts the heatsink.
5. RF trace width depends upon the PC board material
and construction.
6. Use 1 oz. Copper mi nimum.
7. All dimensions are in millimeters (inches). Angles are
in degrees.
Parameter
Rating
Operating Case Temperature
Thermal Resistance, Rth (1)
Junction Temperature, Tjc (2)
-40 to +85°C
68° C/W
153° C
1. The thermal resistance is referenced from the hottest
part of the junction to the ground tab (pin 4).
2. This corresponds to the typical drain biasing condition
of +8V, 125 mA at an 85°C case temperature. A
minimum MTTF of 1 million hours is achieved for
junction temperatures below 160 °C.
MTTF vs. GND Tab Temperature
100
MTTF (million hrs)
Thermal Specifications
10
1
0
60
70
80
90
100 110
Tab Temperature (°C)
120
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004
FP1189
½ - Watt HFET
Product Information
FP1189-G (Green / Lead-free SOT-89 Package) Mechanical Information
This package is lead-free/Green/RoHS-compliant. It is compatible with both lead-free (maximum 260°C reflow temperature) and leaded
(maximum 245°C reflow temperature) soldering processes. The plating material on the leads is NiPdAu.
Outline Drawing
Product Marking
The FP1189-G will be marked with an
“FP11G” designator. An alphanumeric lot
code (“XXXX-X”) is also marked below the
part designator on the top surface of the
package.
Tape and reel specifications for this part are
located on the website in the “Application
Notes” section.
MSL / ESD Rating
Land Pattern
ESD Rating:
Value:
Test:
Standard:
Class 1B
Passes /500V to <1000V
Human Body Model (HBM)
JEDEC Standard JESD22-A114
ESD Rating:
Value:
Test:
Standard:
Class IV
Passes at 2000 V min.
Charged Device Model (CDM)
JEDEC Standard JESD22-C101
MSL Rating: Level 3 at +260° C convection reflow
Standard:
JEDEC Standard J-STD-020
Mounting Config. Notes
Parameter
Rating
Operating Case Temperature
Thermal Resistance, Rth (1)
Junction Temperature, Tjc (2)
-40 to +85°C
68° C/W
153° C
1. The thermal resistance is referenced from the hottest
part of the junction to the ground tab (pin 4).
2. This corresponds to t he typical drain biasing condition
of +8V, 125 mA at an 85°C case temperature. A
minimum MTTF of 1 million hours is achieved for
junction temperatures below 160 °C.
MTTF vs. GND Tab Temperature
100
MTTF (million hrs)
Thermal Specifications
1. Ground / thermal vias are critical for the proper
performance of this device. Vias should use a .35mm
(#80 / .0135”) diameter drill and have a final plated
thru diameter of .25 mm (.010”).
2. Add as much copper as possible to inner and outer
layers near the part to ensure optimal thermal
performance.
3. Mounting screws can be added near the part to fasten
the board to a heatsink. Ensure that the ground /
thermal via region contacts the heatsink.
4. Do not put solder mask on the backside of the PC board
in the region where the board contacts the heatsink.
5. RF trace width depends upon the PC board material
and construction.
6. Use 1 oz. Copper minimum.
7. All dimensions are in millimeters (inches). Angles are
in degrees.
10
1
0
60
70
80
90
100 110
Tab Temperature (°C)
120
Specifications and information are subject to change without notice.
WJ Communications, Inc • Phone 1-800- WJ1-4401 • FAX: 408-577-6621 • e- mail: [email protected] • Web site: www.wj.com
September 2004