Vectron FX-424-DFC-A1C1 Low jitter frequency translator Datasheet

Preliminary Data Sheet
FX-424
Low Jitter Frequency Translator
Features
• Quartz-based PLL for Ultra-Low Jitter
• Frequency Translation up to 850 MHz
• Accepts up to 4 ext.-muxed clock inputs
• CMOS / LVDS / LVPECL Inputs compatible
• Differential LVPECL or LVCMOS Output
• Lock Detect / Loss of Signal Alarms
• Output Disable
• 20.3 x 13.7 x 5.1 mm SMT package
• RoHS/Lead Free Compliant
Applications
Description
The FX-424 is a precision quartz-based frequency
translator used to translate an input frequency such
as 8 kHz, 1.544 MHz, 2.048 MHz, 19.44 MHz etc.
to any specific frequency from 1.544 MHz to 850
MHz. The FX-424 can perform either up or down
frequency conversion. The FX-424’s superior jitter
performance is achieved through the use of a
precision VCXO or VCSO. With the use of an
external multiplexer, up to 4 different input clocks
can be translated to a common output frequency.
•
Wireless Infrastructure
• 10 Gigabit FC
• 10GbE LAN / WAN
• OADM and IP Routers
• Test Equipment
• Military Communcations
Figure 1. Functional Block Diagram
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Vectron International, 267 Lowell Road, Hudson, NH 03051
Page 1 of 8
Rev: 18Dec05
FX-424 Low Jitter Frequency Translator
Table 1. Electrical Performance
Parameter
Symbol
Minimum
FIN
APR
FOUT
0.008
±40
1.544
VCC
ICC
3.13
Typical
Maximum
Units
Notes
170
850
MHz
ppm
MHz
1,2,3
1,2,3
1,2,3
3.46
60
V
mA
2,3
3
Frequency
Input Frequency
Capture Range
Output Frequency
Supply
Voltage
Current (No Load)
3.3
45
Input Signal
FIN
FIN
CMOS
LVPECL
LVCMOS Output (Option A)
Differential Output (Option F)
Common Mode Output Voltage
Output High Voltage
Output Low Voltage
Peak-to-Peak Output Voltage
Rise Time
Fall Time
Symmetry
SSB Phase Noise, FOUT = 155.52/622.08
1.
2.
3.
4.
5.
6.
VOCM
VOH
VOL
VP-P
tR
tF
SYM
VCC-1.5
VCC-1.025
VCC-1.810
45
CMOS
LVPECL
2,3
LVCMOS
2,3
VCC-1.3
VCC-0.950
VCC-1.700
700
0.5
0.5
50
VCC-1.1
VCC-0.880
VCC-1.620
55
V
V
V
mV-pp
ns
ns
%
2,3
2,3
2,3
2,3
4,5
4,5
2,3
@ 10 Hz Offset
@ 100 Hz Offset
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
@ 1 MHz Offset
@ 10 MHz Offset
Φn
Φn
Φn
Φn
Φn
Φn
Φn
-64/-27
-95/-55
-123/-85
-143/-110
-146/-130
-146/-146
-146/-146
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
5,6
Jitter Generation
ΦJ
50
ps RMS
5, 6
Operating Temperature
TOP
°C
1,3
-40
85
See Standard Frequencies and Ordering Information.
Parameters are tested with production test circuit below (Fig 2).
Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature.
Measured from 20% to 80% of a full output swing (Fig 3).
Not tested in production, guaranteed by design, verified at qualification.
The FX-424 phase noise and jitter performance can be optimized for specific applications. Please consult with Vectron’s Application
Engineers for more information.
Figure 2. Test Circuit
Figure 3. LVPECL Waveform
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Vectron International, 267 Lowell Road, Hudson, NH 03051
Page 2 of 8
Rev: 18Dec05
FX-424 Low Jitter Frequency Translator
Figure 4. Pin Configuration
Table 2. Pin Out
Pin #
Symbol
I/O
Level
Function
1
2
3
4
SEL0
SEL1
GND
I
I
GND
LVTTL
LVTTL
Supply
Input Frequency Select*
5
VMON
O
Analog
6
OD
I
LVCMOS
7
GND
GND
8
FOUT
O
9
CFOUT
O or
GND
Supply
LVPECL or
LVCMOS
LVPECL or
LVCMOS
10
LD
O
LVCMOS
11
12
GND
GND
GND
GND
13
FIN
I
14
VCC
VCC
Supply
Supply
LVCMOS or
LVPECL
Supply
Input Frequency Select*
Case and Electrical Ground
Not present
VCXO Control Voltage Monitor
Under locked conditions VMON should be > 0.3V and <3.0V. The input
frequency may be out of range if the voltage exceeds these levels.
Output Disable
Disabled = Logic “1”
Enabled = Logic “0” or no connect
Case and Electrical Ground
Frequency Output
Complementary Frequency Output – Note for LVCMOS option this pad
will be tied to GND.
Lock Detect
Locked = Logic “1”
Loss of Signal = Logic “0”
Case and Electrical Ground
Case and Electrical Ground
Input Frequency. The FX-424 series AC couples the input for handling of
either LVCMOS or LVPECL input signals.
Power Supply Voltage (3.3 V ±5%)
* For applications requiring two to four input frequencies, Vectron will assign a unique part number and the Input Frequency versus SEL[1:0]
settings will be provided in a Specification Control Drawing. For single input configurations it is recommended that SEL0 and SEL1 are tied
to ground.
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Vectron International, 267 Lowell Road, Hudson, NH 03051
Page 3 of 8
Rev: 12Dec05
FX-424 Low Jitter Frequency Translator
Outline Diagram
Suggested Pad Layout
Figure 6.
Figure 5.
Table 3. Absolute Maximum Ratings
Symbol
Ratings
Unit
Power Supply
Output Current
Parameter
VCC
IOUT
0 to 6
V
mA
Storage Temperature
TS
-55 to 125
°C
Soldering Temp/Time
TLS
260/40
°C/sec
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is
not implied at these or any other conditions in excess of conditions represented in the operational sections of this
data sheet. Exposure to absolute maximum ratings for extended periods may adversely affect device reliability.
Reliability
VI qualification includes aging at various extreme temperatures, shock and vibration, temperature cycling, and IR
reflow simulation. The FX-424 family is undergoing the following qualification tests:
Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Solderability
Gross and Fine Leak
Resistance to Solvents
Conditions
MIL-STD-883, Method 2002
MIL-STD-883, Method 2007
MIL-STD-883, Method 2003
MIL-STD-883, Method 1014
MIL-STD-883, Method 2016
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Vectron International, 267 Lowell Road, Hudson, NH 03051
Page 4 of 8
Rev: 18Dec05
FX-424 Low Jitter Frequency Translator
eliability
Handling Precautions
Although ESD protection circuitry has been designed into the FX-424 proper precautions should be taken when
handling and mounting. VI employs a human body model (HBM) and a charged-device model (CDM) for ESD
susceptibility testing and design protection evaluation
ESD Ratings
Model
Human Body Model
Charged Device Model
Minimum
500 V
500 V
Conditions
MIL-STD 883, Method 3015
JEDEC, JESD22-C101
Reflow Profile (IPC/JEDEC J-STD-020C)
Parameter
Symbol
Time Above 217 oC
Time To Peak Temperature
Time At 260 oC
Ramp Down
Value
tS
R UP
tL
60 sec Min, 180 sec Max
3 oC/sec Max
60 sec Min, 150 sec Max
480 sec Max
20 sec Min, 40 sec Max
6 oC/sec Max
t AMB-P
tP
R DN
The FX-424 is being qualified to meet the JEDEC
standard for Pb-Free assembly. The temperatures
and time intervals listed are based on the Pb-Free
small body requirements. The temperatures refer to
the topside of the package, measured on the package
body surface. The FX-424 should not be subjected to
a wash process that will immerse it in solvents. NO
.CLEAN is the recommended procedure. The FX-424
has been designed for pick and place reflow
soldering. The FX-424 may be reflowed once and
should not be reflowed in the inverted position.
tL
260
R
Temperature (DegC)
PreHeat Time
Ramp Up
217
200
tP
R DN
150
tS
t AMB-P
25
Time (sec)
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Vectron International, 267 Lowell Road, Hudson, NH 03051
Page 5 of 8
Rev: 12Dec05
FX-424 Low Jitter Frequency Translator
Application Circuits
+3.3V
10uF
0.1uF
100pF
+3.3V
R1
130
14
VCC
FOUT
8
Z = 50
CFOUT
9
Z = 50
R1
130
Output Frequency
Input Frequency
13
FIN
1
SEL0
2
SEL1
6
VMON
5
LD
10
OD
3
7
R2
82
R2
82
FX-424
11
12
Figure 7. Single Input Frequency Translation - LVPECL Termination
+3.3V
10uF
0.1uF
100pF
+3.3V
Input Frequencies
R1
130
14
F1
00
F2
01
VCC
10
F3
11
8
Z = 50
CFOUT
9
Z = 50
Output Frequency
13
F3
FOUT
R1
130
FIN
R2
82
FX-424
6
OD
1
SEL0
SEL1
2
3
7
11
VMON
5
LD
10
R2
82
12
Figure 8. Four Input Frequencies Translated to Common Output Frequency – LVPECL Termination
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Vectron International, 267 Lowell Road, Hudson, NH 03051
Page 6 of 8
Rev: 18Dec05
FX-424 Low Jitter Frequency Translator
Tape and Reel (EIA-481-2-A)
Po
ØDo
W2
F
W
N
C
D
A
W1
P1
B
Tape Dimensions (mm)
Reel Dimensions (mm)
Dimension
Tolerance
W
Typ
F
Typ
Do
Typ
Po
Typ
P1
Typ
A
Typ
B
Min
C
Typ
D
Min
N
Min
W1
Typ
W2
Max
FX-424
44
20.2
1.5
4
20
330
1.5
13
20.2
100
44.4
50.4
# Per
Reel
100
Vectron plans to offer both tape-n-reel and matrix trays as packaging options for the FX-424. The standard
shipping container for volume production is a matrix tray. The trays are 100% recyclable and offer the added
feature that they can be continuously fed into a pick-n-place machine. (Matrix tray drawing not currently
available)
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Vectron International, 267 Lowell Road, Hudson, NH 03051
Page 7 of 8
Rev: 12Dec05
FX-424 Low Jitter Frequency Translator
Standard Frequencies
8 kHz
16 kHz
64 kHz
1.024 MHz
1.544 MHz
2.048 MHz
4.096 MHz
8.192 MHz
13.000 MHz
16.384 MHz
19.440 MHz
20.480 MHz
C
D
E
F
H
J
K
L
M
N
P
R
26.00 MHz
27.00 MHz
38.88 MHz
44.736 MHz
51.84 MHz
61.44 MHz
77.76 MHz
82.944 MHz
112.000 MHz
139.264 MHz
155.520 MHz
166.6286 MHz
T
W
X
Y
0
1
2
3
4
5
6
7
622.08 MHz
666.5143 MHz
8
9
Special SCD
S
Not all combinations are possible.
Ordering Information
For Additional Information, Please Contact:
USA: Vectron International, 267 Lowell Rd, Hudson, NH 03051 . . . .Tel: 1-88-VECTRON-1
Fax: 1-888-FAX-VECTRON
EUROPE: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tel: +49 (0) 7268 8010
Fax: +49 (0) 7268 8012 81
ASIA: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tel: +86-21-5048-0777
Fax: +86-21-5048-1881
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice.
No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Vectron International, 267 Lowell Road, Hudson, NH 03051
Page 8 of 8
Rev: 18Dec05
Similar pages