ON GRM21BR60J226 Up to 500 ma, high efficiency synchronous step-down dc-dc converter Datasheet

NCP1511
Up to 500 mA, High
Efficiency Synchronous
Step−Down DC−DC Converter
in Chip Scale Package
The NCP1511 step−down PWM DC−DC converter is optimized
for portable applications powered from 1−cell Li−ion or 3−cell
Alkaline/NiCd/NiMH batteries. This DC−DC converter utilizes a
current−mode control architecture for easy compensation and better
line regulation. It also uses synchronous rectification to increase
efficiency and reduce external part count. The NCP1511 optimizes
efficiency in light load conditions when switched from a normal
PWM mode to a “pulsed switching” mode. The device also has a
built−in oscillator for the PWM circuitry, or it can be synchronized to
an external 500 kHz to 1000 kHz clock signal. Finally, it includes an
integrated soft−start, cycle−by−cycle current limiting, and thermal
shutdown protection. The NCP1511 is available in a chip scale
package.
Features
• High Efficiency:
•
•
•
•
•
•
•
•
93% for 1.89 V Output at 3.6 V Input and 150 mA Load Current
92% for 1.89 V Output at 3.6 V Input and 300 mA Load Current
Digital Programmable Output Voltages: 1.0, 1.3, 1.5 or 1.89 V
Output Current up to 500 mA at Vin = 3.6 V
Low Quiescent Current of 14 A in Pulsed Switching Mode
Low 0.1 A Shutdown Current
−30°C to 85°C Operation Temperature
Ceramic Input/Output Capacitor
9 Pin Chip Scale Package
Pb−Free Package is Available
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A1
XX
A
Y
WW
Cellular Phones, Smart Phones and PDAs
Digital Still Cameras
MP3 Players and Portable Audio Systems
Wireless and DSL Modems
Portable Equipment
DAL
AYWW
= Device Code
= Assembly Location
= Year
= Work Week
A1
PIN CONNECTIONS
A1
B1
C1
A2
B2
C2
A3
B3
C3
Pin: A1. − GNDP
A2. − LX
A3. − VCC
B1. − SYNC
B2. − GNDA
B3. − FB
C1. − SHD
C2. − CB1
C3. − CB0
(Bottom View)
ORDERING INFORMATION
Package
Shipping†
NCP1511FCT1
Micro Bump
3000 Tape & Reel
NCP1511FCT1G
Micro Bump
(Pb−Free)
3000 Tape & Reel
Device
Applications
•
•
•
•
•
MARKING
DIAGRAM
9 PIN
MICRO BUMP
FC SUFFIX
CASE 499AC
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
100
90
Pulsed Mode
A3
Vin
2.5 V − 5.2 V
Cin
10 F C1
B1
VCC
SHD
SYNC
LX
FB
A2
EFFICIENCY (%)
80
6.8 H
B3
Vout
Cout
22 F
C2
CB1
CB0 and CB1
C3
Control Input
CB0
60
50
40
30
Vin = 3.6 V
Vout = 1.5 V
TA= 25°C
20
10
GNDA GNDP
B2
PWM Mode
70
0
0.1
A1
1
10
100
1000
Iout (mA)
Figure 1. Typical Application Circuit
 Semiconductor Components Industries, LLC, 2005
January, 2005 − Rev. 5
Figure 2. Efficiency vs. Output Current
1
Publication Order Number:
NCP1511/D
NCP1511
ISENS
VCC
SENFET
COMPENSATION
RAMP
ISENS
−
OA
+
FB
−
CMP
+
ILIM
DVR
+
CMP
−
Q1
LX
DAMPING
SWITCHING
CONTROL
PWM
−
CMP
+
OVP
FB
PM
−
ZCL
GNDA
CB0
−
CMP
+
SELECT
LOGIC
CB1
BANDGAP
REFERENCE
AND SOFT
START
+
Q2
DVR
THERMAL
SHUTDOWN
GNDP
ENABLE
DETECT
SHD
CMP
CONTROL
BLOCK
(PWM,PM)
MODE SELECTION
SYNC DETECT
AND
TIMING BLOCK
SYNC
Figure 3. Simplified Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
Symbol
Type
Description
A1
GNDP
Power Ground
Ground Connection for the NFET Power Stage.
A2
LX
Analog Output
Connection from Power Pass Elements to the Inductor.
A3
VCC
Analog Input
Power Supply Input for Power and Analog VCC.
B1
SYNC
Analog Input
Synchronization input for the PWM converter. If a clock signal is present, the converter
uses the rising edge for the turn on. If this pin is low, the converter is in the Pulsed mode.
If this pin is high, the converter uses the internal oscillator for the PWM mode. This pin
contains an internal pull down resistor.
B2
GNDA
Analog Ground
B3
FB
Analog Input
Feedback Voltage from the Output of the Power Supply.
C1
SHD
Analog Input
Enable for Switching Regulator. This Pin is Active High to enable the NCP1511. The SHD
Pin has an internal pull down resistor to force the converter off if this pin is not connected
to the external circuit.
C2
CB1
Analog Input
Selects Vout. This pin contains an internal pull up resistor.
C3
CB0
Analog Input
Selects Vout. This pin contains an internal pull down resistor.
Ground connection for the Analog Section of the IC. This is the GND for the FB, Ref,
Sync, CB, and SHD pins.
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2
NCP1511
MAXIMUM RATINGS
Symbol
Value
Unit
Maximum Voltage All Pins
Rating
Vmax
5.5
V
Maximum Operating Voltage All Pins
Vmax
5.2
V
Thermal Resistance, Junction−to−Air (Note 1)
RJA
159
°C/W
TA
−30 to 85
°C
VESD
> 2500
> 150
V
Moisture Sensitivity
MSL
Level 1
Storage Temperature Range
Tstg
−55 to 150
°C
TJ
−30 to 125
°C
Operating Ambient Temperature Range
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 2)
Junction Operating Temperature
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.
1. For the 9−Pin Micro Bump package, the RJA is highly dependent of the PCB heatsink area. RJA = 159°C/W with 50 mm2 PCB heatsink area.
2. This device series contains ESD protection and exceeds the following tests:
Human Body Model, 100 pF discharge through a 1.5 k following specification JESD22/A114.
Machine Model, 200 pF discharged through all pins following specification JESD22/A115.
Latchup as per JESD78 Class II: > 100 mA.
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NCP1511
ELECTRICAL CHARACTERISTICS (Vin = 3.6 V, Vo = 1.5 V, TA = 25°C, Fsyn = 600 kHz 50% Duty Cycle square wave for PWM
mode; TA = –30 to 85°C for Min/Max values, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
Quiescent Current of Sync Mode, Iout = 0 mA
Iq PWM
−
175
−
A
Quiescent Current of PWM Mode, Iout = 0 mA
Iq PWM
−
185
−
A
Quiescent Current of Pulsed Mode, Iout = 0 mA
Iq Pulsed
−
14
−
A
Quiescent Current, SHD Low
Iq Off
−
0.1
0.5
A
Input Voltage Range (Note 3)
Vin
2.5
−
5.2
V
Input Voltage
Vsync
−0.3
−
Vcc + 0.3
V
Frequency Operational Range
Fsync
500
600
1000
kHz
Minimum Synchronization Pulse Width
Dcsync Min
−
30
−
%
Maximum Synchronization Pulse Width
VCC Pin
Sync Pin
Dcsync Max
−
70
−
%
SYNC “H” Voltage Threshold
Vsynch
−
920
1200
mV
SYNC “L” Voltage Threshold
Vsyncl
400
830
−
mV
SYNC “H” Input Current, Vsync = 3.6 V
Isynch
−
2.2
−
A
SYNC “L” Input Current, Vsync = 0 V
Isyncl
−0.5
−
−
A
Vcb
−0.3
−
Vcc + 0.3
V
Output Level Selection Pins
Input Voltage
CB0, CB1 “H” Voltage Threshold
Vcb h
−
920
1200
mV
CB0, CB1 “L” Voltage Threshold
Vcb l
400
830
−
mV
CB0 “H” Input Current, CB = 3.6 V
Icb0 h
−
2.2
−
A
CB0 “L” Input Current, CB = 0 V
Icb0 l
−0.5
−
−
A
CB1 “H” Input Current, CB = 3.6 V
Icb1 h
−
0.3
1.0
A
CB1 “L” Input Current, CB = 0 V
Icb1 l
−
−2.2
−
A
Vshd
−0.3
−
Vcc + 0.3
V
Shutdown Pin
Input Voltage
SHD “H” Voltage Threshold
Vshd h
−
920
1200
mV
SHD “L” Voltage Threshold
Vshd l
400
830
−
mV
SHD “H” Input Current, SHD = 3.6 V
Ishd h
−
2.2
−
A
SHD “L” Input Current, SHD = 0 V
Ishd l
−0.5
−
−
A
Input Voltage
Vfb
−0.3
−
Vcc + 0.3
V
Input Current, Vfb = 1.5 V
Ifb
−
5.0
7.5
A
I lim
−
800
−
mA
Minimum On Time
Ton min
−
75
−
nsec
Rdson Switching P−FET and N_FET
Rdson
−
0.23
−
Ileak
−
0
1.0
A
Vo
−
5.0
−
%
Feedback Pin
Sync PWM Mode Characteristics
Switching P−FET Current Limit
Switching P−FET and N−FET Leakage Current
Output Overvoltage Threshold
3. Recommended maximum input voltage is 5 V when the device frequency is synchronized with an external clock signal.
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NCP1511
ELECTRICAL CHARACTERISTICS (continued) (Vin = 3.6 V, Vo = 1.5 V, TA = 25°C, Fsyn = 600 kHz 50% Duty Cycle square wave
for PWM mode; TA = –30 to 85°C for Min/Max values, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
Feedback Voltage Accuracy, Vout Set = 1.0 V CB0 = L, CB1 = L
Vout
0.950
1.000
1.050
V
Feedback Voltage Accuracy, Vout Set = 1.3 V CB0 = L, CB1 = H
Vout
1.261
1.300
1.339
V
Feedback Voltage Accuracy, Vout Set = 1.5 V CB0 = H, CB1 = H
Vout
1.450
1.500
1.550
V
Feedback Voltage Accuracy, Vout Set = 1.89 V CB0 = H CB1 = L
Vout
1.833
1.890
1.947
V
Load Transient Response
10 to 100 mA Load Step
Vout
−
35
−
mV
Line Transient Response, Iout = 100 mA
3.0 to 3.6 Vin Line Step
Vout
−
10
−
mVpp
I lim
−
800
−
mA
Ton min
−
75
−
nsec
Fosc
700
900
1200
kHz
Rdson
−
0.23
−
Ileak
−
0
1.0
A
Output Overvoltage Threshold
Vo
−
5.0
−
%
Feedback Voltage Accuracy, Vout Set = 1.0 V CB0 = L, CB1 = L
Vout
0.950
1.000
1.050
V
Feedback Voltage Accuracy, Vout Set = 1.3 V CB0 = L, CB1 = H
Vout
1.261
1.300
1.339
V
Feedback Voltage Accuracy, Vout Set = 1.5 V CB0 = H, CB1 = H
Vout
1.450
1.500
1.550
V
Feedback Voltage Accuracy, Vout Set = 1.89 V CB0 = H CB1 = L
Vout
1.833
1.890
1.947
V
Load Transient Response
10 to 100 mA Load Step
Vout
−
35
−
mV
Line Transient Response, Iout = 100 mA
3.0 to 3.6 Vin Line Step
Vout
−
10
−
mVpp
On Time
Ton
−
660
−
nsec
Output Ripple Voltage, Iout = 100 A
Vout
−
22
−
mV
Feedback Voltage Accuracy, Vout Set = 1.0 V CB0 = L, CB1 = L
Vout
0.930
1.000
1.070
V
Feedback Voltage Accuracy, Vout Set = 1.3 V CB0 = L, CB1 = H
Vout
1.241
1.300
1.359
V
Feedback Voltage Accuracy, Vout Set = 1.5 V CB0 = H, CB1 = H
Vout
1.430
1.500
1.570
V
Feedback Voltage Accuracy, Vout Set = 1.89 V CB0 = H CB1 = L
Vout
1.813
1.890
1.967
V
Sync PWM Mode Characteristics (continued)
PWM Mode with Internal Oscillator Characteristics
Switching P−FET Current Limit
Minimum On Time
Internal Oscillator Frequency
Rdson Switching P−FET and N_FET
Switching P−FET and N−FET Leakage Current
Pulsed Mode Characteristics
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NCP1511
100
100
90
95
1.89 Vout
70
1.5 Vout
1.3 Vout
EFFICIENCY (%)
EFFICIENCY (%)
80
1.0 Vout
60
50
40
30
Vin = 3.6 V
PWM
TA= 25°C
20
10
100
200
300
400
85
1.89 Vout
1.5 Vout
80
1.3 Vout
70
2.5
500
1.0 Vout
Iout = 150 mA
Freq = 1.0 MHz
TA= 25°C
75
0
0
90
3.0
3.5
4.0
4.5
5.0
5.5
Iout (mA)
INPUT VOLTAGE (V)
Figure 4. Efficiency vs. Output Current in PWM
Mode
Figure 5. Efficiency vs. Input Voltage in PWM
Mode
100
100
90
5.2 Vin
70
EFFICIENCY (%)
EFFICIENCY (%)
80
3.6 Vin
60
2.7 Vin
50
40
30
Vout = 1.5 V
PWM
TA= 25°C
20
10
0
0
100
200
300
400
1.5 Vout
95
1.89 Vout
90
85
Vin = 3.6 V
Iout = 150 mA
TA = 25°C
PWM
80
500 600 700
500
Iout (mA)
800 900 1000 1100 1200 1300 1400 1500
Figure 7. Efficiency vs. Frequency at
Iout = 150 mA
100
100
1.89 Vout
90
80
95
1.5 Vout
EFFICIENCY (%)
EFFICIENCY (%)
1.3 Vout
FREQUENCY (kHz)
Figure 6. Efficiency vs. Output Current at
Different Input Voltage
1.89 Vout
90
85
1.0 Vout
Vin = 3.6 V
Iout = 300 mA
TA = 25°C
PWM
80
500 600 700
1.0 Vout
70
1.5 Vout
60
1.3 Vout
50
40
1.0 Vout
30
Vin = 3.6 V
PM
TA= 25°C
20
1.3 Vout
10
800 900 1000 1100 1200 1300 1400 1500
0
0.01
0.1
1
10
100
Iout (mA)
FREQUENCY (kHz)
Figure 8. Efficiency vs. Frequency at
Iout = 300 mA
Figure 9. Efficiency vs. Output Current in
Pulsed Mode
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1000
NCP1511
2
20
Vin = 3.6 V
Vout = 1.5 V
TA = 25°C
15
1.8
1.6
Vout (V)
PWM Mode
Iin (mA)
1.89 Vout
10
Pulsed Mode
1.4
1.5 Vout
1.2
1.3 Vout
1
5
Vin = 3.6 V
TA = 25°C
PWM
0.8
1.0 Vout
0.6
0
0
5
10
15
Iout (mA)
20
30
25
0
Figure 10. Input Current Comparison
100
200
300
Iout (mA)
400
500
Figure 11. Output Voltage vs. Output Current
2
15
1.89 Vout
1.8
10
1.0 Vout
1.3 Vout
5
Vout (V)
Vout (mV)
1.6
0
1.5 Vout
−5
1.5 Vout
1.2
1.3 Vout
1
1.89 Vout
1.0 Vout
Vin = 3.6 V
TA = 25°C
10
100
0.6
−40
1000
−20
0
20
40
60
80
Iout (mA)
TEMPERATURE (°C)
Figure 12. Load Regulation in PWM Mode
Figure 13. Output Voltage vs. Temperature
950
930
930
FREQUENCY (kHz)
950
910
890
Vin = 3.6 V
Vout = 1.5 V
Iout = 150 mA
870
850
−40
Vin = 3.6 V
Iout = 150 mA
PWM
0.8
−10
FREQUENCY (kHz)
1.4
−20
0
20
40
60
80
910
890
Vout = 1.5 V
Iout = 150 mA
TA = 25°C
PWM
870
850
2.5
100
3.0
3.5
4.0
4.5
5.0
Vin (V)
TEMPERATURE (°C)
Figure 14. Oscillator Frequency vs. Temperature
Figure 15. Oscillator Frequency vs. Input
Voltage
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100
5.5
NCP1511
2.0
2.0
Vin = 3.6 V
Vout = 1.5 V
TA= 25°C
PWM Mode
1.5
Vout (V)
Vout (V)
1.5
Vin = 3.6 V
Vout = 1.5 V
TA= 25°C
PWM Mode
1.0
0.5
1.0
0.5
0
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0
0.2
0.4
0.6
0.8
1.0
1.2
VSHD (V)
VCB (V)
Figure 16. Output Voltage vs. Shutdown Pin
Voltage
Figure 17. Transition Level of CB Pins
VLX
1 V/div
VLX
1 V/div
Vout
AC Coupled
10 mV/div
Vout
AC Coupled
10 mV/div
1 s/div
1 s/div
Figure 18. Light Load PWM Switching Waveform
(Vin = 3.6 V, Vout = 1.5 V, Iout = 30 mA)
Figure 19. Heavy Load PWM Switching Waveform
(Vin = 3.6 V, Vout = 1.5 V, Iout = 300 mA)
2V
Vshdn
1 V/div
0
VLX
1 V/div
1.5 V
Vout
0.5 V/div
Vout
AC Coupled
10 mV/div
0
1 s/div
500 ms/div
Figure 21. Soft−Start
(Vin = 3.6 V, Vout = 1.5 V, Iout = 150 mA)
Figure 20. Pulsed Mode Switching Waveform
(Vin = 3.6 V, Vout = 1.5 V, Iout = 30 mA)
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1.4
NCP1511
3.6 V
3.6 V
3.0 V
3.0 V
Vin
1 V/div
Vout = 1.89 V
Iout = 300 mA
PWM
Vout
AC Coupled
10 mV/div
Vin
1 V/div
Vout = 1.89 V
Iout = 30 mA
PM
Vout
AC Coupled
10 mV/div
200 s/div
200 s/div
Figure 22. Line Transient Response for PWM
Figure 23. Line Transient Response for PM
2.0 V
300 mA
CB1
2 V/div
0
10 mA
Vin
1 V/div
1.89 V
Vout
100 mV/div
Vout
AC Coupled
20 mV/div
Vin = 3.6 V
Vout = 1.89 V
PWM
CB0=1
Vin = 3.6 V
Iout = 300 mA
PWM
1.5 V
50 s/div
200 s/div
Figure 24. Load Transient Response
Figure 25. Output Voltage Transition from
1.5 V to 1.89 V
PWM
PM
PM
SYNC
Vout
AC Coupled
10 mV/div
Vin = 3.6 V
Vout = 1.5 V
Iout = 30 mA
200 s/div
Figure 26. Transition between PWM and PM
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NCP1511
DETAILED OPERATING DESCRIPTION
Overview
value, the OVP comparator is activated and switch Q1 is
turned OFF. Switching will continue when the output
voltage falls below the threshold of OVP comparator.
The NCP1511 is a monolithic micro−power high
frequency PWM step−down DC−DC converter specifically
optimized for applications requiring high efficiency and a
small PCB footprint such as portable battery powered
products. It integrates synchronous rectification to
improve efficiency as well as eliminate the external
Schottky diode. High switching frequency allows for a low
profile inductor and capacitors to be used. Four digital
selectable output voltages (1.0, 1.3, 1.5 and 1.89 V) can be
generated from the input supply that can range from
2.7−5.2 V. All loop compensation is integrated as well
further reducing the external component count as well.
The DC−DC converter has two operating modes (normal
PWM, pulsed switching), which are intended to allow for
optimum efficiency under either light (up to 30 mA) or
heavy loads. The user determines the operating mode by
controlling the SYNC input. In addition the SYNC input
can be used to synchronize the PWM to an external system
clock signal in the range of 500−1000 kHz.
Pulsed Mode (PM)
Under light load conditions (< 30 mA), the NCP1511 can
be configured to enter a low current pulsed mode operation
to reduce power consumption. This is accomplished by
applying a logic LOW to the SYNC pin. The output
regulation is implemented by pulse frequency modulation.
If the output voltage drops below the threshold of PM
comparator (typically Vnom−2%), a new cycle will be
initiated by the PM comparator to turn on the switch Q1. Q1
remains ON until the peak inductor current reaches 200 mA
(nom). Then ILIM comparator goes high to switch off Q1.
After a short dead time delay, switch rectifier Q2 is turn
ON. The zero crossing comparator will detect when the
inductor current drops to zero and send the signal to turn off
Q2. The output voltage continues to decrease through
discharging the output capacitor. When the output voltage
falls below the threshold of the PM comparator again, a
new cycle starts immediately.
PWM Operating Mode
The NCP1511 can be set to current mode PWM operation
by connecting SYNC pin to VCC. In this mode, the output
voltage is regulated by modulating the on−time pulse width
of the main switch Q1 at a fixed frequency of 1.0 MHz. The
switching of the PMOS Q1 is controlled by a flip−flop
driven by the internal oscillator and a comparator that
compares the error signal from an error amplifier with the
sum of the sensed current signal and compensation ramp.
At the beginning of each cycle, the main switch Q1 is
turned ON by the rising edge of the internal oscillator
clock. The inductor current ramps up until the sum of the
current sense signal and compensation ramp becomes
higher than the error voltage amplifier. Once this has
occurred, the PWM comparator resets the flip−flop, Q1 is
turned OFF and the synchronous switch Q2 is turned ON.
Q2 replaces the external Schottky diode to reduce the
conduction loss and improve the efficiency. To avoid
overall power loss, a certain amount of dead time is
introduced to ensure Q1 is completely turned OFF before
Q2 is being turned ON.
In continuous conduction mode (CCM), Q1 is turned ON
after Q2 is completely turned OFF to start a new clock
cycle. In discontinuous conduction mode (DCM), the zero
crossing comparator (ZLC) will turn off Q2 when the
inductor current drops to zero.
Cycle−by−Cycle Current Limit
From the block diagram, an ILIM comparator is used to
realize cycle−by−cycle current limit protection. The
comparator compares the LX pin voltage with the
reference voltage from the SENFET, which is biased by a
constant current. If the inductor current reaches the limit,
the ILIM comparator detects the LX voltage falling below
the reference voltage from the SENFET and releases the
signal to turn off the switch Q1. The cycle−by−cycle
current limit is set at 800 mA (nom) in PWM and 200 mA
in PM.
Frequency Synchronization and Operating Mode
Selection
The SYNC pin can also be used for frequency
synchronization by connecting it with an external clock
signal. It operates in PWM mode when synchronized to an
external clock. The switching cycle initiates by the rising
edge of the clock. The 500 kHz to 1000 kHz
synchronization clock signal should be between 0.4 V and
1.2 V.
Gating on and off the clock, the SYNC pin can also be
used to select between PM and PWM modes. It allows
efficient dynamical power management by adjusting the
converter operation to the specific system requirement. Set
SYNC pin low to select PM mode at light load conditions
(up to 30 mA) and set SYNC pin high or connect with
external clock to select PWM mode at heavy load condition
to achieve optimum efficiency. Table 1 shows the mode
selection with three different SYNC pin states.
Overvoltage Protection
The overvoltage protection circuit is present in PWM
mode to prevent the output voltage from going too high
under light load or fast load transient conditions. The
output overvoltage threshold is 5% above nominal set
value. If the output voltage rises above 5% of the nominal
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NCP1511
Soft−Start
Table 1. Operating Mode Selection
SYNC Pin State
The NCP1511 uses soft−start to limit the inrush current
when the device is initially powered up or enabled.
Soft−start is implemented by gradually increasing the
reference voltage until it reaches the full reference voltage.
During startup, a pulsed current source charges the internal
soft−start capacitor to provide gradually increasing
reference voltage for the PWM loop. When the voltage
across the capacitor ramps up to the nominal reference
voltage, the pulsed current source will be switched off and
the reference voltage will switch to the regular reference
voltage.
Operating Mode
LOW
Pulsed Mode (PM)
HIGH
PWM, 1 MHz Switch Frequency
CLOCK
PWM, Frequency Synchronization
Output Voltage Selection
The output voltage is digitally programmed to one of
four voltage levels depending on the logic state of CB0 and
CB1. Therefore if the NCP1511’s load, such as a digital
cellular phone’s baseband processor, supports dynamic
power management, the device can lower or raise its core
voltage under software control. When combined with the
pulsed current mode function in low load situations, this
active voltage management further stretches the useful
operating life of the handset battery between charges.
The output voltage levels are listed in Table 2. The CB0
has a pull down resistor and the CB1 has a pullup resistor.
The default output voltage is 1.3 V when CB0 and CB1 are
floating.
Shutdown Mode
When the SHD pin has a voltage applied of less than
0.4 V, the NCP1511 will be disabled. In shutdown mode,
the internal reference, oscillator and most of the control
circuitries are turned off. Therefore, the typical current
consumption will be 0.1 A (typical value).
Applying a voltage above 1.2 V to SHD pin will enable
the device for normal operation. The device will go through
soft−start to normal operation.
Table 2. Truth Table for CB0 and CB1 with the
Corresponding Output Voltage
Thermal Shutdown
CB0
CB1
Vout(V)
0
0
1.0
0
1
1.3
1
1
1.5
1
0
1.89
Internal Thermal Shutdown circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. If the junction
temperature exceeds 160°C, the device shuts down. In this
mode switch Q1 and Q2 and the control circuits are all
turned off. The device restarts in soft−start after the
temperature drops below 135C. This feature is provided
to prevent catastrophic failures from accidental device
overheating and it is not intended as a substitute for proper
heatsinking.
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NCP1511
APPLICATIONS INFORMATION
Component Selection
Where fs is the switching frequency and ESR is the
effective series resistance of the output capacitor. A low
ESR, 22 F ceramic capacitor is recommended for
NCP1511 in most of applications. For example, with TDK
C2012X5R0J226 output capacitor, the output ripple is less
than 10 mV at 300 mA.
Input Capacitor Selection
In PWM operating mode, the input current is pulsating
with large switching noise. Using an input bypass capacitor
reduces the peak current transients drawn from the input
supply source, thereby reducing switching noise
significantly. The capacitance needed for the input bypass
capacitor depends on the source impedance of the input
supply. The RMS capacitor current is calculated as:
IRMS IO D D
Design Example
As a design example, assume that the NCP1511 is used
in a single lithium−ion battery application. The input
voltage, Vin, is 3.0 V to 4.2 V. Output condition is Vout at
1.5 V with a typical load current of 120 mA and a maximum
of 300 mA. For NCP1511, the inductor has a predetermined
value, 6.8 H. The inductor ESR will factor into the overall
efficiency of the converter. The inductor needs to be
selected by the required peak current.
Equation 5 is the basic equation for an inductor and
describes the voltage across the inductor. The inductance
value determines the slope of the current of the inductor.
(eq. 1)
where:
D = duty cycle, which equals Vout/Vin, and D’ = 1 − D.
The maximum RMS current occurs at 50% duty cycle
with maximum output current, which is IO,max/2.
A low profile ceramic capacitor of 10 F should be used
for most of the cases. For effective bypass results, the input
capacitor should be placed as close as possible to the VCC
pin.
di
VL
L
L
dt
Inductor Value Selection
Selecting the proper inductor value is based on the
desired ripple current. The relationship between the
inductance and the inductor ripple current is given by the
equation below.
Equation 5 is rearranged to solve for the change in
current for the on−time of the converter in Continuous
Conduction Mode.
iL, pk−pk V
V
iL out 1 out
Lfs
Vin
(eq. 5)
(Vin Vout)
DTs
L
(eq. 2)
The DC current of the inductor should be at least equal
to the maximum load current plus half the ripple current to
prevent core saturation. For NCP1511, the compensation is
internally fixed and a fixed 6.8 H inductor is needed for
most of the applications. For better efficiency, choose a low
DC resistance inductor.
(Vin Vout) Vin 1
Vout fs
L
iL, max IO, max (eq. 6)
iL, pk−pk
2
Utilizing Equations 6, the peak−to−peak inductor current
is calculated using the following worst−case conditions.
Output Capacitor Selection
Vin, max 4.2 V, Vout 1.5 V, fs 1 MHz−20%,
Selecting the proper output capacitor is based on the
desired output ripple voltage. Ceramic capacitors with low
ESR values will have the lowest output ripple voltage and
are strongly recommended. The output ripple voltage is
given by:
L 6.8 H−10%, iL, pk−pk 197 mA, iL, max 399 mA
1
Vc iL ESR 4fsCout
Therefore, the inductor must have a maximum current
exceeding 405 mA.
Since the compensation is fixed internally in the IC, the
input and output capacitors as well as the inductor have a
predetermined value too: Cin = 10 F and Cout = 22 F. Low
ESR capacitors are needed for best performance.
Therefore, ceramic capacitors are recommended.
(eq. 3)
The RMS output capacitor current is given by:
IRMS(Cout) VO (1 D)
2 3 L fs
(eq. 4)
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NCP1511
PCB Layout Recommendations
for best performance. All connecting traces must be short,
direct, and wide to reduce voltage errors caused by resistive
losses through the traces.
3. Separate the feedback path of the output voltage from
the power path. Keep this path close to the NCP1511
circuit. And also route it away from noisy components.
This will prevent noise from coupling into the voltage
feedback trace.
4. Place the DC−DC converter away from noise sensitive
circuitry, such as RF circuits.
The following shows the NCP1511 demo board layout
and bill of materials:
Good PCB layout plays an important role in switching
mode power conversion. Careful PCB layout can help to
minimize ground bounce, EMI noise and unwanted feedback
that can affect the performance of the converter. Hints
suggested below can be used as a guideline in most situations.
1. Use star−ground connection to connect the IC ground
nodes and capacitor GND nodes together at one point.
Keep them as close as possible. And then connect this to the
ground plane through several vias. This will reduce noise
in the ground plane by preventing the switching currents
from flowing through the ground plane.
2. Place the power components (i.e., input capacitor,
inductor and output capacitor) as close together as possible
Figure 27. Top and Silkscreen Layer
Figure 28. Soldermask Top and Silkscreen Layer
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NCP1511
Figure 29. Bottom Layer
Table 3. Bill of Materials
Component
Value
Manufacturer
Part Number
Size (mm)
Iout (mA)
ESR (m)
Cin
10 F, X5R, 6.3 V
TDK
Murata
C2012X5R0J106
GRM21BR60J106
2.0 x 1.25 x 1.25
−
−
Cout
22 F, X5R, 6.3 V
TDK
Murata
C2012X5R0J226
GRM21BR60J226
2.0 x 1.25 x 1.25
−
−
L
6.8 H
TDK
Coilcraft
Coilcraft
Sumida
VLCF4020−6R8
0805PS−682
LPO4812
CLS4D11
4.0 x 4.0 x 2.0
3.4 x 3.0 x 1.8
4.8 x 4.8 x 1.2
4.9 x 4.9 x 1.2
500**
210*
340*
500**
146
1260
225
220
*Output current calculated from VCC = 4.2 Vmax, 1.5 Vout and Freq = 700 kHz (1.0 MHz − 20 %).
**Calculated output current from VCC = 4.2 Vmax and Freq = 700 kHz exceeds 640 mA (Ilim − 20%). Therefore maximum output for these
conditions shown as 500 mA.
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14
NCP1511
PACKAGE DIMENSIONS
9 PIN MICRO BUMP
FC SUFFIX
CASE 499AC−01
ISSUE B
−A−
4X
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
D
−B−
E
D1
e
TOP VIEW
C
A
0.10 C
B
e
0.05 C
9X
−C−
SEATING
PLANE
E1
A
b
1
2
DIM
A
A1
A2
D
E
b
e
D1
E1
3
0.05 C A B
A2
A1
SIDE VIEW
0.03 C
BOTTOM VIEW
SOLDERING FOOTPRINT*
0.50
0.0197
0.50
0.0197
0.265
0.01
SCALE 20:1
mm inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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15
MILLIMETERS
MIN
MAX
0.540
0.660
0.210
0.270
0.330
0.390
1.550 BSC
1.550 BSC
0.290
0.340
0.500 BSC
1.000 BSC
1.000 BSC
NCP1511
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
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damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
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NCP1511/D
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