HA2556/883 Wideband Four Quadrant Analog Multiplier (Voltage Output) July 1994 Features Description • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The HA-2556/883 is a monolithic, high speed, four quadrant, analog multiplier constructed in Intersil’ Dielectrically Isolated High Frequency Process. The voltage output simplifies many designs by eliminating the current-to-voltage conversion stage required for current output multipliers. The HA-2556/883 provides a 450V/µs output slew rate and maintains 52MHz and 57MHz bandwidths for the X and Y channels respectively, making it an ideal part for use in video systems. • High Speed Voltage Output. . . . . . . . . . . 450V/µs (Typ) • Low Multiplication error . . . . . . . . . . . . . . . . 1.5% (Typ) • Input Bias Currents . . . . . . . . . . . . . . . . . . . . . 8µA (Typ) • Signal Input Feedthrough . . . . . . . . . . . . . . -50dB (Typ) The suitability for precision video applications is demonstrated further by the Y Channel 0.1dB gain flatness to 5.0MHz, 1.5% multiplication error, -50dB feedthrough and differential inputs with 8µA bias current. The HA-2556 also has low differential gain (0.1%) and phase (0.1o) errors. • Wide Y Channel Bandwidth . . . . . . . . . . . 57MHz (Typ) • Wide X Channel Bandwidth . . . . . . . . . . . 52MHz (Typ) • 0.1dB Gain Flatness (VY). . . . . . . . . . . . . . 5.0MHz (Typ) Applications The HA-2556/883 is well suited for AGC circuits as well as mixer applications for sonar, radar, and medical imaging equipment. The HA-2556/883 is not limited to multiplication applications only; frequency doubling, power detection, as well as many other configurations are possible. • Military Avionics • Missile Guidance Systems • Medical Imaging Displays • Video Mixers Ordering Information • Sonar AGC Processors • Radar Signal Conditioning PART NUMBER • Voltage Controlled Amplifier HA1-2556/883 TEMPERATURE RANGE PACKAGE -55oC to +125oC 16 Lead CerDIP • Vector Generator Pinout Simplified Schematic V+ HA-2556/883 (CERDIP) TOP VIEW REF VREF 2 15 VXIOB VYIOB 3 14 NC VYIOA 4 VY+ 5 VY - 6 VOUT X 8 13 VX+ 12 VX- Y V- 7 VBIAS 16 VXIOA GND 1 VBIAS VX+ VX - VY + VY - 11 V+ +- Σ Z VZ + REF 10 VZ 9 VZ + V+ VZ - OUT + - VXIO A GND VXIOB VYIO A CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 8-7 VYIOB V- Spec Number 511063-883 File Number 3619 Specifications HA2556/883 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±40mA ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . < 2000V Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC Storage Temperature Range . . . . . . . . . . . . . . -65oC ≤ TA ≤ +150oC Max Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Thermal Resistance θJA θJC CerDIP Package . . . . . . . . . . . . . . . . . . . 82oC/W 27oC/W Maximum Package Power Dissipation at +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.22W Package Power Dissipation Derating Factor above +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12mW/oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Operating Conditions Operating Supply Voltage (±VS) . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V Operating Temperature Range . . . . . . . . . . . . -55oC ≤ TA ≤ +125oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Specified. PARAMETERS Multiplication Error Linearity Error Input Offset Voltage (VX) Input Bias Current (VX) Input Offset Current (VX) SYMBOL ME MAX UNITS 1 +25oC -3 3 %FS 2, 3 +125oC, -55oC -6 6 %FS VY, VX = ±5V 1 +25oC -0.5 0.5 %FS LE5V VY, VX = ±5V 1 +25oC -1 1 %FS VXIO VY = ±5V 1 +25oC -15 15 mV 2, 3 +125oC, -55oC -25 25 mV 1 +25oC -15 15 µA 2, 3 +125oC, -55oC -25 25 µA 1 +25oC -2 2 µA 2, 3 +125oC, -55oC -3 3 µA 1 +25oC 65 - dB 2, 3 +125oC, -55oC 65 - dB 1 +25oC 65 - dB 2, 3 +125oC, -55oC 65 - dB 1 +25oC 45 - dB 2, 3 +125oC, -55oC 45 - dB 1 +25oC -15 15 mV 2, 3 +125oC, -55oC -25 25 mV 1 +25oC -15 15 µA 2, 3 +125oC, -55oC -25 25 µA 1 +25oC -2 2 µA 2, 3 +125oC, -55oC -3 3 µA 1 +25oC 65 - dB 2, 3 +125oC, -55oC 65 - dB 1 +25oC 65 - dB 2, 3 +125oC, -55oC 65 - dB 1 +25oC 45 - dB 2, 3 +125oC, -55oC 45 - dB IB (VX) IIO (VX) Power Supply (VX) Rejection Ratio +PSRR (VX) -PSRR (VX) Input Offset Current (VY) MIN VY, VX = ±4V CMRR (VX) Input Bias Current (VY) TEMPERATURE LE4V Common Mode (VX) Rejection Ratio Input Offset Voltage (VY) CONDITIONS LIMITS GROUP A SUBGROUPS VYIO IB (VY) IIO (VY) Common Mode (VY) Rejection Ratio CMRR (VY) Power Supply (VY) Rejection Ratio +PSRR (VY) -PSRR (VY) VX = 0V, VY = 5V VX = 0V, VY = 5V VX CM = ±10V VY = 5V VCC = +12V to +17V VY = 5V VEE = -12V to -17V VY = 5V VX = ±5V VY = 0V, VX = 5V VY = 0V, VX = 5V VYCM = +9V, -10V VX = 5V VCC = +12V to +17V VX = 5V VEE = -12V to -17V VX = 5V Spec Number 8-8 511063-883 Specifications HA2556/883 TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Specified. PARAMETERS Input Offset Voltage (VZ) SYMBOL VZIO CONDITIONS TEMPERATURE MIN MAX UNITS 1 +25oC -15 15 mV -25 25 mV -15 15 µA -25 25 µA -2 2 µA -3 3 µA 65 - dB 65 - dB 65 - dB 65 - dB 45 - dB 45 - dB 20 - mA 20 - mA - -20 mA - -20 mA 5 - V 5 - V - -5 V - -5 V - 22 mA - 22 mA VX = 0V, VY = 0V 2, 3 Input Bias Current (VZ) IB (VZ) VX = 0V, VY = 0V 1 2, 3 Input Offset Current (VZ) IIO (VZ) VX = 0V, VY = 0V 1 2, 3 Common Mode (VZ) Rejection Ratio Power Supply (VZ) Rejection Ratio CMRR (VZ) +PSRR (VZ) -PSRR (VZ) Output Current +IOUT VZ CM = ±10V VX = 0V, VY = 0V 1 2, 3 VCC = +12V to +17V VX = 0V, VY = 0V 1 2, 3 VEE = -12V to -17V VX = 0V, VY = 0V 1 2, 3 VOUT = 5V, RL = 250Ω 1 2, 3 -IOUT VOUT = 5V, RL = 250Ω 1 2, 3 Output Voltage Swing +VOUT RL = 250Ω 1 2, 3 -VOUT RL = 250Ω 1 2, 3 Supply Current ±ICC LIMITS GROUP A SUBGROUPS VX, VY = 0V 1 2, 3 +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Table 2 Intentionally Left Blank. See AC Specifications in Table 3. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested: at VSUPPLY = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Specified. LIMITS PARAMETERS SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS VY, VZ CHARACTERISTICS (NOTE 2) Bandwidth BW(VY) -3dB, VX = 5V, VY ≤ 200mVP-P 1 +25oC 30 - MHz Gain Flatness GF(VY) 0.1dB, VX = 5V, VY ≤ 200mVP-P 1 +25oC 4.0 - MHz VISO fO = 5MHz, VY = 200mVP-P VX = Nulled 1, 3 +25oC - -45 dB 1 +25oC - 9.5 ns 1 +125oC, -55oC - 10 ns AC Feedthrough Rise and Fall Time TR, TF VY = 200mV Step, VX = 5V, 10% to 90% pts Spec Number 8-9 511063-883 Specifications HA2556/883 TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested: at VSUPPLY = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Specified. LIMITS PARAMETERS SYMBOL Overshoot +OS, -OS Slew Rate +SR, -SR CONDITIONS VY = 200mV step, VX = 5V NOTES TEMPERATURE MIN MAX UNITS 1 +25oC - 35 % - 50 % 410 - V/µs 1 VY = 10V step, VX = 5V 1 1 +125oC, -55oC +25oC +125oC, -55oC 360 - V/µs 650 - kΩ RIN (VY) VY = ±5V, VX = 0V 1 +25oC Bandwidth BW (VX) -3dB, VY = 5V, VX ≤ 200mVP-P 1 +25oC 30 - MHz Gain Flatness GF (VX) 0.1dB, VY = 5V, VX ≤ 200mVP-P 1 +25oC 2.0 - MHz AC Feedthrough VISO fO = 5MHz, VX = 200mVP-P VY = Nulled 1, 3 +25oC - -45 dB Rise & Fall Time TR, TF VX = 200mV step, VY = 5V, 10% to 90% pts 1 +25oC - 9.5 ns 1 +125oC, -55oC - 10 ns VX = 200mV step, VY = 5V 1 +25oC - 35 % 1 +125oC, -55oC - 50 % VX = 10V step, VY = 5V 1 +25oC 410 - V/µs 1 +125oC, -55oC 360 - V/µs VX = ±5V, VY = 0V 1 +25oC 650 - kΩ VY = ±5V, VX = 5V RL = 1kΩ to 250Ω 1 +25oC - 1 Ω Differential Input Resistance VX CHARACTERISTICS Overshoot +OS, -OS Slew Rate +SR, -SR Differential Input Resistance RIN (VX) OUTPUT CHARACTERISTICS Output Resistance ROUT NOTES: 1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot to lot and within lot variation. 2. VZ AC characteristics may be implied from VY due to the use of VZ as feedback in the test circuit. 3. Offset voltage applied to minimize feedthrough signal. TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS SUBGROUPS (SEE TABLE 1) Interim Electrical Parameters (Pre Burn-In) - Final Electrical Test Parameters 1 (Note 1), 2, 3 Group A Test Requirements 1, 2, 3 Groups C and D Endpoints 1 NOTE: 1. PDA applies to Subgroup 1 only. No other subgroups are included in PDA. Spec Number 8-10 511063-883 HA2556/883 Die Characteristics DIE DIMENSIONS: 71mils x 100mils x 19mils ± 1mils METALLIZATION: Type: Al, 1% Cu Thickness: 16kÅ ± 2kÅ GLASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos) Silox Thickness: 12kÅ ± 2kÅ Nitride Thickness: 3.5kÅ ± 1.5kÅ TRANSISTOR COUNT: 84 SUBSTRATE POTENTIAL: VWORST CASE CURRENT DENSITY: 0.47 x 105A/cm2 Metallization Mask Layout HA-2556/883 VREF (2) VXIOA (16) GND (1) VXIOB (15) VYIOB (3) VYIOA (4) (13) VX+ VY + (5) (12) VX - VY - (6) (11) V+ (7) V- (8) VOUT (9) VZ + (10) VZ - Spec Number 8-11 511063-883 HA2556/883 Test Waveforms LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT 16 NC NC 2 15 NC NC 3 14 NC NC 4 13 VX + 1 REF VY + 5 + - + - 6 -15V 12 11 +- 7 Σ +- +15 V VZ - 10 9 8 VZ + VOUT 50Ω 20pF 1K LARGE SIGNAL RESPONSE 0ns SMALL SIGNAL RESPONSE 500ns 1µs 0ns 8 250ns 500ns 200 4 OUTPUT (mV) OUTPUT (V) 100 0 0 -4 -100 VX = ±4V PULSE VY = 5VDC VY = ±100mV PULSE VX = 5VDC -8 -200 2V/DIV; 100ns/DIV 50mV/DIV; 50ns/DIV Burn-In Circuit HA-2556/883 CERAMIC DIP 16 NC NC 2 15 NC NC 3 14 NC NC 4 13 VX+ 1 REF VY + 5 6 -15.5V ±0.5V 0.01µF 7 + - + - +15.5V ±0.5V 11 +- Σ +- 10 VZ - D2 0.01µF 9 8 D1 12 VZ + VOUT D1 = D2 = 1N4002 OR EQUIVALENT (PER BOARD) Spec Number 8-12 511063-883 HA2556/883 Packaging c1 LEAD FINISH F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A) 16 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE -D- -A- BASE METAL E b1 M M (b) -Bbbb S C A-B S SECTION A-A D S D BASE PLANE Q A -C- SEATING PLANE α L S1 eA A A b2 e b ccc M C A-B S D S eA/2 INCHES (c) c aaa M C A - B S D S NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.200 - 5.08 - b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 D - 0.840 - 21.34 5 E 0.220 0.310 5.59 7.87 5 e 0.100 BSC 2.54 BSC eA 0.300 BSC 7.62 BSC - eA/2 0.150 BSC 3.81 BSC - L 0.125 0.200 3.18 5.08 - Q 0.015 0.060 0.38 1.52 6 S1 0.005 - 0.13 - 7 S2 0.005 - 0.13 - - α 90o 105o 90o 105o - aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - ccc - 0.010 - 0.25 - M - 0.0015 - 0.038 2 N 16 16 8 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b1. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling Dimension: Inch. 11. Lead Finish: Type A. 12. Materials: Compliant to MIL-I-38535. Spec Number 8-13 511063-883 HA2556 Semiconductor DESIGN INFORMATION Wideband Four Quadrant Analog Multiplier August 1999 The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves X CHANNEL MULTIPLIER ERROR X CHANNEL MULTIPLIER ERROR 1 1.5 Y = -4 Y = -5 1 Y = -3 0.5 0 ERROR %FS ERROR %FS Y=0 Y=1 Y=3 Y=2 -0.5 Y=4 -1 -6 -2 Y = -2 Y = -1 0 Y=0 -0.5 -1 Y=5 -4 0.5 0 X INPUT (V) 2 4 -1.5 -6 6 Y CHANNEL MULTIPLIER ERROR -4 -2 0 X INPUT (V) 2 4 6 4 6 Y CHANNEL MULTIPLIER ERROR 1.5 1 X = -3 X = -2 1 0.5 0.5 X = -1 ERROR%FS ERROR% FS X = -4 X=0 0 X = -5 X=5 X=1 -0.5 X=2 -0.5 -1 -1 -6 -4 -2 0 Y INPUT (V) 2 4 6 4 3 -4 -2 0 Y INPUT (V) 2 Y CHANNEL FULL POWER BANDWIDTH Y CHANNEL = 10VP-P X CHANNEL = 5VDC 4 3 2 1 1 GAIN (dB) 2 0 -1 -2 Y CHANNEL = 4VP-P X CHANNEL = 5VDC 0 -1 -2 -3 -3 -3dB AT 32.5MHz -4 10K X=4 X=3 -1.5 -6 Y CHANNEL FULL POWER BANDWIDTH GAIN (dB) X=0 0 100K 1M -4 10M 10K FREQUENCY (Hz) 100K 1M 10M FREQUENCY (Hz) Spec Number 8-14 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves (Continued) X CHANNEL FULL POWER BANDWIDTH X CHANNEL FULL POWER BANDWIDTH X CHANNEL = 10VP-P Y CHANNEL = 5VDC 4 3 3 2 GAIN (dB) 2 1 GAIN (dB) X CHANNEL = 4VP-P Y CHANNEL = 5VDC 4 0 1 0 -1 -1 -2 -2 -3 -3 -4 -4 10K 100K 1M 10K 10M 100K 1M FREQUENCY (Hz) Y CHANNEL BANDWIDTH vs X CHANNEL X CHANNEL BANDWIDTH vs Y CHANNEL 0 0 VY = 5VDC VX = 5VDC -6 GAIN (dB) GAIN (dB) 10M FREQUENCY (Hz) VX = 2VDC -12 -18 -6 VY = 2VDC -12 -18 VY = 0.5VDC -24 VX = 0.5VDC 10K 100K 1M FREQUENCY (Hz) VY = 200mVP-P 10M -24 100M VX = 200mVP-P 10K 100K Y CHANNEL CMRR vs FREQUENCY 10M 100M X CHANNEL CMRR vs FREQUENCY 0 0 -10 VY +, VY - = 200mVRMS -20 VX = 5VDC -10 -20 -30 VX +, VX - = 200mVRMS VY = 5VDC -30 CMRR (dB) CMRR (dB) 1M FREQUENCY (Hz) -40 -50 5MHz -38.8dB -60 -70 -40 5MHz -26.2dB -50 -60 -70 -80 -80 10K 100K 1M FREQUENCY (Hz) 10M 100M 10K 100K 1M FREQUENCY (Hz) 10M Spec Number 8-15 100M 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves (Continued) FEEDTHROUGH vs FREQUENCY 0 FEEDTRHOUGH vs FREQUENCY 0 VX = 200mVP-P -10 -20 VX = NULLED -20 FEEDTHROUGH (dB) FEEDTHROUGH (dB) VY = 200mVP-P -10 VY = NULLED -30 -52.6dB at 5MHz -40 -50 -60 -70 -80 -30 -49dB at 5MHz -40 -50 -60 -70 -80 10K 100K 1M FREQUENCY (Hz) 10M 10K 100M OFFSET VOLTAGE vs TEMPERATURE 100K 1M FREQUENCY (Hz) 10M 100M INPUT BIAS CURRENT (VX, VY, VZ) vs TEMPERATURE 14 8 13 7 BIAS CURRENT (uA) OFFSET VOLTAGE (mV) 12 6 |VIOZ| 5 4 3 2 |VIOX| 1 0 -100 11 10 9 8 7 6 5 |VIOY| -50 0 50 TEMPERATURE (oC) 100 4 -100 150 SCALE FACTOR ERROR vs TEMPERATURE 100 150 6 INPUT VOLTAGE RANGE (V) SCALE FACTOR ERROR (%) 0 50 TEMPERATURE (oC) INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE 2 1.5 1 0.5 0 -0.5 -1 -100 -50 5 X INPUT 3 2 1 -50 0 50 100 150 Y INPUT 4 4 6 8 10 12 14 16 ± SUPPLY VOLTAGE (V) TEMPERATURE (oC) Spec Number 8-16 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves (Continued) INPUT COMMON MODE RANGE vs SUPPLY VOLTAGE SUPPLY CURRENT vs SUPPLY VOLTAGE 25 15 X INPUT 10 20 SUPPLY CURRENT (mA) Y INPUT CMR (V) 5 0 -5 X & Y INPUT -10 -15 4 6 8 10 12 ±SUPPLY VOLTAGE (V) 14 ICC IEE 15 10 5 0 16 0 5 10 ±SUPPLY VOLTAGE (V) 15 20 OUTPUT VOLTAGE vs RLOAD MAX OUTPUT VOLTAGE (V) 5.0 4.8 4.6 4.4 4.2 100 300 500 RLOAD (Ω) 700 900 1100 Functional Block Diagram HA-2556 VX+ VOUT + VX- - A X + 1/SF ∑ VY+ + Y Z - VZ+ + - VY- VZ- NOTE: The transfer equation for the HA-2556 is: (VX + - VX -) (VY + - VY -) = SF (VZ + - VZ -), where SF = Scale Factor = 5V VX, VY, VZ = Differential Inputs Spec Number 8-17 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Applications Information Operation at Reduced Supply Voltages The HA-2556 will operate over a range of supply voltages, ±5V to ±15V. Use of supply voltages below ±12V will reduce input and output voltage ranges. See “Typical Performance Curves” for more information. Offset Adjustment X and Y channel offset voltages may be nulled by using a 20K potentiometer between the VYIO or VXIO adjust pin A and B and connecting the wiper to V-. Reducing the channel offset voltage will reduce AC feedthrough and improve the multiplication error. Output offset voltage can also be nulled by connecting VZ- to the wiper of a potentiometer which is tied between V+ and V-. Capacitive Drive Capability When driving capacitive loads >20pF a 50Ω resistor should be connected between VOUT and VZ+, using VZ+ as the output (see Figure 1). This will prevent the multiplier from going unstable and reduce gain peaking at high frequencies. The 50Ω resistor will dampen the resonance formed with the capacitive load and the inductance of the output at pin 8. Gain accuracy will be maintained because the resistor is inside the feedback loop. Theory of Operation The HA-2556 creates an output voltage that is the product of the X and Y input voltages divided by a constant scale factor of 5V. The resulting output has the correct polarity in each of the four quadrants defined by the combinations of positive and negative X and Y inputs. The Z stage provides the means for negative feedback (in the multiplier configuration) and an input for summation into the output. This results in the following equation, where X, Y and Z are high impedance differential inputs. 16 NC NC 2 15 NC NC 3 14 NC NC 4 13 VX + 1 To accomplish this the differential input voltages are first converted into differential currents by the X and Y input transconductance stages. The currents are then scaled by a constant reference and combined in the multiplier core. The multiplier core is a basic Gilbert Cell that produces a differential output current proportional to the product of X and Y input signal currents. This current becomes the output for the HA-2557. The HA-2556 takes the output current of the core and feeds it to a transimpedance amplifier, that converts the current to a voltage. In the multiplier configuration, negative feedback is provided with the Z transconductance amplifier by connecting VOUT to the Z input. The Z stage converts VOUT to a current which is subtracted from the multiplier core before being applied to the high gain transimpedance amp. The Z stage, by virtue of it’s similarity to the X and Y stages, also cancels second order errors introduced by the dependence of VBE on collector current in the X and Y stages. The purpose of the reference circuit is to provide a stable current, used in setting the scale factor to 5V. This is achieved with a bandgap reference circuit to produce a temperature stable voltage of 1.2V which is forced across a NiCr resistor. Slight adjustments to scale factor may be possible by overriding the internal reference with the VREF pin. The scale factor is used to maintain the output of the multiplier within the normal operating range of ±5V when full scale inputs are applied. The Balance Concept The open loop transfer equation for the HA-2556 is: V V –V ×V –V X+ X- Y+ Y- = A --------------------------------------------------------------------------– V –V OUT Z- Z+ 5 where; A = Output Amplifier Open Loop Gain VX, VY, VZ = Differential Input Voltages 5V = Fixed Scale Factor REF VY + 5 6 -15V + - + - 12 11 +- 7 Σ +- An understanding of the transfer function can be gained by assuming that the open loop gain, A, of the output amplifier is infinite. With this assumption, any value of VOUT can be generated with an infinitesimally small value for the terms within the brackets. Therefore we can write the equation: 10 +15 V VZ - 9 8 0 VZ + VOUT ( V X+ – V X- ) × ( V Y+ – V Y- ) = ---------------------------------------------------------------- – ( V Z+ – V Z- ) 5 which simplifies to: 50Ω 1K FIGURE 1. DRIVING CAPACITIVE LOAD V OUT XxY = ---------–Z 5 20pF ( V X+ – V X- ) × ( V Y+ – V Y- ) = 5 (V Z+ – V Z- ) This form of the transfer equation provides a useful tool to analyze multiplier application circuits and will be called the Balance Concept. Spec Number 8-18 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Let’s first examine the Balance Concept as it applies to the standard multiplier configuration (Figure 2). Signals may be applied to more than one input at a time as in the Squaring configuration in Figure 4: Signals A and B are input to the multiplier and the signal W is the result. By substituting the signal values into the Balance equation you get: Here the Balance equation will appear as: ( A) × ( B) = ( A) × ( A) = 5 ( W) HA-2556 VX + And solving for W: A W × B= A ----------5 A VX - + + Y ∑ Y - VZ + Z - VZ - Which simplifies to: + 2 - VY - A = ----5 W VZ - FIGURE 2. MULTIPLIER Notice that the output (W) enters the equation in the feedback to the Z stage. The Balance Equation does not test for stability, so remember that you must provide negative feedback. In the multiplier configuration, the feedback path is connected to VZ + input, not VZ -. This is due to the inversion that takes place at the summing node just prior to the output amplifier. Feedback is not restricted to the Z stage, other feedback paths are possible as in the Divider Configuration shown in Figure 3. The last basic configuration is the Square Root as shown in Figure 5. Here feedback is provided to both X and Y inputs. HA-2556 VX + VOUT + VX - - X + ∑ - VY + Y VZ + Z + - VOUT + VX - A The Balance equation takes the form: + B ( W) × ( –W) = ∑ + Y VZ + Z - VY- VZ - A W ( –A) = 5A Application Circuits FIGURE 3. DIVIDER Inserting the signal values A, B and W into the Balance Equation for the divider configuration yields: 5V 5 Which equates to: + - ( –W) × ( B) = A VZ - FIGURE 5. SQUARE ROOT (FOR A > 0) W X 1/5V VY + - VY - HA-2556 W A 1/5V + - + FIGURE 4. SQUARE - VX + VZ + Z VY - ∑ - VY + - + X 1/5V B + VOUT W W X VY + A VOUT A - 1/5V + - + VX - HA-2556 VX + 5 ( W) × ( –A) The four basic configurations (Multiply, Divide, Square and Square Root) as well as variations of these basic circuits have many uses. Frequency Doubler Solving for W yields: 5A W = ----B Notice that, in the divider configuration, signal B must remain ≥0 (positive) for the feedback to be negative. If signal B is negative, then it will be multiplied by the VX- input to produce positive feedback and the output will swing into the rail. For example, if ACos(ωτ) is substituted for signal A in the Square function, then it becomes a Frequency Doubler and the equation takes the form: ( ACos ( ωτ ) ) × ( ACos ( ωτ ) ) = 5 ( W) And using some trigonometric identities gives the result: A2 W = ----- ( 1 + Cos ( 2ωτ ) ) 10 Spec Number 8-19 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Square Root Communications The Square Root function can serve as a precision/wide bandwidth compander for audio or video applications. A compander improves the Signal to Noise Ratio for your system by amplifying low level signals while attenuating or compressing large signals (refer to Figure 17; X0.5 curve). This provides for better low level signal immunity to noise during transmission. On the receiving end the original signal may be reconstructed with the standard Square function. The Multiplier configuration has applications in AM Signal Generation, Synchronous AM Detection and Phase Detection to mention a few. These circuit configurations are shown in Figure 6, Figure 7 and Figure 8. The HA-2556 is particularly useful in applications that require high speed signals on all inputs. ACos(ωΑτ) HA-2556 VX + AUDIO - VX - A W X + ∑ 1/5V CCos(ωCτ) - VY + + CARRIER Y VZ + Z + - - VY - W Although the X and Y inputs have similar AC characteristics, they are not the same. The designer should consider input parameters such as small signal bandwidth, ac feedthrough and 0.1dB gain flatness to get the most performance from the HA-2556. The Y channel is the faster of the two inputs with a small signal bandwidth of typically 57MHz verses 52MHz for the X channel. Therefore in AM Signal Generation, the best performance will be obtained with the Carrier applied to the Y channel and the modulation signal (lower frequency) applied to the X channel. VOUT + VZ - AC - ( Cos ( ω C – ω A ) τ + Cos ( ω C + ω A ) τ ) = ----10 Scale Factor Control FIGURE 6. AM SIGNAL GENERATION HA-2556 AM SIGNAL VX + VOUT + - VX - X + ∑ 1/5V - VY + CARRIER W A + Y VZ + Z + - - VY - Each input X, Y and Z has similar wide bandwidth and input characteristics. This is unlike earlier products where one input was dedicated to a slow moving control function as is required for Automatic Gain Control. The HA-2556 is versatile enough for both. VZ - LIKE THE FREQUENCY DOUBLER YOU GET AUDIO CENTERED AT DC AND 2FC . The HA-2556 is able to operate over a wide supply voltage range ±5V to ±17.5V. The ±5V range is particularly useful in video applications. At ±5V the input voltage range is reduced to ±1.4V. The output cannot reach its full scale value with this restricted input, so it may become necessary to modify the scale factor. Adjusting the scale factor may also be useful when the input signal itself is restricted to a small portion of the full scale level. Here we can make use of the high gain output amplifier by adding external gain resistors. Generating the maximum output possible for a given input signal will improve the Signal to Noise Ratio and Dynamic Range of the system. For example, let’s assume that the input signals are 1VPEAK each. Then the maximum output for the HA-2556 will be 200mV. (1V x 1V / (5V) = 200mV. It would be nice to have the output at the same full scale as our input, so let’s add a gain of 5 as shown in Figure 9. FIGURE 7. SYNCHRONOUS AM DETECTION - A B ∑ + - Y Z VZ + Y - F = R ------ + 1 VZ - 250Ω RG FIGURE 9. EXTERNAL GAIN OF 5 VZ - = ----( Cos ( φ ) + Cos ( 2ωτ + φ ) ) 10 + R ExternalGain 1kΩ RF G - A2 VZ + Z + VY - W + VY - - VY + ∑ - 1/5V W X VY + W X + ACos(ωτ+φ) - 1/5V VOUT + VX - A + HA-2556 VX + VOUT + VX - ACos(ωτ) HA-2556 VX + A One caveat is that the output bandwidth will also drop by this factor of 5. The multiplier equation then becomes: W DC COMPONENT IS PROPORTIONAL TO Cos(f). 5AB = -------- = 5 A ×B FIGURE 8. PHASE DETECTION Spec Number 8-20 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Current Output Another useful circuit for low voltage applications allows the user to convert the voltage output of the HA2556 to an output current. The HA-2557 is a current output version offering 100MHz of bandwidth, but its scale factor is fixed and does not have an output amplifier for additional scaling. Fortunately the circuit in Figure 10 provides an output current that can be scaled with the value of RCONVERT and provides an output impedance of typically 1MΩ. The equation for IOUT becomes: A×B 1 -×R -------------------------= ----------I OUT 5 CONVERT 16 NC 2 15 NC NC 3 14 NC 4 NC VX + 1 REF NC CH A VY + CH B VY - - 5 -15V 12 + - 6 +15V VZ - 11 +- 7 VMIX (0V to 5V) 13 + 10 +- Σ VZ + 9 8 VOUT 50Ω FIGURE 11. VIDEO FADER A HA-2556 VX + VOUT + - VX - A 5K Y + Z VZ + VY - + 1/5V 5K ∑ Y + VZ + Z + - - 5K VZ - VY - FIGURE 10. CURRENT OUTPUT Video Fader 5K VZ - FIGURE 12. DIFFERENCE OF SQUARES The Video Fader circuit provides a unique function. Here Ch B is applied to the minus Z input in addition to the minus Y input. In this way, the function in Figure 11 is generated. VMIX will control the percentage of Ch A and Ch B that are mixed together to produce a resulting video image or other signal. R1 5K 95K R2 VX - - ( V MIX ) × ( ChA – ChB ) = 5 (V OUT – ChB ) A ∑ - VY + Y VZ + Z - V MIX - ( ChA – ChB ) + ---------5 B + - VY - ChB A-B W = 100 A X + + Which simplifies to: = VOUT 1/5V A HA-2556 + VX + The Balance equation looks like: OUT X VY + B + - - A - VX - - VY + W = 5(A2-B2) + ∑ 1/5V V HA-2556 VX + IOUT X + B RCONVERT A VZ - R1 and R2 set scale to 1V/%, other scale factors possible for A ≥ 0V. FIGURE 13. PERCENTAGE DEVIATION When VMIX is 0V the equation becomes VOUT = Ch B and Ch A is removed, conversely when VMIX is 5V the equation becomes VOUT = Ch A eliminating Ch B. For VMIX values 0V ≤ VMIX ≤ 5V the output is a blend of Ch A and Ch B. HA-2556 VX - VOUT + - VX + A X + 1/5V + - 5K VY - ∑ - VY + A-B W = 10 B + A Y Z VZ + B A + - VZ - 5K FIGURE 14. DIFFERENCE DIVIDED BY SUM (FOR A + B ≥ 0V) Spec Number 8-21 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Other Applications HA-2556 As shown above, a function may contain several different operators at the same time and use only one HA-2556. Some other possible multi-operator functions are shown in Figure 12, Figure 13 and Figure 14. REF Of course the HA-2556 is also well suited to standard multiplier applications such as Automatic Gain Control and Voltage Controlled Amplifier. NC 2 15 NC NC 3 14 NC NC 4 X 5 12 11 + V 6 +- -V 7 Figure 15 shows the HA-2556 configured in an Automatic Gain Control or AGC application. The HA-5127 low noise amplifier provides the gain control signal to the X input. This control signal sets the peak output voltage of the multiplier to match the preset reference level. The feedback network around the HA-5127 provides a response time adjustment. High frequency changes in the peak are rejected as noise or the desired signal to be transmitted. These signals do not indicate a change in the average peak value and therefore no gain adjustment is needed. Lower frequency changes in the peak value are given a gain of -1 for feedback to the control input. At DC the circuit is an integrator automatically compensating for Offset and other constant error terms. This multiplier has the advantage over other AGC circuits, in that the signal bandwidth is not affected by the control signal gain adjustment. HA-2556 13 VX+ (VGAIN) Y Automatic Gain Control Σ Z 10 9 8 5kΩ 500Ω VIN - + VOUT HFA0002 FIGURE 16. VOLTAGE CONTROLLED AMPLIFIER Voltage Controlled Amplifier A wide range of gain adjustment is available with the Voltage Controlled Amplifier configuration shown in Figure 16. Here the gain of the HFA0002 can be swept from 20V/V to a gain of almost 1000V/V with a DC voltage from 0 to 5V. Wave Shaping Circuits 16 NC 1 REF NC 2 15 NC NC 3 14 NC NC 4 VY + 5 X Wave shaping or curve fitting is another class of application for the analog multiplier. For example, where a non-linear sensor requires corrective curve fitting to improve linearity the HA-2556 can provide nonintegral powers in the range 1 to 2 or nonintegral roots in the range 0.5 to 1.0 (refer to Further Reading). This effect is displayed in Figure 17. 13 12 Y 11 +V 6 -V 16 NC 1 +- 7 Σ Z 1 10 9 8 X0.5 0.8 OUTPUT (V) VOUT 50Ω 10kΩ 0.1µF X0.7 0.6 0.4 1N914 X1.5 10kΩ 5kΩ 0.01µF X2 0.2 - +15V + HA-5127 0 5.6V 20kΩ 0.1µF 0 0.2 0.4 0.6 INPUT (V) 0.8 1 FIGURE 17. EFFECT OF NONINTEGRAL POWERS / ROOTS FIGURE 15. AUTOMATIC GAIN CONTROL Spec Number 8-22 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Well, OK a multiplier can’t do nonintegral roots “exactly” but we can get very close. We can approximate nonintegral roots with equations of the form: V V 2 + αV = ( 1 – α ) V IN IN o o HA-2556 16 NC 1 1 ⁄ 2 + αV = ( 1 – α ) V IN IN REF 15 NC NC 2 14 NC NC 3 0.7 Figure 18 compares the function VOUT = VIN approximation VOUT = 0.5VIN0.5 + 0.5VIN. to the 5 1 -V OUTPUT (V) X + 11 +V +- 7 Σ 1-α + 10 Z 8 X0.7 VIN 13 - 12 Y 6 0.8 + NC 4 α 9 - 0.6 1.0 ≤ M ≤ 2.0 0.5X0.5+ 0.5X 0.4 0V ≤ VIN ≤ 1V VOUT - + HA-5127 0.2 X 0 0 FIGURE 20. NONINTEGRAL POWERS - ADJUSTABLE 0.2 0.4 0.6 0.8 1 INPUT (V) HA-2556 FIGURE 18. COMPARE APPROXIMATION TO NONINTEGRAL ROOT REF This function can be easily built using an HA-2556 and a potentiometer for easy adjustment as shown in Figures 19 and 20. If a fixed nonintegral power is desired, the circuit shown in Figure 21 eliminates the need for the output buffer M amp. These circuits approximate the function VIN where M is the desired nonintegral power or root. 2 NC 3 15 NC 14 NC + 4 5 X + 6 -V VIN 13 - 12 Y VOUT 11 +- 7 Σ 8 R1 +V + 10 Z - 9 R2 16 NC 1 REF NC 2 15 NC NC 3 14 NC + 4 5 X + 6 7 8 1.2 ≤ M ≤ 2.0 13 V 11 +V +- Σ + VIN 10 Z - 1-α 9 R3 R4 0V ≤ VIN ≤ 1V - 12 Y -V NC NC HA-2556 NC 16 NC 1 OUT R2 2 + R3 - V = -15 R3 ----- + 1 V IN ----- + 1 --------------- R4 R1 + R2 IN R4 Setting: 1 α – α = 1-5 R3 ----- + 1 R4 α R2 - = R3 ----- + 1 ---------------R1 + R2 R4 FIGURE 21. NONINTEGRAL POWERS - FIXED 0.5 ≤ M ≤ 1.0 0V ≤ VIN ≤ 1V VOUT - + HA-5127 FIGURE 19. NONINTEGRAL ROOTS - ADJUSTABLE Spec Number 8-23 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. Values for α to give a desired M root or power are as follows: ROOTS - FIGURE 19 POWERS - FIGURE 20 M α M α 0.5 0 1.0 1 X+ VOUT 0.6 ≈ 0.25 1.2 ≈ 0.75 0.7 ≈ 0.50 1.4 ≈ 0.5 0.8 ≈ 0.70 1.6 ≈ 0.3 0.9 ≈ 0.85 1.8 ≈ 0.15 1.0 1 2.0 0 X10K VIN X By adding a second HA-2556 to the circuit an improved fit may be achieved with a theoretical maximum error of 0.5% as shown in Figure 23. Figure 23 has the added benefit that it will work for positive and negative input signals. This makes a convenient triangle (±5V input) to sine wave (±5V output) converter. V REF 2 15 NC NC 3 14 NC NC 4 + X VOUT +- Σ + 10 Z - OUT V Y- Z- 10K VOUT OUT Y+ Z+ Y- Z- 5V – 0.05494V 3 π V IN IN IN = --------------------------------------------------≈ 5 sin - ⋅ -------- 2 5 3.18167 + 0.0177919V 2 IN max theoretical error = 0.5%FS R1 262 R5 1. Pacifico Cofrancesco, “RF Mixers and ModulatorsMade with a Monolithic Four-Quadrant Multiplier” Microwave Journal, December 1991 pg. 58 - 70. 2. Richard Goller, “IC Generates Nonintegral Roots” Electronic Design, December 3, 1992. 1410 9 R4 1K R3 644 = R6 470 13 11 +V 8 V R2 470 - 12 Y 7 Z+ Further Reading 16 NC 1 -V Y+ FIGURE 23. BIPOLAR SINE-FUNCTION GENERATOR NC 6 - -5V ≤ VIN ≤ 5V HA-2556 5 5.71K HA-2556 HA-2556 Similar functions can be formulated to approximate a SINE function converter as shown in Figure 22. With a linearly changing (0 to 5V) input the output will follow 0o to 90o of a sine function (0 to 5V) output. This configuration is theoretically capable of ±2.1% maximum error to full scale. + VOUT + X Sine Function Generators VIN 71.5K 23.1K ( 1 – 0.1284V IN ) π V IN --------------------------------------≈ 5sin - ⋅ ------- 2 5 IN ( 0.6082 – 0.05V ) IN for; 0V ≤ VIN ≤ 5V where: R4 0.6082 = ----------------R3 + R4 max theoretical error = 2.1%FS ; 5 ( 0.05 ) 5 ( 0.1284 ) R2 = ---------------R1 + R2 R6 = ---------------R5 + R6 FIGURE 22. SINE-FUNCTION GENERATOR Spec Number 8-24 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. TYPICAL PERFORMANCE CHARACTERISTICS Device Tested at Supply Voltage = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Specified. PARAMETERS Multiplication Error SYMBOL ME Differential Gain TEMP TYP UNITS +25oC ±1.5 %FS +125oC, -55oC ±3.0 %FS VY, VX = ±5V +125oC, -55oC ±0.003 %FS/ oC LE3V VY, VX = ±3V +25oC ±0.02 %FS LE4V VY, VX = ±4V +25oC ±0.05 %FS LE5V VY, VX = ±5V +25oC ±0.2 %FS f = 4.43MHz, VY = 300mVP-P, VX = 5V +25oC 0.1 % f = 4.43MHz, VY = 300mVP-P, VX = 5V +25oC Multiplication Error Drift Linearity Error CONDITIONS VY, VX = ±5V DG Differential Phase DP 0.1 Deg. Scale Factor SF +25oC 5 V EN (1kHz) f = 1kHz, VX = 0V, VY = 0V +25oC 150 nV/√Hz f = 100kHz, VX = 0V, VY = 0V +25oC 40 nV/√Hz VS+ = +12V to +15V, VS- = -15V +25oC 80 dB +125oC, -55oC 80 dB Voltage Noise EN (100kHz) Positive Power Supply Rejection Ratio +PSRR Negative Power Supply Rejection Ratio -PSRR Supply Current ICC VS- = -12V to -15V, VS+ = +15V VX, VY = 0V +25oC 55 dB +125oC, -55oC 55 dB +25oC 18 mA +125oC, -55oC 18 mA +25oC ±3 mV INPUT CHARACTERISTICS Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Offset Current VIO VIOTC IB IIO VY = ±5V VY = ±5V VX = 0V, VY = 5V VX = 0V, VY = 5V +125oC, -55oC ±8 mV +125oC, -55oC ±45 µV/oC +25oC ±8 µA +125oC, -55oC ±12 µA +25oC ±0.5 µA +125oC, -55oC ±1.0 µA ±5 V Common Mode Range (VX) CMR (VX) +25oC ±10 V Common Mode Range (VY) CMR (VY) +25oC +9, -10 V +25oC 78 dB +125oC, -55oC 78 dB +25oC 78 dB +125oC, -55oC 78 dB +25oC 78 dB +125oC, -55oC 78 dB Differential Input Range Common Mode (VX) Rejection Ratio CMRR (VX) Common Mode (VY) Rejection Ratio CMRR (VY) Common Mode (VZ) Rejection Ratio CMRR (VZ) VX CM = ±10V, VY = 5V VY CM = +9V, -10V, VX = 5V VZ CM = ±10V, VX = 0V, VY = 0V +25oC VY , VZ CHARACTERISTICS (Note 1) Bandwidth BW (VY) -3dB, VX = 5V, VY ≤ 200mVP-P +25oC 57 MHz Gain Flatness GF (VY) 0.1dB, VX = 5V, VY ≤ 200mVP-P +25oC 5.0 MHz VISO (1MHz) fO = 1MHz, VY = 200mVP-P , VX = nulled (Note 2) +25oC -65 dB VISO (5MHz) fO = 5MHz, VY = 200mVP-P , VX = nulled (Note 2) +25oC -50 dB VY = 200mV step, VX = 5V, 10% to 90% pts +25oC 8 ns +125oC, -55oC 8 ns AC Feedthrough Rise and Fall Time TR, TF Spec Number 8-25 511063-883 HA2556 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied. TYPICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at Supply Voltage = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Specified. PARAMETERS SYMBOL Overshoot +OS, -OS Slew Rate +SR, -SR CONDITIONS VY = 200mV step, VX = 5V VY = 10V step, VX = 5V TEMP TYP UNITS +25oC 17 % +125oC, -55oC 17 % +25oC 450 V/µs +125oC, -55oC 450 V/µs 1 MΩ RIN (VY) VY = ±5V, VX = 0V +25oC Bandwidth BW (VX) -3dB, VY = 5V, VX ≤ 200mVP-P +25oC 52 MHz Gain Flatness GF (VX) 0.1dB, VY = 5V, VX ≤ 200mVP-P +25oC 4.0 MHz VISO (1MHz) fO = 1MHz, VX = 200mVP-P ,VY = nulled (Note 2) +25oC -65 dB VISO (5MHz) fO = 5MHz, VX = 200mVP-P , VY = nulled (Note 2) +25oC -50 dB VX = 200mV step, VY = 5V, 10% to 90% pts +25oC 8 ns +125oC, -55oC 8 ns Differential Input Resistance VX CHARACTERISTICS AC Feedthrough Rise & Fall Time TR, TF Overshoot +OS, -OS Slew Rate +SR, -SR Differential Input Resistance RIN (VX) +25oC 17 % +125oC, -55oC 17 % +25oC 450 V/µs +125oC, -55oC 450 V/µs VX = ±5V, VY = 0V +25oC 1 MΩ VX = 200mV step, VY = 5V VX = 10V step, VY = 5V OUTPUT CHARACTERISTICS Output Resistance ROUT VY = ±5V, VX = 5V, RL = 1kΩ to 250Ω +25oC 0.7 Ω Output Current IOUT VOUT = 5V, RL = 250Ω +25oC ±45 mA +125oC, -55oC ±45 mA +25oC ±6.05 V +125oC, -55oC ±6.05 V Output Voltage Swing +VOUT RL = 250Ω NOTES: 1. VZ AC characteristics may be implied from VY due to the use of VZ as feedback in the test circuit. 2. Offset voltage applied to minimize feedthrough signal. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Spec Number 8-26 511063-883