Fairchild HCPL-2611WV High speed-10 mbit/s logic gate optocoupler Datasheet

Single-Channel: 6N137, HCPL-2601, HCPL-2611
Dual-Channel: HCPL-2630, HCPL-2631
High Speed-10 MBit/s Logic Gate Optocouplers
tm
Features
Description
■
■
■
■
■
■
■
■
The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/
2631 dual-channel optocouplers consist of a 850 nm AlGaAS
LED, optically coupled to a very high speed integrated photodetector logic gate with a strobable output. This output features
an open collector, thereby permitting wired OR outputs. The
coupled parameters are guaranteed over the temperature range
of -40°C to +85°C. A maximum input signal of 5 mA will provide
a minimum output sink current of 13mA (fan out of 8).
Very high speed-10 MBit/s
Superior CMR-10 kV/µs
Double working voltage-480V
Fan-out of 8 over -40°C to +85°C
Logic gate output
Strobable output
Wired OR-open collector
U.L. recognized (File # E90700)
An internal noise shield provides superior common mode rejection of typically 10kV/µs. The HCPL- 2601 and HCPL- 2631 has
a minimum CMR of 5 kV/µs. The HCPL-2611 has a minimum
CMR of 10 kV/µs.
Applications
■
■
■
■
■
■
■
Ground loop elimination
LSTTL to TTL, LSTTL or 5-volt CMOS
Line receiver, data transmission
Data multiplexing
Switching power supplies
Pulse transformer replacement
Computer-peripheral interface
Package
Schematic
N/C 1
8 VCC
8
8 VCC
+ 1
VF1
+ 2
1
7 VE
_ 2
7 V01
VF
_
3
6 VO
_
6 V02
3
VF2
N/C 4
8
8
1
5 GND
6N137
HCPL-2601
HCPL-2611
1
5 GND
+ 4
HCPL-2630
HCPL-2631
Truth Table (Positive Logic)
Input
Enable
H
H
Output
L
L
H
H
H
L
H
H
L
L
H
NC
L
L
NC
H
A 0.1µF bypass capacitor must be connected between pins 8 and 5. (See note 1)
1
©2005 Fairchild Semiconductor Corporation
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
July 2006
Parameter
Symbol
Value
Units
Storage Temperature
TSTG
-55 to +125
°C
Operating Temperature
TOPR
-40 to +85
°C
Lead Solder Temperature
TSOL
260 for 10 sec
°C
50
mA
EMITTER
DC/Average Forward
Input Current
Single Channel
IF
Dual Channel (Each Channel)
Enable Input Voltage
Not to exceed VCC by more than 500 mV
Single Channel
VE
5.5
V
Each Channel
VR
5.0
V
Single Channel
PI
100
mW
Reverse Input Voltage
Power Dissipation
30
45
Dual Channel (Each Channel)
DETECTOR
Supply Voltage
Output Current
VCC
(1 minute max)
7.0
V
IO
50
mA
Each Channel
VO
7.0
V
Single Channel
PO
85
mW
Single Channel
Dual Channel (Each Channel)
Output Voltage
Collector Output
Power Dissipation
50
Dual Channel (Each Channel)
60
Recommended Operating Conditions
Parameter
Symbol
Min
Max
Units
IFL
0
250
µA
Input Current, High Level
IFH
*6.3
15
mA
Supply Voltage, Output
VCC
4.5
5.5
V
Input Current, Low Level
Enable Voltage, Low Level
VEL
0
0.8
V
Enable Voltage, High Level
VEH
2.0
VCC
V
Low Level Supply Current
TA
-40
+85
°C
Fan Out (TTL load)
N
8
*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is
5.0 mA or less.
2
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings (TA = 25°C unless otherwise specified)
Parameter
Test Conditions
EMITTER
Symbol
(IF = 10mA)
Input Forward Voltage
Min
Typ**
VF
TA = 25°C
Input Reverse Breakdown Voltage
(IR = 10µA)
Input Capacitance
1.4
BVR
(VF = 0, f = 1 MHz)
Input Diode Temperature Coefficient
(IF = 10mA)
Max
Unit
1.8
V
1.75
5.0
V
CIN
60
pF
∆VF/∆TA
-1.4
mV/°C
ICCH
7
10
DETECTOR
High Level Supply Current
Single Channel
Low Level Supply Current
Single Channel
(VCC = 5.5 V, IF = 0 mA)
Dual Channel
(VE = 0.5V)
(VCC = 5.5 V, IF = 10 mA)
Dual Channel
10
15
ICCL
9
13
14
21
IEL
-0.8
-1.6
mA
-0.6
-1.6
mA
(VE = 0.5V)
(VCC = 5.5 V, VE = 0.5V)
Low Level Enable Current
mA
High Level Enable Current
(VCC = 5.5 V, VE = 2.0V)
IEH
High Level Enable Voltage
(VCC = 5.5 V, IF = 10 mA)
VEH
Low Level Enable Voltage
(VCC = 5.5 V, IF = 10 mA)(Note 3)
VEL
mA
2.0
V
0.8
V
Switching Characteristics (TA = -40°C to +85°C, VCC = 5 V, IF = 7.5 mA Unless otherwise specified)
AC Characteristics
Test Conditions Symbol
Propagation Delay Time
to Output High Level
(Note 4) (TA = 25°C)
TPLH
Min
20
Typ** Max Unit
45
(RL = 350Ω, CL = 15 pF) (Fig. 12)
Propagation Delay Time
to Output Low Level
(Note 5) (TA = 25°C)
TPHL
25
45
(RL = 350Ω, CL = 15 pF) (Fig. 12)
(RL = 350Ω, CL = 15 pF) (Fig. 12)
Pulse Width Distortion
75
ns
100
75
ns
100
|TPHLTPLH|
3
35
ns
Output Rise Time
(10-90%)
(RL = 350Ω, CL = 15 pF)
(Note 6) (Fig. 12)
tr
50
ns
Output Rise Time
(90-10%)
(RL = 350Ω, CL = 15 pF)
(Note 7) (Fig. 12)
tf
12
ns
Enable Propagation Delay
Time to Output High Level
(IF = 7.5 mA, VEH = 3.5 V)
(RL = 350Ω, CL = 15 pF) (Note 8) (Fig. 13)
tELH
20
ns
Enable Propagation Delay
Time to Output Low Level
(IF = 7.5 mA, VEH = 3.5 V)
(RL = 350Ω, CL = 15 pF) (Note 9) (Fig. 13)
tEHL
20
ns
Common Mode Transient
Immunity (at Output High
Level)
(TA = 25°C) |VCM| = 50V, (Peak)
(IF = 0 mA, VOH (Min.) = 2.0V)
6N137, HCPL-2630
HCPL-2601, HCPL-2631
HCPL-2611
Common Mode Transient
Immunity (at Output Low
Level)
(RL = 350Ω) (Note 10)
(Fig. 14)
10,000
10,000
10,000 15,000
|CML|
10,000
V/µs
|VCM| = 50V (Peak)
HCPL-2601, HCPL-2631 (TA = 25°C)(Note 11)(Fig. 14)
HCPL-2611(TA = 25°C)
V/µs
5000
|VCM| = 400V
(RL = 350Ω) (IF = 7.5 mA, VOL (Max.) = 0.8V
6N137, HCPL-2630
|CMH|
|VCM| = 400V
3
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
5000
10,000
10,000 15,000
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Electrical Characteristics (TA = 0 to 70°C Unless otherwise specified)
Individual Component Characteristics
DC Characteristics
Test Conditions Symbol
Min
Typ**
Max
Unit
100
µA
High Level Output Current
(VCC = 5.5 V, VO = 5.5 V)
(IF = 250 µA, VE = 2.0 V) (Note 2)
IOH
Low Level Output Current
(VCC = 5.5 V, IF = 5 mA)
(VE = 2.0 V, ICL = 13 mA) (Note 2)
VOL
.35
0.6
V
(VCC = 5.5 V, VO = 0.6 V,
VE = 2.0 V, IOL = 13 mA)
IFT
3
5
mA
Max
Unit
1.0*
µA
Input Threshold Current
Isolation Characteristics (TA = -40°C to +85°C Unless otherwise specified.)
Characteristics
Input-Output
Insulation Leakage
Current
Withstand Insulation Test Voltage
Resistance (Input to Output)
Capacitance (Input to Output)
Test Conditions Symbol
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
(Note 12)
Min
Typ**
II-O
(RH < 50%, TA = 25°C)
(II-O ≤ 2 µA)
(Note 12) ( t = 1 min.)
VISO
(VI-O = 500 V) (Note 12)
RI-O
1012
Ω
(f = 1 MHz) (Note 12)
CI-O
0.6
pF
2500
VRMS
** All Typicals at VCC = 5V, TA = 25°C
NOTES
1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid
tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V CC and
GND pins of each device.
2. Each channel.
3. Enable Input - No pull up resistor required as the device has an internal pull up resistor.
4. tPLH -Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V
level on the LOW to HIGH transition of the output voltage pulse.
5. tPHL -Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V
level on the HIGH to LOW transition of the output voltage pulse.
6. tr -Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7. tf -Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8. tELH -Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input voltage pulse to
the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
9. tEHL -Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input voltage pulse to
the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
10. CMH -The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., V OUT
> 2.0 V). Measured in volts per microsecond (V/µs).
11. CML -The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the low output state (i.e.,
VOUT < 0.8 V). Measured in volts per microsecond (V/µs).
12. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
4
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Transfer Characteristics (TA = -40 to +85°C Unless otherwise specified)
30
16
10
IOL = 16 mA
0.6
IF - Forward Current (mA)
VOL - Low Level Output Voltage (V)
Conditions:
IF = 5 mA
VE = 2 V
VCC = 5.5V
0.7
IOL = 12.8 mA
0.5
0.4
0.3
0.2
1
0.1
0.01
IOL = 9.6 mA
0.1
IOL = 6.4 mA
0.0
-40
-20
0
0.001
20
40
60
80
0.9
1.0
1.1
TA - Ambient Temperature (°C)
120
50
IOL - Low Level Output Current (mA)
TP - Propagation Delay (ns)
VCC = 5 V
100
80
RL = 4 kΩ (TPLH)
60
40
0
RL = 350 Ω (TPLH)
5
7
RL = 1 kΩ
RL = 4 kΩ (TPHL)
RL = 350 kΩ
9
RL = 1 kΩ (TPLH)
11
13
1.6
IF = 10 mA
40
IF = 5 mA
35
30
Conditions:
VCC = 5 V
VE = 2 V
VOL = 0.6 V
25
-40
-20
0
20
40
60
80
TA - Ambient Temperature (°C)
Fig. 6 Output Voltage vs. Input Forward Current
6
5
RL = 350
VO - Output Voltage (V)
IFT - Input Threshold Current (mA)
1.5
IF = 15 mA
20
15
Fig. 5 Input Threshold Current
vs. Ambient Temperature
Conditions:
VCC = 5.0 V
VO = 0.6 V
1.4
45
IF - Forward Current (mA)
4
1.3
Fig. 4 Low Level Output Current
vs. Ambient Temperature
Fig.3 Switching Time vs. Forward Current
20
1.2
VF - Forward Voltage (V)
3
2
RL = 350Ω
4
RL =4kΩ
RL = 1kΩ
3
2
1
RL = 1kΩ
1
-40
RL = 4kΩ
-20
0
20
0
40
TA - Ambient Temperature (°C)
60
80
0
1
2
3
4
5
6
IF - Forward Current (mA)
5
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Fig. 2 Input Diode Forward Voltage
vs. Forward Current
Fig.1 Low Level Output Voltage vs. Ambient Temperature
0.8
600
60
Conditions:
IF = 7.5 mA
VCC = 5 V
Tr/Tf - Rise and Fall Time (ns)
PWD - Pulse Width Distortion (ns)
80
RL = 4 kΩ
40
RL = 1 kΩ
RL = 350Ω
20
0
500
400
Conditions:
IF = 7.5 mA
VCC = 5 V
RL = 4 kΩ (tr)
300
RL = 1 kΩ (tr)
200
RL = 350Ω (tr)
100
0
-60
-40
-20
0
20
40
60
80
-60
100
-40
-20
0
20
RL = 1 kΩ
RL = 4 kΩ
RL = 350Ω
(tf)
40
60
80
TA - Temperature (°C)
TA - Temperature (°C)
Fig. 9 Enable Propagation Delay vs. Temperature
Fig. 10 Switching Time vs. Temperature
120
100
120
100
TP - Propagation Delay (ns)
TE - Enable Propagation Delay (ns)
RL = 4 kΩ (TELH)
80
60
RL = 1 kΩ (TELH)
RL = 350Ω (TELH)
40
20
0
-60
RL = 350Ω
RL = 1 kΩ
RL = 4 kΩ
-40
-20
0
20
40
60
100
80
RL = 4 kΩ TPLH
RL = 1 kΩ TPLH
RL = 350Ω TPLH
60
40
RL = 1 kΩ
RL = 4 kΩ
RL = 350Ω
(TEHL)
80
100
20
-60
-40
-20
0
20
40
60
TPHL
80
100
TA - Temperature (°C)
TA - Temperature (°C)
Fig. 11 High Level Output Current
vs. Temperature
IOH - High Level Output Current (µA)
20
Conditions:
VCC = 5.5 V
VO = 5.5 V
VE = 2.0 V
IF = 250 µA
15
10
5
0
-60
-40
-20
0
20
40
60
80
100
TA - Temperature (°C)
6
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Fig. 8 Rise and Fall Time vs. Temperature
Fig. 7 Pulse Width Distortion vs. Temperature
+5V
IF = 7.5 mA
1
VCC
IF = 3.75 mA
8
Input
(IF )
7
Output
(VO )
t PHL
2
Input
Monitor
(I F)
.1 µf
bypass
RL
Output
(VO )
6
3
CL
47
4
GND
tPLH
1.5 V
90%
Output
(VO )
10%
5
tf
tr
Fig. 12 Test Circuit and Waveforms for tPLH, tPHL, tr and tf.
Pulse
Generator
tr = 5ns
Z O = 50Ω
Input
Monitor
(V E)
+5V
3.0 V
Input
(VE )
VCC
1
8
1.5 V
t EHL
7.5 mA
7
2
.1 µf
bypass
RL
1.5 V
Output
(VO )
6
3
t ELH
Output
(VO )
CL
4
GND
5
Fig. 13 Test Circuit tEHL and tELH.
7
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Pulse
Generator
tr = 5ns
Z O = 50Ω
IF
A
1
8
2
7
3
6
+5V
.1 µf
bypass
350Ω
B
VFF
4
GND
Output
(VO)
5
VCM
Pulse Gen
Peak
VCM
0V
CM H
5V
Switching Pos. (A), IF = 0
VO
VO (Min)
VO (Max)
VO
0.5 V
Switching Pos. (B), I F = 7.5 mA
CM L
Fig. 14 Test Circuit Common Mode Transient Immunity
8
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
VCC
Package Dimensions (Surface Mount)
0.390 (9.91)
0.370 (9.40)
PIN 1
ID.
4
3
2
4
3
2
PIN 1
ID.
1
1
0.270 (6.86)
0.250 (6.35)
5
6
7
0.270 (6.86)
0.250 (6.35)
8
5
6
7
8
SEATING PLANE
0.390 (9.91)
0.370 (9.40)
0.070 (1.78)
0.045 (1.14)
0.070 (1.78)
0.045 (1.14)
0.020 (0.51)
MIN
0.020 (0.51) MIN
0.200 (5.08)
0.140 (3.55)
0.154 (3.90)
0.120 (3.05)
0.022 (0.56)
0.016 (0.41)
0.016 (0.40)
0.008 (0.20)
0.100 (2.54) TYP
0.315 (8.00)
MIN
0.100 (2.54)
TYP
0.300 (7.62)
TYP
Package Dimensions (0.4"Lead Spacing)
3
2
0.016 (0.41)
0.008 (0.20)
0.045 [1.14]
0.022 (0.56)
0.016 (0.41)
15° MAX
0.405 (10.30)
MIN
Lead Coplanarity : 0.004 (0.10) MAX
4
0.300 (7.62)
TYP
Recommended Pad Layout for
Surface Mount Leadform
PIN 1
ID.
1
0.070 (1.78)
0.270 (6.86)
0.250 (6.35)
0.060 (1.52)
5
6
7
8
SEATING PLANE
0.390 (9.91)
0.370 (9.40)
0.100 (2.54)
0.295 (7.49)
0.070 (1.78)
0.045 (1.14)
0.415 (10.54)
0.004 (0.10) MIN
0.200 (5.08)
0.140 (3.55)
0.030 (0.76)
0.154 (3.90)
0.120 (3.05)
0.022 (0.56)
0.016 (0.41)
0.016 (0.40)
0.008 (0.20)
0.100 (2.54) TYP
0° to 15°
0.400 (10.16)
TYP
NOTE
All dimensions are in inches (millimeters)
9
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Package Dimensions (Through Hole)
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Ordering Information
Option
Example Part Number
Description
S
6N137S
SD
6N137SD
Surface Mount; Tape and reel
Surface Mount Lead Bend
W
6N137W
0.4" Lead Spacing
V
6N137V
VDE0884
WV
6N137WV
VDE0884; 0.4” lead spacing
SV
6N137SV
VDE0884; surface mount
SDV
6N137SDV
VDE0884; surface mount; tape and reel
QT Carrier Tape Specifications (“D” Taping Orientation)
12.0 ± 0.1
4.90 ± 0.20
0.30 ± 0.05
4.0 ± 0.1
Ø1.55 ± 0.05
4.0 ± 0.1
1.75 ± 0.10
7.5 ± 0.1
16.0 ± 0.3
13.2 ± 0.2
10.30 ± 0.20
0.1 MAX
10.30 ± 0.20
Ø1.6 ± 0.1
User Direction of Feed
10
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Marking Information
1
V
3
2601
2
XX YY T1
6
5
4
Definitions
1
Fairchild logo
2
Device number
3
VDE mark (Note: Only appears on parts ordered with VDE option –
See order entry table)
4
Two digit year code, e.g., ‘03’
5
Two digit work week ranging from ‘01’ to ‘53’
6
Assembly package code
Reflow Profile
Temperature (°C)
300
215 C, 10–30 s
250
225 C peak
200
150
Time above 183C, 60–150 sec
100
50
Ramp up = 3C/sec
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Time (Minute)
• Peak reflow temperature: 225C (package surface temperature)
• Time of temperature higher than 183C for 60–150 seconds
• One time soldering reflow is recommended
11
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
ACEx™
ActiveArray™
Bottomless™
Build it Now™
CoolFET™
CROSSVOLT™
DOME™
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
FAST®
FASTr™
FPS™
FRFET™
FACT Quiet Series™
GlobalOptoisolator™
GTO™
HiSeC™
I2C™
i-Lo™
ImpliedDisconnect™
IntelliMAX™
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
MSXPro™
Across the board. Around the world.™
The Power Franchise®
Programmable Active Droop™
OCX™
OCXPro™
OPTOLOGIC®
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerEdge™
PowerSaver™
PowerTrench®
QFET®
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
RapidConnect™
µSerDes™
ScalarPump™
SILENT SWITCHER®
SMART START™
SPM™
Stealth™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TCM™
TinyBoost™
TinyBuck™
TinyPWM™
TinyPower™
TinyLogic®
TINYOPTO™
TruTranslation™
UHC™
UniFET™
UltraFET®
VCX™
Wire™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body, or (b) support or
sustain life, or (c) whose failure to perform when properly used in
accordance with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or
system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its
safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I20
12
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.5
www.fairchildsemi.com
Single-Channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
TRADEMARKS
Similar pages