HD74AC107/HD74ACT107 Dual JK Flip-Flop (with Separate Clear and Clock) Description The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop. Inputs to the master section are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The sequence of operation is as follows: 1) isolate slave from master; 2) enter information from J and K inputs to master; 3) disable J and K inputs; 4) transfer information from master to slave. Features • Outputs Source/Sink 24 mA • HD74ACT107 has TTL-Compatible Inputs Pin Arrangement J1 1 14 VCC Q1 2 13 CD1 Q1 3 12 CP1 K1 4 11 K2 Q2 5 10 CD2 Q2 6 9 CP2 GND 7 8 J2 (Top view) HD74AC107/HD74ACT107 Logic Symbol 1 J1 Q1 3 CP1 12 4 K1 CD1 13 Q1 2 8 J2 9 CP2 11 K2 VCC = Pin14 GND = Pin7 CD2 Q2 6 Q2 5 10 Pin Names J1, J2, K1, K2 CP1, CP2 C D1, CD2 Q1, Q2, Q1, Q 2 Data Inputs Clock Pulse Inputs (Active Falling Edge) Direct Clear Inputs (Active Low) Outputs Truth Table Inputs Outputs @ tn @ tn + 1 J K Q L L Qn L H L H L H H H Qn H L tn tn + 1 2 : : : : High Voltage Level Low Voltage Level Bit time before clock pulse. Bit time after clock pulse. HD74AC107/HD74ACT107 Logic Diagram Q CD J #CP #CP Q K CP CP #CP #CP CP CP CP CP CP DC Characteristics (unless otherwise specified) Item Symbol Max Unit Condition Maximum quiescent supply current I CC 80 µA VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case Maximum quiescent supply current I CC 8.0 µA VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C Maximum additional ICC/input (HD74ACT107) I CCT 1.5 mA VIN = VCC – 2.1 V, VCC = 5.5 V Ta = Worst case 3 HD74AC107/HD74ACT107 AC Characteristics: HD74AC107 Ta = +25°C CL = 50 pF Ta = –40°C to +85°C CL = 50 pF Item Symbol VCC (V)*1 Min Typ Max Min Max Unit Maximum clock f max 3.3 125 — — 100 — MHz 5.0 150 — — 125 — 3.3 1.0 9.5 13.0 1.0 14.0 5.0 1.0 7.5 10.0 1.0 11.0 3.3 1.0 10.0 13.5 1.0 14.5 5.0 1.0 8.0 10.5 1.0 11.5 3.3 1.0 9.5 13.0 1.0 14.0 5.0 1.0 7.5 10.0 1.0 11.0 3.3 1.0 9.5 13.0 1.0 14.0 5.0 1.0 7.5 10.0 1.0 11.0 frequency Propagation delay t PLH CP to Q or Q Propagation delay t PHL CP to Q or Q Propagation delay t PLH CD to Q Propagation delay t PHL CD to Q Note: ns ns ns ns 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V Operating Requirements: HD74AC107 Ta = –40°C to +85°C CL = 50 pF Ta = +25°C CL = 50 pF Item Symbol VCC (V)*1 Typ Guaranteed Minimum Unit Setup time t su 3.3 3.0 5.5 6.0 ns 5.0 2.0 4.0 4.5 3.3 –1.5 0.0 0.0 5.0 –0.5 0.0 0.0 3.3 2.0 5.5 7.5 5.0 2.0 4.5 5.0 3.3 –2.5 0.0 0.0 5.0 –1.5 0.0 0.0 J or k to CP Hold time th CP to J or k Pulse width tw CP or CD Recovery time CD to CP Note: 4 t rec 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V HD74AC107/HD74ACT107 AC Characteristics: HD74ACT107 Ta = +25°C CL = 50 pF Ta = –40°C to +85°C CL = 50 pF Item Symbol VCC (V)*1 Min Typ Max Min Max Unit Maximum clock frequency f max 5.0 100 — — 80 — MHz Propagation delay CP to Q or Q t PLH 5.0 1.0 9.5 12.5 1.0 13.5 ns Propagation delay CP to Q or Q t PHL 5.0 1.0 10.5 13.0 1.0 14.0 Propagation delay CD to Q t PLH 5.0 1.0 8.5 11.0 1.0 12.0 Propagation delay CD to Q t PHL 5.0 1.0 8.5 11.0 1.0 12.0 Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V Operating Requirements: HD74ACT107 Ta = –40°C to +85°C CL = 50 pF Ta = +25°C CL = 50 pF Item Symbol VCC (V)*1 Typ Guaranteed Minimum Unit Setup time J or k to CP t su 5.0 2.5 7.0 8.0 ns Hold time CP to J or k th 5.0 0.0 1.5 1.5 Pulse width CP or CD tw 5.0 4.5 7.0 8.0 Recovery time CD to CP t rec 5.0 — 3.0 3.0 Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V Capacitance Item Symbol Typ Unit Condition Input capacitance CIN 4.5 pF VCC = 5.5 V Power dissipation capacitance CPD 35.0 pF VCC = 5.0 V 5 Unit: mm 19.20 20.32 Max 8 6.30 7.40 Max 14 1.30 7 2.54 ± 0.25 0.48 ± 0.10 0.51 Min 2.39 Max 2.54 Min 5.06 Max 1 7.62 + 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-14 Conforms Conforms 0.97 g Unit: mm 10.06 10.5 Max 8 5.5 14 1 0.10 ± 0.10 1.42 Max 1.27 *0.42 ± 0.08 0.40 ± 0.06 *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 7 + 0.20 7.80 – 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-14DA — Conforms 0.23 g Unit: mm 8.65 9.05 Max 8 1 7 *0.20 ± 0.05 0.635 Max 1.75 Max 3.95 14 + 0.10 6.10 – 0.30 1.08 *0.40 ± 0.06 0.11 0.14 +– 0.04 0° – 8° 1.27 0.67 0.60 +– 0.20 0.15 0.25 M *Pd plating Hitachi Code JEDEC EIAJ Weight (reference value) FP-14DN Conforms Conforms 0.13 g Unit: mm 4.40 5.00 5.30 Max 14 8 1 7 0.65 0.20 ± 0.06 1.0 0.13 M 6.40 ± 0.20 0.10 *Dimension including the plating thickness Base material dimension *0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.83 Max 0.07 +0.03 –0.04 *0.22+0.08 –0.07 0° – 8° 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) TTP-14D — — 0.05 g Cautions 1. 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