Intersil HGTP7N60A4 600v, smps series n-channel igbt Datasheet

TM
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4,
HGTP7N60A4
Data Sheet
June 2000
File Number
600V, SMPS Series N-Channel IGBT
Features
The HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4 and
HGTP7N60A4 are MOS gated high voltage switching
devices combining the best features of MOSFETs and
bipolar transistors. These devices have the high input
impedance of a MOSFET and the low on-state conduction
loss of a bipolar transistor. The much lower on-state voltage
drop varies only moderately between 25oC and 150oC.
• >100kHz Operation at 390V, 7A
This IGBT is ideal for many high voltage switching
applications operating at high frequencies where low
conduction losses are essential. This device has been
optimized for high frequency switch mode power supplies.
• Temperature Compensating SABER™ Model
www.intersil.com
4826.2
• 200kHz Operation at 390V, 5A
• 600V Switching SOA Capability
• Typical Fall Time . . . . . . . . . . . . . . . . . . . .75ns at TJ = 125oC
• Low Conduction Loss
Symbol
C
Formerly Developmental Type TA49331.
Ordering Information
G
PART NUMBER
PACKAGE
BRAND
HGTD7N60A4S
TO-252AA
7N60A4
HGT1S7N60A4S
TO-263AB
7N60A4
HGTG7N60A4
TO-247
7N60A4
HGTP7N60A4
TO-220AB
7N60A4
E
NOTE: When ordering, use the entire part number. Add the suffix 9A
to obtain the TO-252AA and TO-263AB variant in tape and reel,
e.g., HGTD7N60A4S9A.
Packaging
JEDEC STYLE TO-247
JEDEC TO-220AB
E
E
C
C
G
COLLECTOR
(FLANGE)
COLLECTOR
(FLANGE)
JEDEC TO-252AA
JEDEC TO-263AB
COLLECTOR
(FLANGE)
G
E
G
G
E
COLLECTOR
(FLANGE)
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,598,461
4,682,195
4,803,533
4,888,627
4,417,385
4,605,948
4,684,413
4,809,045
4,890,143
2-1
4,430,792
4,620,211
4,694,313
4,809,047
4,901,127
4,443,931
4,631,564
4,717,679
4,810,665
4,904,609
4,466,176
4,639,754
4,743,952
4,823,176
4,933,740
4,516,143
4,639,762
4,783,690
4,837,606
4,963,951
4,532,534
4,641,162
4,794,432
4,860,080
4,969,027
4,587,713
4,644,637
4,801,986
4,883,767
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
SABER™ is a trademark of Analogy, Inc. | 1-888-INTERSIL or 321-724-7143
Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
ALL TYPES
UNITS
600
V
34
14
56
±20
±30
35A at 600V
25mJ at 7A
125
1.0
-55 to 150
A
A
A
V
V
W
W/oC
oC
300
260
oC
oC
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES
Collector Current Continuous
At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25
At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ICM
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM
Switching Safe Operating Area at TJ = 150oC, Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . SSOA
Single Pulse Avalanche Energy at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Lead Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TPKG
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. Pulse width limited by maximum junction temperature.
Electrical Specifications
TJ = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Collector to Emitter Breakdown Voltage
BVCES
IC = 250µA, VGE = 0V
600
-
-
V
Emitter to Collector Breakdown Voltage
BVECS
IC = 10mA, VGE = 0V
20
-
-
V
-
-
250
µA
Collector to Emitter Leakage Current
Collector to Emitter Saturation Voltage
Gate to Emitter Threshold Voltage
ICES
VCE = 600V
VCE(SAT)
IC = 7A,
VGE = 15V
VGE(TH)
TJ = 25oC
TJ = 125oC
TJ = 25oC
TJ = 125oC
IC = 250µA, VCE = 600V
-
-
2
mA
-
1.9
2.7
V
-
1.6
2.2
V
4.5
5.9
7.0
V
-
-
±250
nA
Gate to Emitter Leakage Current
IGES
VGE = ±20V
Switching SOA
SSOA
TJ = 150oC, RG = 25Ω, VGE = 15V
L = 100µH, VCE = 600V
35
-
-
A
EAS
ICE = 7A, L = 500µH
25
-
-
mJ
VGEP
IC = 7A, VCE = 300V
-
9.0
-
V
VGE = 15V
-
37
45
nC
VGE = 20V
-
48
60
nC
-
11
-
ns
Pulsed Avalanche Energy
Gate to Emitter Plateau Voltage
On-State Gate Charge
Qg(ON)
Current Turn-On Delay Time
td(ON)I
Current Rise Time
trI
Current Turn-Off Delay Time
td(OFF)I
Current Fall Time
tfI
IC = 7A,
VCE = 300V
IGBT and Diode at TJ = 25oC
ICE = 7A
VCE = 390V
VGE = 15V
RG = 25Ω
L = 1mH
Test Circuit (Figure 20)
-
11
-
ns
-
100
-
ns
-
45
-
ns
-
55
-
µJ
Turn-On Energy (Note 2)
EON1
Turn-On Energy (Note 2)
EON2
-
120
150
µJ
Turn-Off Energy (Note 3)
EOFF
-
60
75
µJ
2-2
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
Electrical Specifications
TJ = 25oC, Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
Current Turn-On Delay Time
td(ON)I
Current Rise Time
trI
Current Turn-Off Delay Time
td(OFF)I
Current Fall Time
tfI
TEST CONDITIONS
MIN
TYP
IGBT and Diode at TJ = 125oC
ICE = 7A
VCE = 390V
VGE = 15V
RG = 25Ω
L = 1mH
Test Circuit (Figure 20)
MAX
UNITS
-
10
-
ns
-
7
-
ns
-
130
150
ns
-
75
85
ns
-
50
-
µJ
µJ
Turn-On Energy (Note 2)
EON1
Turn-On Energy (Note 2)
EON2
-
200
215
Turn-Off Energy (Note 3)
EOFF
-
125
170
µJ
Thermal Resistance Junction To Case
RθJC
-
-
1.0
oC/W
NOTES:
2. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2
is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in
Figure 20.
3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
Unless Otherwise Specified
VGE = 15V
30
25
20
15
10
5
0
25
50
75
100
125
150
40
TJ = 150oC, RG = 25Ω, VGE = 15V, L = 100µH
30
20
10
0
0
TC , CASE TEMPERATURE (oC)
VGE
200
100 fMAX1 = 0.05 / (td(OFF)I + td(ON)I)
fMAX2 = (PD - PC) / (EON2 + EOFF)
PC = CONDUCTION DISSIPATION
(DUTY FACTOR = 50%)
RØJC = 1.0oC/W, SEE NOTES
TJ = 125oC, RG = 25Ω, L = 2mH, V CE = 390V
5
10
ICE, COLLECTOR TO EMITTER CURRENT (A)
20
tSC , SHORT CIRCUIT WITHSTAND TIME (µs)
fMAX, OPERATING FREQUENCY (kHz)
TC
1
300
400
500
600
16
140
VCE = 390V, RG = 25Ω, TJ = 125oC
120
14
ISC
12
100
10
80
8
60
tSC
6
4
10
11
12
13
40
14
15
VGE , GATE TO EMITTER VOLTAGE (V)
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
2-3
700
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
75oC 15V
30
200
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 1. DC COLLECTOR CURRENT vs CASE
TEMPERATURE
500
100
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
20
ISC, PEAK SHORT CIRCUIT CURRENT (A)
ICE , DC COLLECTOR CURRENT (A)
35
ICE, COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
30
Unless Otherwise Specified (Continued)
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
DUTY CYCLE < 0.5%, VGE = 12V
PULSE DURATION = 250µs
25
TJ = 125oC
20
15
10
TJ = 25oC
5
0
TJ = 150oC
0.5
2.5
1.0
1.5
2.0
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
0
300
200
100
TJ = 25oC, VGE = 12V, VGE = 15V
15
10
0
2
4
6
8
10
12
ICE , COLLECTOR TO EMITTER CURRENT (A)
TJ = 125oC
5
TJ = 150oC
0.5
1.0
1.5
2.0
2.5
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
RG = 25Ω, L = 1mH, VCE = 390V
300
250
200
TJ = 125oC, VGE = 12V OR 15V
150
100
50
14
TJ = 25oC, VGE = 12V OR 15V
0
2
4
6
8
10
12
14
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
40
RG = 25Ω, L = 1mH, VCE = 390V
TJ = 25oC, VGE = 12V
trI , RISE TIME (ns)
TJ = 125oC, VGE = 12V
TJ = 25oC, VGE = 15V
12
3.0
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
RG = 25Ω, L = 1mH, VCE = 390V
14
TJ = 25oC
0
0
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
td(ON)I, TURN-ON DELAY TIME (ns)
20
0
EOFF, TURN-OFF ENERGY LOSS (µJ)
EON2 , TURN-ON ENERGY LOSS (µJ)
TJ = 125oC, VGE = 12V, VGE = 15V
16
25
350
RG = 25Ω, L = 1mH, VCE = 390V
400
0
DUTY CYCLE < 0.5%, VGE = 15V
PULSE DURATION = 250µs
3.0
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
500
30
TJ = 25oC, VGE = 12V, VGE = 15V
30
20
10
10
TJ = 125oC, VGE = 15V
TJ = 125oC, VGE = 12V, VGE = 15V
0
8
0
2
4
6
8
10
12
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
2-4
14
0
2
4
6
8
10
12
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
14
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
Typical Performance Curves
90
RG = 25Ω, L = 1mH, VCE = 390V
RG = 25Ω, L = 1mH, VCE = 390V
80
160
tfI , FALL TIME (ns)
td(OFF)I , TURN-OFF DELAY TIME (ns)
180
Unless Otherwise Specified (Continued)
VGE = 15V, TJ = 125oC
140
120
VGE = 12V, TJ = 125oC
100
VGE = 15V, TJ = 25oC
80
2
4
6
8
TJ = 125oC, VGE = 12V OR 15V
60
50
TJ = 25oC, VGE = 12V OR 15V
40
30
VGE = 12V, TJ = 25oC
60
0
70
10
12
20
14
0
2
ICE , COLLECTOR TO EMITTER CURRENT (A)
120
15
DUTY CYCLE < 0.5%, VCE = 10V
PULSE DURATION = 250µs
TJ = 25oC
80
TJ = 125oC
60
TJ = -55oC
40
20
0
7
8
9
10
11
12
13
14
9
VCE = 200V
6
3
5
0
ICE = 7A
ICE = 3.5A
125
TC , CASE TEMPERATURE (oC)
FIGURE 15. TOTAL SWITCHING LOSS vs CASE
TEMPERATURE
2-5
150
ETOTAL, TOTAL SWITCHING ENERGY LOSS (mJ)
ETOTAL, TOTAL SWITCHING ENERGY LOSS (µJ)
400
100
10
15
20
25
30
35
40
FIGURE 14. GATE CHARGE WAVEFORMS
ICE = 14A
75
14
QG , GATE CHARGE (nC)
RG = 25Ω, L = 1mH, VCE = 390V, VGE = 15V
ETOTAL = EON2 + EOFF
50
12
VCE = 400V
0
15
600
0
25
10
VCE = 600V
12
FIGURE 13. TRANSFER CHARACTERISTIC
200
8
IG(REF) = 1mA, RL = 43Ω, TJ = 25oC
VGE, GATE TO EMITTER VOLTAGE (V)
800
6
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER
CURRENT
VGE, GATE TO EMITTER VOLTAGE (V)
ICE, COLLECTOR TO EMITTER CURRENT (A)
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
100
4
ICE , COLLECTOR TO EMITTER CURRENT (A)
10
TJ = 125oC, L = 1mH, VCE = 390V, VGE = 15V
ETOTAL = EON2 + EOFF
1
ICE = 14A
ICE = 7A
ICE = 3.5A
0.1
10
100
1000
RG, GATE RESISTANCE (Ω)
FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
Unless Otherwise Specified (Continued)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
Typical Performance Curves
1.4
FREQUENCY = 1MHz
C, CAPACITANCE (nF)
1.2
1.0
0.8
CIES
0.6
0.4
COES
0.2
CRES
0
0
20
40
60
80
100
2.8
DUTY CYCLE < 0.5%, TJ = 25oC
PULSE DURATION = 250µs,
2.6
2.4
ICE = 14A
2.2
ICE = 7A
2.0
ICE = 3.5A
1.8
9
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
11
12
13
14
15
16
VGE, GATE TO EMITTER VOLTAGE (V)
FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
ZθJC , NORMALIZED THERMAL RESPONSE
10
FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE
vs GATE TO EMITTER VOLTAGE
100
0.5
0.2
10-1
t1
0.1
PD
0.05
t2
0.02
DUTY FACTOR, D = t1 / t2
PEAK TJ = (PD X ZθJC X RθJC) + TC
0.01
SINGLE PULSE
10-2
10-5
10-4
10-3
10-2
10-1
100
101
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 19. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
Test Circuit and Waveforms
RHRP660
90%
10%
VGE
EON2
EOFF
L = 1mH
VCE
RG = 25Ω
90%
+
-
ICE
VDD = 390V
10%
td(OFF)I
tfI
trI
td(ON)I
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
2-6
FIGURE 21. SWITCHING TEST WAVEFORMS
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler’s body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (ICE) plots are possible using
the information shown for a typical unit in Figures 5, 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows fMAX1 or fMAX2; whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD LD26” or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to
voltage buildup on the input capacitor due to leakage
currents or pickup.
fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. td(OFF)I and td(ON)I are defined in Figure 21.
Device turn-off delay can establish an additional frequency
limiting condition for an application other than TJM.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The
allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device switching and conduction losses must
not exceed PD. A 50% duty factor was used (Figure 3) and
the conduction losses (PC) are approximated by
PC = (VCE x ICE)/2.
EON2 and EOFF are defined in the switching waveforms
shown in Figure 21. EON2 is the integral of the
instantaneous power loss (ICE x VCE) during turn-on and
EOFF is the integral of the instantaneous power loss
(ICE x VCE) during turn-off. All tail losses are included in the
calculation for EOFF; i.e., the collector current equals zero
(ICE = 0).
7. Gate Protection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
2-7
ECCOSORBD™ is a trademark of Emerson and Cumming, Inc.
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
TO-247
3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE
A
E
SYMBOL
ØP
Q
ØR
D
L1
b1
c
2
1
3
3
J1
e
e1
MAX
MILLIMETERS
MIN
MAX
NOTES
0.180
0.190
4.58
4.82
-
b
0.046
0.051
1.17
1.29
2, 3
b1
0.060
0.070
1.53
1.77
1, 2
b2
0.095
0.105
2.42
2.66
1, 2
c
0.020
0.026
0.51
0.66
1, 2, 3
D
0.800
0.820
20.32
20.82
-
E
0.605
0.625
15.37
15.87
e1
b
MIN
A
e
b2
L
INCHES
TERM. 4
ØS
0.219 TYP
0.438 BSC
5.56 TYP
11.12 BSC
4
4
J1
0.090
0.105
2.29
2.66
1
L
0.620
0.640
15.75
16.25
-
BACK VIEW
L1
0.145
0.155
3.69
3.93
1
2
5
ØP
0.138
0.144
3.51
3.65
-
Q
0.210
0.220
5.34
5.58
-
ØR
0.195
0.205
4.96
5.20
-
ØS
0.260
0.270
6.61
6.85
-
NOTES:
1. Lead dimension and finish uncontrolled in L1.
2. Lead dimension (without solder).
3. Add typically 0.002 inches (0.05mm) for solder coating.
4. Position of lead to be measured 0.250 inches (6.35mm) from bottom
of dimension D.
5. Position of lead to be measured 0.100 inches (2.54mm) from bottom
of dimension D.
6. Controlling dimension: Inch.
7. Revision 1 dated 1-93.
2-8
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
TO-252AA
SURFACE MOUNT JEDEC TO-252AA PLASTIC PACKAGE
E
H1
A
b2
SYMBOL
A
A1
b
b1
b2
b3
c
D
E
e
e1
H1
J1
L
L1
A1
SEATING
PLANE
D
L2
1
L
3
b1
b
L1
e
c
e1
J1
0.265
(6.7)
TERM. 4
b3
L3
L2
L3
0.265 (6.7)
0.070 (1.8)
0.118 (3.0)
BACK VIEW
0.063 (1.6) TYP
0.090 (2.3) TYP
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
1.5mm
DIA. HOLE
INCHES
MIN
MAX
0.086
0.094
0.018
0.022
0.028
0.032
0.033
0.045
0.205
0.215
0.190
0.018
0.022
0.270
0.295
0.250
0.265
0.090 TYP
0.180 BSC
0.035
0.045
0.040
0.045
0.100
0.115
MILLIMETERS
MIN
MAX
2.19
2.38
0.46
0.55
0.72
0.81
0.84
1.14
5.21
5.46
4.83
0.46
0.55
6.86
7.49
6.35
6.73
2.28 TYP
4.57 BSC
0.89
1.14
1.02
1.14
2.54
2.92
0.020
0.025
0.170
0.51
0.64
4.32
0.040
-
NOTES
4, 5
4, 5
4
4, 5
2
4, 5
7
7
-
1.01
-
4, 6
3
2
NOTES:
1. These dimensions are within allowable dimensions of Rev. B of
JEDEC TO-252AA outline dated 9-88.
2. L3 and b3 dimensions establish a minimum mounting surface for
terminal 4.
3. Solder finish uncontrolled in this area.
4. Dimension (without solder).
5. Add typically 0.002 inches (0.05mm) for solder plating.
6. L1 is the terminal length for soldering.
7. Position of lead to be measured 0.090 inches (2.28mm) from bottom
of dimension D.
8. Controlling dimension: Inch.
9. Revision 11 dated 1-00.
4.0mm
USER DIRECTION OF FEED
2.0mm
TO-252AA
1.75mm
C
L
16mm TAPE AND REEL
16mm
8.0mm
22.4mm
COVER TAPE
13mm
330mm
50mm
GENERAL INFORMATION
1. 2500 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
2-9
16.4mm
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
TO-263AB
SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE
E
A
A1
H1
TERM. 4
D
L2
L1
L
1
3
b
b1
e
0.450
(11.43)
TERM. 4
L3
b2
3
c
J1
e1
0.350
(8.89)
0.700
(17.78)
0.150
(3.81)
1
0.080 TYP (2.03)
0.062 TYP (1.58)
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
1.5mm
DIA. HOLE
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.170
0.180
4.32
4.57
A1
0.048
0.052
1.22
1.32
4, 5
b
0.030
0.034
0.77
0.86
4, 5
b1
0.045
0.055
1.15
1.39
4, 5
b2
0.310
7.88
2
c
0.018
0.022
0.46
0.55
4, 5
D
0.405
0.425
10.29
10.79
E
0.395
0.405
10.04
10.28
e
0.100 TYP
2.54 TYP
7
e1
0.200 BSC
5.08 BSC
7
H1
0.045
0.055
1.15
1.39
J1
0.095
0.105
2.42
2.66
L
0.175
0.195
4.45
4.95
L1
0.090
0.110
2.29
2.79
4, 6
L2
0.050
0.070
1.27
1.77
3
L3
0.315
8.01
2
NOTES:
1. These dimensions are within allowable dimensions of Rev. C of
JEDEC TO-263AB outline dated 2-92.
2. L3 and b2 dimensions established a minimum mounting surface
for terminal 4.
3. Solder finish uncontrolled in this area.
4. Dimension (without solder).
5. Add typically 0.002 inches (0.05mm) for solder plating.
6. L1 is the terminal length for soldering.
7. Position of lead to be measured 0.120 inches (3.05mm) from bottom
of dimension D.
8. Controlling dimension: Inch.
9. Revision 10 dated 5-99.
4.0mm
USER DIRECTION OF FEED
2.0mm
TO-263AB
1.75mm
C
L
24mm TAPE AND REEL
24mm
16mm
COVER TAPE
40mm MIN.
ACCESS HOLE
30.4mm
13mm
330mm
100mm
GENERAL INFORMATION
1. 800 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
2-10
24.4mm
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
TO-220AB
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
A
INCHES
E
ØP
A1
Q
H1
TERM. 4
D
45o
E1
D1
L1
b1
L
b
c
MIN
MAX
MIN
MAX
NOTES
A
0.170
0.180
4.32
4.57
-
A1
0.048
0.052
1.22
1.32
-
b
0.030
0.034
0.77
0.86
3, 4
b1
0.045
0.055
1.15
1.39
2, 3
c
0.014
0.019
0.36
0.48
2, 3, 4
D
0.590
0.610
14.99
15.49
-
4.06
-
10.41
-
D1
-
0.160
E
0.395
0.410
E1
-
0.030
e
60o
1
2
e1
3
e
J1
e1
MILLIMETERS
SYMBOL
H1
0.100 TYP
0.200 BSC
0.235
0.255
10.04
-
0.76
-
2.54 TYP
5
5.08 BSC
5
5.97
6.47
-
J1
0.100
0.110
2.54
2.79
6
L
0.530
0.550
13.47
13.97
-
L1
0.130
0.150
3.31
3.81
2
ØP
0.149
0.153
3.79
3.88
-
Q
0.102
0.112
2.60
2.84
-
NOTES:
1. These dimensions are within allowable dimensions of Rev. J of
JEDEC TO-220AB outline dated 3-24-87.
2. Lead dimension and finish uncontrolled in L1.
3. Lead dimension (without solder).
4. Add typically 0.002 inches (0.05mm) for solder coating.
5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D.
6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D.
7. Controlling dimension: Inch.
8. Revision 2 dated 7-97.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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NORTH AMERICA
Intersil Corporation
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Melbourne, FL 32902
TEL: (321) 724-7000
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2-11
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