HI-390 Data Sheet July 1999 File Number 4754 CMOS Analog Switch Features The Hl-390 switch is a monolithic device fabricated using CMOS technology and the Intersil dielectric isolation process. This device is TTL compatible and features low leakage and supply currents, low and nearly constant ON resistance over the analog signal range, break-before-make switching and low power dissipation. • Analog Signal Range (±15V Supplies) . . . . . . . . . . . ±15V • Low Leakage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40pA • Low On Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 35Ω • Break-Before-Make Delay . . . . . . . . . . . . . . . . . . . . 60ns • Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30pC Ordering Information PART NUMBER HI1-0390-2 -55 to 125 HI3-0390-5 0 to 75 Pinout • TTL Compatible TEMP. RANGE (oC) PACKAGE PKG. NO. 16 Ld CERDIP F16.3 16 Ld PDIP E16.3 • Symmetrical Switch Elements • Low Operating Power . . . . . . . . . . . . . . . . . . . . . . . 1.0mW Applications • Sample and Hold (i.e., Low Leakage Switching) Switch States shown for a Logic “1” Input • Op Amp Gain Switching (i.e., Low On Resistance) DUAL SPDT HI-390 (CERDIP, PDIP) TOP VIEW • Portable, Battery Operated Circuits D1 1 16 S1 • Low Level Switching Circuits NC 2 15 IN1 • Dual or Single Supply Systems D3 3 14 V- S3 4 13 GND S4 5 12 NC D4 6 11 V+ NC 7 10 IN2 D2 8 9 S2 Functional Diagram S IN N P D LOGIC SW1, SW2 SW3, SW4 0 OFF ON 1 ON OFF 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 HI-390 Schematic Diagrams SWITCH CELL A V+ MN1B MN2B MP5B MN3B OUT MP4B IN MN4B MN5B MP3B MP2B MP1B V- A DIGITAL INPUT BUFFER AND LEVEL SHIFTER V+ D2A MP1A MP2A MP3A MP4A MP5A MP6A MP7A MP8A 200Ω A A LOGIC IN D1A MN1A MN2A MN3A MN4A MN5A MN6A MN7A MN8A GND VSWITCH CELL DRIVER (ONE PER SWITCH CELL) 2 HI-390 Absolute Maximum Ratings Thermal Information Voltage Between Supplies (V+ to V-) . . . . . . . . . . . . . . . . . . . . . 44V Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V+) +4V to (V-) -4V Analog Input Voltage . . . . . . . . . . . . . . . . . . (V+) +1.5V to (V-) -1.5V Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . 90 36 PDIP Package . . . . . . . . . . . . . . . . . . . 95 N/A Maximum Junction Temperature Hermetic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Ranges HI-390-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC HI-390-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications Supplies = +15V, -15V; VIN = Logic Input. VIN for Logic “1” = 4V, for Logic “0” = 0.8V, Unless Otherwise Specified -2 -5 TEMP (oC) MIN TYP MAX MIN TYP MAX UNITS Switch ON Time, tON 25 - 210 300 - 210 300 ns Switch OFF Time, tOFF 25 - 160 250 - 160 250 ns Break-Before-Make Delay, tOPEN 25 - 60 - - 60 - ns PARAMETER TEST CONDITIONS DYNAMIC CHARACTERISTICS Charge Injection Voltage, ∆V (Note 7) 25 - 3 - - 3 - mV OFF Isolation (Note 6) 25 - 60 - - 60 - dB Input Switch Capacitance, CS(OFF) 25 - 16 - - 16 - pF Output Switch Capacitance, CD(OFF) 25 - 14 - - 14 - pF Output Switch Capacitance, CD(ON) 25 - 35 - - 35 - pF Digital Input Capacitance, CIN 25 - 5 - - 5 - pF Input Low Level, VINL Full - - 0.8 - - 0.8 V Input High Level, VINH Full 4 - - 4 - - V DIGITAL INPUT CHARACTERISTICS Input Leakage Current (Low), IINL (Note 5) Full - - 1 - - 1 µA Input Leakage Current (High), IINH (Note 5) Full - - 1 - - 1 µA Full -15 - +15 -15 - +15 V 25 - 35 50 - 35 50 Ω Full - 40 75 - 45 75 Ω 25 - 0.04 1 - 0.04 5 nA Full - 1 100 - 0.2 100 nA 25 - 0.04 1 - 0.04 5 nA Full - 1 100 - 0.2 100 nA 25 - 0.03 1 - 0.03 5 nA Full - 0.5 100 - 0.2 100 nA ANALOG SWITCH CHARACTERISTICS Analog Signal Range ON Resistance, rON (Note 2) OFF Input Leakage Current, IS(OFF) OFF Output Leakage Current, ID(OFF) ON Input Leakage Current, IS(ON) 3 (Note 3) (Note 3) (Note 4) HI-390 Electrical Specifications Supplies = +15V, -15V; VIN = Logic Input. VIN for Logic “1” = 4V, for Logic “0” = 0.8V, Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS -2 -5 TEMP (oC) MIN TYP MAX MIN TYP MAX UNITS 25 - 0.09 0.5 - 0.09 0.5 mA Full - - 1 - - 1 mA 25 - 0.01 10 - 0.01 100 µA Full - - 100 - - - µA 25 - 0.01 10 - 0.01 100 µA Full - - 100 - - - µA 25 - 0.01 10 - 0.01 100 µA Full - - 100 - - - µA POWER SUPPLY CHARACTERISTICS Current, I+ (Note 8) Current, I- (Note 8) Current, I+ (Note 9) Current, I- (Note 9) NOTES: 2. VS = ±10V, IOUT = 10mA. On resistance derived from the voltage measured across the switch under these conditions. 3. VS = ±14V, VD = 14V. ± ± 4. VS = VD = ±14V. 5. The digital inputs are diode protected MOS gates and typical leakages of 1nA or less can be expected. 6. VS = 1VRMS , f = 500kHz, CL = 15pF, RL = 1K, CL = CFIXTURE + CPROBE, OFF Isolation = 20 Log VS /VD . 7. VS = 0V, CL = 10nF, Logic Drive = 5V pulse. Switches are symmetrical; S and D may be interchanged. Charge Injection = Q = CL x ∆V. 8. VIN = 4V (one input, all other inputs = 0V). 9. VIN = 0.8V (all inputs). Test Circuits and Waveforms 15V 6 RGEN = 0 VGEN S D RL 10kΩ IN 4 2 0 LOGIC INPUT V- GND VLOGIC CL 10pF LOGIC INPUT (V) V+ 0 -15V 10 (NOTE 10) 5 VGEN = 10V 0 0 0.4 0.8 TIME (µs) 1.2 FIGURE 1C. VANALOG = 10V 4 0.8 TIME (µs) 1.2 1.6 FIGURE 1B. LOGIC INPUT 1.6 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) FIGURE 1A. TEST CIRCUIT 0.4 5 0 VGEN = 5V 0 0.4 0.8 TIME (µs) 1.2 FIGURE 1D. VANALOG = 5V 1.6 HI-390 (Continued) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Test Circuits and Waveforms 5 0 VGEN = 0V -5 0 0.4 0.8 TIME (µs) 1.2 0 -5 0 1.6 FIGURE 1E. VANALOG = 0V OUTPUT VOLTAGE (V) VGEN = -5V 0.4 0.8 TIME (µs) 1.2 1.6 FIGURE 1F. VANALOG = -5V 0 -5 -10 VGEN = -10V 0 0.4 0.8 TIME (µs) 1.2 1.6 FIGURE 1G. VANALOG = -10V NOTE: 10. If RGEN , RL or CL is increased, there will be proportional increases in rise and/or fall RC times. FIGURE 1. SWITCHING WAVEFORMS FOR VARIOUS ANALOG INPUT VOLTAGES Typical Performance Curves 80 80 60 rDS(ON) (Ω) rDS(ON) (Ω) 60 125oC 25oC -55oC 40 20 0 -15 D TA = 25oC V+ = +15V, V- = -15V -10 -5 0 5 DRAIN VOLTAGE (V) FIGURE 2. rDS(ON) vs VD 5 10 15 C B 40 A 20 A B C D 0 -15 V+ = +15V, V- = -15V V+ = +10V, V- = -10V V+ = +7.5V, V- = -7.5V V+ = +5V, V- = -5V -10 -5 0 5 DRAIN VOLTAGE (V) FIGURE 3. rDS(ON) vs VD 10 15 HI-390 Typical Performance Curves (Continued) 100 100 V+ = +15V, V- = -15V CLOAD = 30pF, VS = 1VRMS 80 OFF ISOLATION (dB) POWER DISSIPATION (mW) V+ = +15V, V- = -15V TA = 25oC, VS = 15V, RL = 2K 10 1.0 RL = 100Ω 60 RL = 1kΩ 40 20 0.1 1 10 100 1K 10K 100K 0 105 1M 106 107 108 FREQUENCY (Hz) LOGIC SWITCHING FREQUENCY (50% DUTY CYCLE) (Hz) FIGURE 4. DEVICE POWER DISSIPATION vs SWITCHING FREQUENCY (SINGLE LOGIC INPUT) FIGURE 5. OFF ISOLATION vs FREQUENCY 10.0 10.0 V+ = +15V, V- = -15V | VD | = | VS | = 14V 1.0 1.0 ID(ON) (nA) IS(OFF) OR ID(OFF) (nA) V+ = +15V, V- = -15V 0.1 0.1 0.01 25 0.01 25 75 125 TEMPERATURE (oC) 75 125 TEMPERATURE (oC) FIGURE 6. IS(OFF) OR ID(OFF) vs TEMPERATURE (NOTE 11) NOTE: FIGURE 7. ID(ON) vs TEMPERATURE (NOTE 11) 60 16 50 12 CIN (pF) CD(ON) (pF) 11. The net leakage into the source or drain is the N-Channel leakage minus the P-Channel leakage. This difference can be positive, negative or zero depending on the analog voltage and temperature, and will vary greatly from unit to unit. 40 30 8 TRANSITION (INDETERMINATE DUE TO ACTIVE INPUT) 4 20 0 2 4 6 8 10 DRAIN VOLTAGE (V) 12 14 16 FIGURE 8. OUTPUT ON CAPACITANCE vs DRAIN VOLTAGE 6 0 2 4 6 8 10 INPUT VOLTAGE (V) 12 14 16 FIGURE 9. DIGITAL INPUT CAPACITANCE vs INPUT VOLTAGE HI-390 Typical Performance Curves (Continued) 300 V+ = +15V, V- = -15V VINH = 4.0V, VINL = 0V 300 tON 200 tOFF 200 tON , tOFF (ns) tON , tOFF (ns) tON tOFF 100 V+ = +15V, TA = 25oC VINH = 4V, VINL = 0V 100 0 -55 -35 -15 5 25 45 65 TEMPERATURE (oC) 85 105 125 FIGURE 10. SWITCHING TIME vs TEMPERATURE 0 15 FIGURE 11. SWITCHING TIME vs NEGATIVE SUPPLY VOLTAGE 1.8 7 INPUT SWITCHING THRESHOLD (V) V- = -15V, TA = 25oC VINH = 4.0V, VINL = 0V 1.6 1.4 tON, tOFF (µs) 5 10 NEGATIVE SUPPLY (V) 1.2 1.0 0.8 0.6 tON 0.4 tOFF 0.2 0 0 5 10 15 POSITIVE SUPPLY VOLTAGE (V) FIGURE 12. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE V- = -15V, TA = 25oC 6 5 4 3 2 1 0 0 5 10 15 POSITIVE SUPPLY VOLTAGE (V) FIGURE 13. INPUT SWITCHING THRESHOLD vs POSITIVE SUPPLY VOLTAGE All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. 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