AVAGO HSMP-3833-TR1G Surface mount rf pin diode Datasheet

HSMP-383x
Surface Mount RF PIN Diodes
Data Sheet
Description/Applications
Features
The HSMP-383x series of general purpose PIN diodes
are designed for two classes of applications. The first
is attenuators where current consumption is the most
important design consideration. The second ­application
for this series of diodes is in switches where low
capacitance is the driving issue for the designer.
• Diodes Optimized for:
Low Capacitance Switching
Low Current Attenuator
The HSMP-386x series Total Capacitance (CT ) and Total
Resistance (RT ) are typical specifications. For applications
that require guaranteed performance, the general
purpose HSMP-383x series is recommended.
• Low Failure in Time (FIT) Rate[1]
A SPICE model is not available for PIN diodes as SPICE
does not provide for a key PIN diode ­ characteristic,
carrier lifetime.
Package Lead Code Identification (Top View)
SINGLE
SERIES
#0
#2
COMMON
ANODE
COMMON
CATHODE
#3
#4
• Surface Mount SOT-23 Package
Single and Dual Versions
Tape and Reel Options Available
• Lead-free
Note:
1. For more information see the Surface Mount PIN Reliability Data Sheet.
Absolute Maximum Ratings[1] TC = 25°C
Symbol
Parameter
Units
If
Forward Current (1 ms Pulse)
Pt
Total Device Dissipation
Piv
Absolute Maximum
Amp
1
mW [2]
250
Peak Inverse Voltage
—
Same as VBR
Tj
Junction Temperature
°C
150
TSTG
Storage Temperature
°C
-65 to 150
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to
this device.
2. CW Power Dissipation at TLEAD = 25°C. Derate to zero at maximum rated temperature.
PIN General Purpose Diodes, Electrical Specifications TC = 25°C
Part
Package
Number
Marking
Lead
HSMPCode
Code
Configuration
3830
3832
3833
3834
K0
K2
K3
K4
0
2
3
4
Single
Series
Common Anode
Common Cathode
Test Conditions
Minimum
Breakdown
Voltage
VBR (V)
Maximum
Series
Resistance
RS (Ω)
Maximum
Total
Capacitance
CT (pF)
200
1.5
0.3
VR = VBR
Measure
IR ≤ 10 mA
IF = 100 mA
f = 100 MHz
VR = 50 V
f = 1 MHz
Typical Parameters at TC = 25°C
Part Number
HSMP-
Series Resistance
RS (Ω)
Carrier Lifetime
τ (ns)
Reverse Recovery Time
Trr (ns)
Total Capacitance
CT (pF)
383x
20
500
80
0.20 @ 50 V
IF = 1 mA
f = 100 MHz
IF = 50 mA
IR = 250 mA
VR = 10 V
IF = 20 mA
90% Recovery
Test Conditions
Typical Parameters at TC = 25°C (unless otherwise noted), Single Diode
1
0.1
0.2
25C
0.4
0.30
1 MHz
0.25
100 MHz
0.20
1 GHz
0.8
1.0
0.15
1.2
0
2
6
8
90
80
70
60
50
10
DIODE RF RESISTANCE ()
Figure 4. 2nd Harmonic Input Intercept Point vs.
Diode RF Resistance for Attenuators.
0.1
0.01
10 12 14 16 18 20
105
100
95
90
1
10
1
10
100
Figure 3. RF Resistance at 25C vs. Forward Bias Current.
Diode Mounted as a
Series Attenuator in a
115
50 Ohm Microstrip and
Tested at 123 MHz
110
85
0.1
IF – FORWARD BIAS CURRENT (mA)
120
Diode Mounted as a
110 Series Attenuator
in a 50 Ohm Microstrip
100 and Tested at 123 MHz
INPUT INTERCEPT POINT (dBm)
INPUT INTERCEPT POINT (dBm)
4
Figure 2. RF Capacitance vs. Reverse Bias.
120
1
REVERSE VOLTAGE (V)
Figure 1. Forward Current vs. Forward Voltage.
100
10
–50C
0.6
VF – FORWARD VOLTAGE (mA)
40
1000
100
Trr - REVERSE RECOVERY TIME (nS)
125C
0
RF RESISTANCE (OHMS)
TOTAL CAPACITANCE (pF)
IF – FORWARD CURRENT (mA)
10
0.01
1000
0.35
100
30
IF – FORWARD BIAS CURRENT (mA)
Figure 5. 2nd Harmonic Input Intercept Point vs.
Forward Bias Current for Switches.
1000
HSMP-3830
VR = 5V
VR = 10V
100
10
10
VR = 20V
20
30
FORWARD CURRENT (mA)
Figure 6. Reverse Recovery Time vs. Forward Current
for Various Reverse Voltage.
Typical Applications for Multiple Diode Products
RF COMMON
RF COMMON
RF 2
RF 1
RF 1
RF 2
BIAS 1
BIAS 2
BIAS
BIAS
Figure 8. High Isolation SPDT Switch, Dual Bias.
Figure 7. Simple SPDT Switch, Using Only Positive Current.
RF COMMON
RF COMMON
BIAS
RF 1
RF 2
RF 2
RF 1
BIAS
Figure 9. Switch Using Both Positive and Negative Current.
Figure 10. Very High Isolation SPDT Switch, Dual Bias.
Typical Applications for Multiple Diode Products (continued)
VARIABLE BIAS
RF IN/OUT
INPUT
FIXED
BIAS
VOLTAGE
Figure 11. Four Diode π Attenuator. See AN1048 for details.
BIAS
Figure 12. High Isolation SPST Switch (Repeat Cells as Required).
Package Dimensions
Outline 23 (SOT-23)
Recommended PCB Pad Layout
for Avago’s SOT‑23 Products
0.039
1
e2
0.039
1
e1
XXX
E
0.079
2.0
E1
0.035
0.9
e
L
B
0.031
0.8
C
DIMENSIONS (mm)
D
A
A1
Notes:
XXX-package marking
Drawings are not to scale
SYMBOL
A
A1
B
C
D
E1
e
e1
e2
E
L
MIN.
0.79
0.000
0.30
0.08
2.73
1.15
0.89
1.78
0.45
2.10
0.45
MAX.
1.20
0.100
0.54
0.20
3.13
1.50
1.02
2.04
0.60
2.70
0.69
Package Characteristics
Lead Material..............................................................................................................................Alloy 42
Lead Finish...........................................................................................Tin 100% (Lead-free option)
Maximum Soldering Temperature.............................................................. 260°C for 5 seconds
Minimum Lead Strength............................................................................................. 2 pounds pull
Typical Package Inductance........................................................................................................ 2 nH
Typical Package Capacitance................................................................0.08 pF (opposite leads)
Ordering Information
Specify part number followed by option. For example:
HSMP - 383x - XXX
Bulk or Tape and Reel Option
Part Number
Surface Mount PIN Diode
Profile Option Descriptions
-BLKG = Bulk
-TR1G = 3K pc. Tape and Reel, Device Orientation; See Figure 13
-TR2G = 10K pc. Tape and Reel, Device Orientation; See Figure 13
Tape and Reeling conforms to Electronic Industries RS-481, “Taping of Surface
Mounted Components for Automated Placement.”
Dimensions in inches
mm
Device Orientation For Outlines SOT-23
END VIEW
TOP VIEW
REEL
4 mm
8 mm
CARRIER
TAPE
USER
FEED
DIRECTION
ABC
ABC
ABC
ABC
Note: "AB" represents package marking code.
"C" represents date code.
COVER TAPE
Figure 13. Options -TR1, -TR2 for SOT-23 Packages.
Tape Dimensions and Product Orientation For Outline SOT-23
P
P2
D
E
P0
F
W
D1
t1
Ko
9° MAX
B0
A0
DESCRIPTION
13.5° MAX
8° MAX
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A0
B0
K0
P
D1
3.15 ± 0.10
2.77 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.05
0.124 ± 0.004
0.109 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 ± 0.002
PERFORATION
DIAMETER
PITCH
POSITION
D
P0
E
1.50 + 0.10
4.00 ± 0.10
1.75 ± 0.10
0.059 + 0.004
0.157 ± 0.004
0.069 ± 0.004
CARRIER TAPE
WIDTH
THICKNESS
W
t1
8.00 +0.30 –0.10
0.229 ± 0.013
0.315 +0.012 –0.004
0.009 ± 0.0005
DISTANCE
BETWEEN
CENTERLINE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 ± 0.05
0.138 ± 0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P2
2.00 ± 0.05
0.079 ± 0.002
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved. Obsoletes 5989-4027EN
AV02-1425EN - June 2, 2009
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