318 Series of Encoders Features · · · · Operating voltage: 2.4V~12V Low power and high noise immunity CMOS technology Low standby current Three words transmission · Built-in oscillator needs only 5% resistor Easy interface with an RF or infrared transmission media Minimal external components · · · · Car alarm system Security system Cordless telephones Other remote control systems · · Applications · · · · Burglar alarm system Smoke and fire alarm system Garage door controllers Car door controllers General Description 18 programmable address/data to meet various application needs. The programmable address/data is transmitted together with the header bits via an RF or an infrared transmission medium upon receipt of a trigger signal. The capability to select a TE trigger type or a DATA trigger type further enhances the appli18 cation flexibility of the 3 series of encoders. The 3 encoders are a series of CMOS LSIs for remote control system applications. They are capable of encoding 18 bits of information which consists of N address bits and 18-N data bits. Each address/data input is externally trinary programmable if bonded out. It is otherwise set floating internally. Various packages of 18 the 3 encoders offer flexible combinations of Selection Table Function Address No. Address/ Data No. HT600 9 5 0 HT640 10 8 HT680 8 4 HT6187 9 HT6207 HT6247 Part No. Data Dummy No. Code No. Oscillator Trigger Package 4 RC oscillator TE 20 DIP/20 SOP 0 0 RC oscillator TE 24 SOP/24 SDIP 0 6 RC oscillator TE 18 DIP 0 3 6 RC oscillator D12,D14,D15 18 DIP/20 SOP 10 0 4 4 RC oscillator D12~D15 20 DIP/20 SOP 12 0 6 0 RC oscillator D12~D17 24 SOP/24 SDIP Note: Address/Data represents addressable pins or data according to the decoder requirements. 1 July 8, 1999 318 Series of Encoders Block Diagram TE trigger DATA trigger HT600/HT640/HT680 HT6187/HT6207/HT6247 O S C 2 O S C 2 O S C 1 O s c illa to r ¸ 3 3 D iv id e r D a ta S e le c t & B u ffe r O S C 1 O s c illa to r D O U T ¸ 3 3 D iv id e r D a ta S e le c t & B u ffe r D O U T T E ¸ 1 8 C o u n te r & 1 o f 1 8 D e c o d e r A 0 1 8 T r a n s m is s io n G a te C ir c u it Note: ¸ 1 8 C o u n te r & 1 o f 1 8 D e c o d e r A 0 1 8 T r a n s m is s io n G a te C ir c u it T r in a r y D e te c to r A 9 A D 1 0 S y n c . C ir c u it T r in a r y D e te c to r A 1 1 A D 1 7 V D D D 1 2 V S S D 1 7 S y n c . C ir c u it L E D C ir c u it V D D L E D V S S The address/data pins are available in various combinations. Pin Assignment T E tr ig g e r ty p e 9 -A d d re s s 5 -A d d r e s s /D a ta A D 1 1 1 2 0 V D D A D 1 2 2 1 9 A 9 A D 1 3 A D 1 4 3 1 8 A 8 4 1 7 A 7 A D 1 5 5 1 6 A 6 D O U T T E 6 1 5 7 O S C 2 O S C 1 V S S 1 0 -A d d re s s 8 -A d d r e s s /D a ta 8 -A d d re s s 4 -A d d r e s s /D a ta A D 1 1 1 2 4 V D D A D 1 2 2 2 3 A D 1 0 A D 1 3 A D 1 4 3 2 2 A 9 4 2 1 A 8 A D 1 5 5 2 0 A 7 A D 1 6 A D 1 7 6 1 9 A 6 7 1 8 A 5 8 1 7 A 4 9 1 6 A 3 A D 1 1 A D 1 2 1 1 8 2 1 7 V D D A 9 A D 1 4 A D 1 5 3 1 6 A 8 4 1 5 A 7 D O U T 5 1 4 A 6 1 4 A 4 A 3 T E 6 1 3 A 3 D O U T T E 8 1 3 A 2 7 1 2 A 2 O S C 2 1 0 1 5 A 2 9 1 2 A 1 O S C 2 O S C 1 8 1 1 A 1 O S C 1 1 1 1 4 A 1 1 0 1 1 A 0 V S S 9 1 0 A 0 V S S 1 2 1 3 A 0 H T 6 0 0 2 0 D IP /S O P H T 6 8 0 1 8 D IP /S O P H T 6 4 0 2 4 S O P /S D IP 2 July 8, 1999 318 Series of Encoders D A T A tr ig g e r ty p e 9 -A d d re s s 3 -D a ta 9 -A d d re s s 3 -D a ta 1 2 -A d d re s s 6 -D a ta 1 0 -A d d re s s 4 -D a ta A 1 1 1 2 4 V D D D 1 2 2 2 3 A 1 0 N C 1 2 0 N C A 1 1 1 2 0 V D D D 1 3 3 2 2 A 9 2 1 9 1 9 A 9 2 1 A 8 3 1 8 A 8 D 1 4 D 1 5 4 1 8 D 1 2 D 1 3 2 3 V D D A 9 5 2 0 A 7 D 1 6 D 1 7 6 1 9 A 6 7 1 8 A 5 8 1 7 A 4 9 1 6 A 3 A 1 1 1 1 8 V D D D 1 2 2 1 7 A 9 A 1 1 D 1 2 D 1 4 3 1 6 A 8 D 1 4 4 1 7 A 8 D 1 4 4 1 7 A 7 D 1 5 D O U T 4 1 5 A 7 5 1 6 A 7 1 6 A 6 1 4 A 6 6 1 5 A 6 D 1 5 D O U T 5 5 D 1 5 D O U T 6 1 5 A 4 L E D 6 1 3 A 3 L E D 7 1 4 A 3 L E D 1 4 A 3 O S C 2 7 1 2 A 2 O S C 2 8 1 3 A 2 O S C 2 8 7 D O U T L E D 1 3 A 2 O S C 2 1 0 1 5 A 2 O S C 1 8 1 1 A 1 O S C 1 9 1 2 A 1 O S C 1 9 1 2 A 1 1 1 1 4 A 1 V S S 9 1 0 A 0 V S S 1 0 1 1 A 0 V S S 1 0 1 1 A 0 O S C 1 V S S 1 2 1 3 A 0 H T 6 1 8 7 1 8 D IP H T 6 1 8 7 2 0 S O P H T 6 2 0 7 2 0 D IP /S O P H T 6 2 4 7 2 4 S O P /S D IP Pin Description Pin Name I/O Internal Connection Description A0~A11 I TRANSMISSION Input pins for address A0~A11 setting GATE They can be externally set to VDD, VSS, or left open. AD10~AD17 I TRANSMISSION Input pins for address/data (AD10~AD17) setting GATE They can be externally set to VDD, VSS, or left open. D12~D17 I CMOS IN Pull-low DOUT O CMOS OUT Encoder data serial transmission output LED O NMOS OUT LED transmission enable indicator TE I CMOS IN Pull-low OSC1 I OSCILLATOR Oscillator input pin OSC2 O OSCILLATOR Oscillator output pin VSS I ¾ Negative power supply (GND) VDD I ¾ Positive power supply Input pins for data (D12~D17) setting and transmission enable (active high) They an be externally set to VDD or left open (see Note). Transmission enable, active high (see Note). Notes: D12~D17 are data input and transmission enable pins of the HT6187/HT6207/HT6247. TE is the transmission enable pin of the HT600/HT640/HT680. 3 July 8, 1999 318 Series of Encoders Approximate internal connection circuits T R A N S M IS S IO N G A T E C M O S IN P u ll- lo w C M O S O U T N M O S O U T O S C IL L A T O R E N O S C 1 O S C 2 Absolute Maximum Ratings Supply Voltage...............................-0.3V to 13V Input Voltage ...................VSS-0.3 to VDD+0.3V Storage Temperature.................-50°C to 125°C Operating Temperature ..............-20°C to 75°C Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. Electrical Characteristics Symbol Parameter VDD Operating Voltage ISTB Standby Current IDD Operating Current ILED LED Sink Current IDOUT Output Drive Current Ta=25°C Test Conditions VDD Conditions ¾ ¾ 3V 12V Oscillator stops Min. Typ. Max. Unit 2.4 ¾ 12 V ¾ 0.1 1 mA ¾ 2 4 mA ¾ 250 500 mA 12V No load fOSC=100kHz ¾ 1200 2400 mA 5V VLED=0.5V 1.5 3 ¾ mA 5V VOH=0.9VDD (Source) -0.6 -1.2 ¾ mA 5V VOL=0.1VDD (Sink) 0.6 1.2 ¾ mA 5V 4 July 8, 1999 318 Series of Encoders Symbol Test Conditions Parameter VDD Conditions Min. Typ. Max. Unit VIH ²H² Input Voltage ¾ ¾ 0.8VDD ¾ VDD V VIL ²L² Input Voltage ¾ ¾ 0 ¾ 0.2VDD V fOSC Oscillator Frequency 10V ROSC=330kW ¾ 100 ¾ kHz RTE TE Pull-low Resistance 5V VTE=5V ¾ 1.5 3 MW RDATA D12~D17 Pull-low Resistance 5V VDATA=5V ¾ 1.5 3 MW Functional Description Operation 18 The 3 series of encoders begins a three-word transmission cycle upon receipt of a transmission enable (TE for the HT600/HT640/HT680 or D12~D17 for the HT6187/HT6207/HT6247, active high). This cycle will repeat itself as long as the transmission enable (TE or D12~D17) is held high. Once the transmission enable falls low, the encoder output completes its final cycle and then stops as shown below. T E o r D 1 2 ~ D 1 7 < 1 w o rd E n c o d e r D a ta O u t T r a n s m itte d C o n tin u o u s ly 3 w o rd s 3 w o rd s Transmission timing Information word An information word consists of 4 periods as shown: 1 /6 b it P ilo t p e r io d ( 6 b its ) A d d r e s s c o d e p e r io d S y n c . p e r io d D a ta c o d e p e r io d Composition of information 5 July 8, 1999 318 Series of Encoders Address/data waveform Each programmable address/data pin can be externally set to one of the following three logic states: fo s c ¸ 3 3 "O n e " "Z e ro " "O p e n " A d d r e s s /D a ta B it Address/Data bit waveform The ²Open² state data input is interpreted as logic low by the decoders since the decoder output only have two states. Address/data programming (preset) The status of each address/data pin can be individually preset to logic ²high², ²low², or ²floating². If a transmission enable signal is applied, the encoder scans and transmits the status of the 18 bits of address/data serially in the order A0 to AD17 for the HT600/HT640/HT680 and A0 to D17 for the HT6187/HT6207/HT6247. There are some packaging limitations. The 18-pin DIP HT680, for example, offers four external data bits and eight external address bits. The remaining unpackaged bits or dummy codes are treated as floating for A0~AD17 or as pull-low for D12~D17. During an information transmission these bits are still located in their original position. But if the trigger signal is not applied, the chip only consumes a standby current which is less than 1mA. The address pins are usually preset to transmit data codes with particular security codes by the DIP switches or PCB wiring, while the data is selected using push buttons or electronic switches. The following figure shows an application using the HT680: O S C 1 O S C 2 T r a n s m is s io n m e d iu m D O U T V S S A 0 A 1 A 2 A 3 A 6 A 7 A 8 V D D A 9 T E A D 1 1 A D 1 2 A D 1 4 A D 1 5 V D D 6 July 8, 1999 318 Series of Encoders The transmitted information is as shown: Pilot & Sync. A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 0 Z 0 1 Z Z 1 Z 0 0 AD10 AD11 Z Z AD12 AD13 AD14 AD15 AD16 AD17 ¾ Z Z Z 1 Z Z Z: floating Address/Data sequence 18 The following provides a table of address/data sequence for various models of the 3 series encoders. A correct device should be selected according to the individual address and data requirementss. Part No. Address/Data Bits 0~3 4 5 6~9 10 ¾ 11 12 13 14 15 AD11 AD12 AD13 AD14 AD15 16 17 ¾ ¾ HT600 A0~A3 A4 ¾ A6~A9 HT640 A0~A3 A4 A5 A6~A9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 HT680 A0~A3 ¾ ¾ A6~A9 ¾ HT6187 A0~A3 ¾ ¾ A6~A9 ¾ A11 D12 HT6207 A0~A3 A4 ¾ A6~A9 ¾ A11 D12 HT6247 A0~A3 A4 A5 A6~A9 AD10 A11 D12 AD11 AD12 ¾ AD14 AD15 D14 D15 D13 D14 D15 D13 D14 D15 ¾ ¾ D16 D17 Notes: ²¾² is a dummy code which is left ²open² and not bonded out. ² ² is a dummy code which is set low and not bonded out. Transmission enable For the TE trigger type of encoders, transmission is enabled by applying a high signal to the TE pin. But for the Data trigger type of encoders, it is enabled by applying a high signal to one of the data pins D12~D17. 7 July 8, 1999 318 Series of Encoders Flowchart P o w e r o n S ta n d b y m o d e N o T r a n s m is s io n e n a b le d ? Y e s 3 d a ta w o rd s tr a n s m itte d N o T r a n s m is s io n s till e n a b le d ? Y e s 3 d a ta w o rd s tr a n s m itte d c o n tin u o u s ly Notes: D12~D17 are transmission enables of the HT6187/HT6207/HT6247. TE is the transmission enable of the HT600/HT640/HT680. 8 July 8, 1999 318 Series of Encoders Oscillator frequency vs supply voltage fo s c (S c a le ) R o s c (W ) 3 .0 0 2 .7 5 1 2 0 k 2 .5 0 2 .2 5 1 5 0 k 2 .0 0 1 8 0 k 1 .7 5 1 .5 0 2 2 0 k 1 .2 5 2 7 0 k 3 3 0 k (1 0 0 k H z ) 1 .0 0 3 9 0 k 4 7 0 k 5 6 0 k 6 8 0 k 8 2 0 k 1 M 1 .5 M 2 M 0 .7 5 0 .5 0 0 .2 5 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 2 .5 V D D (V D C ) The recommended oscillator frequency is fOSCD (decoder) @ fOSCE (encoder). 9 July 8, 1999 318 Series of Encoders Application Circuits T r a n s m itte r C ir c u it T r a n s m itte r C ir c u it V D D 1 2 3 4 5 6 7 R o s c 8 9 A D 1 1 V D D A D 1 2 A 9 A D 1 4 A 8 A D 1 5 A 7 D O U T A 6 T E A 3 O S C 2 A 2 O S C 1 A 1 V S S A 0 V D D 1 8 1 1 7 2 1 6 3 1 5 4 1 4 5 1 k W 1 3 6 1 2 7 R o s c 1 1 8 1 0 9 A 1 1 V D D D 1 2 A 9 D 1 4 A 8 D 1 5 A 7 D O U T A 6 L E D A 3 O S C 2 A 2 O S C 1 A 1 V S S A 0 H T 6 8 0 H T 6 1 8 7 T r a n s m itte r C ir c u it T r a n s m itte r C ir c u it 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 V D D V D D 1 2 3 4 5 6 7 8 R o s c 9 1 0 A D 1 1 V D D A D 1 2 A 9 A D 1 3 A 8 A D 1 4 A 7 A D 1 5 A 6 D O U T A 4 T E A 3 O S C 2 A 2 O S C 1 A 1 V S S A 0 2 0 1 1 9 2 1 8 3 1 7 4 1 6 5 6 1 5 1 k W 1 4 7 1 3 8 1 2 R o s c 9 1 1 1 0 A 1 1 V D D D 1 2 A 9 D 1 3 A 8 D 1 4 A 7 D 1 5 A 6 D O U T A 4 L E D A 3 O S C 2 A 2 O S C 1 A 1 V S S A 0 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 H T 6 2 0 7 H T 6 0 0 10 July 8, 1999 318 Series of Encoders T r a n s m itte r C ir c u it T r a n s m itte r C ir c u it V D D 1 A D 1 1 2 3 4 5 6 7 8 9 1 0 R o s c 1 1 1 2 V D D A D 1 2 A 1 0 A D 1 3 A 9 A D 1 4 A 8 A D 1 5 A 7 A D 1 6 A 6 A D 1 7 A 5 D O U T A 4 T E A 3 O S C 2 A 2 O S C 1 A 1 V S S A 0 V D D 2 4 1 2 3 2 2 2 3 2 1 4 2 0 5 1 9 6 1 8 7 1 7 8 1 k W 1 6 1 5 9 1 0 R o s c 1 4 1 3 1 1 1 2 H T 6 4 0 A 1 1 V D D D 1 2 A 1 0 D 1 3 A 9 D 1 4 A 8 D 1 5 A 7 D 1 6 A 6 D 1 7 A 5 D O U T A 4 L E D A 3 O S C 2 A 2 O S C 1 A 1 V S S A 0 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 H T 6 2 4 7 Notes: Typical infrared diode: EL-1L2 (KODENSHI CORP.) Typical RF transmitter: JR-220 (JUWA CORP.) TX-99 (MING MICROSYSTEM, U.S.A.) 11 July 8, 1999 318 Series of Encoders Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Taipei Office) 5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C. Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Microelectronics Enterprises Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Copyright ã 1999 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. 12 July 8, 1999