SUTEX HV209FG-G 12-channel high voltage analog switch Datasheet

Supertex inc.
HV209
12-Channel
High Voltage Analog Switch
Features
General Description
►► HVCMOS® technology for high performance
►► Operating voltage of up to 200V
►► Output on-resistance typically 22Ω
►► Integrated bleed resistors on the outputs
►► 5.0V to 12.0V CMOS logic compatibility
►► Very low quiescent current consumption (-10µA)
►► -58dB typical off isolation at 5.0MHz
►► Low parasitic capacitance
►► Excellent noise immunity
►► Flexible high voltage supplies
Block Diagram
The Supertex HV209 is a 200V low charge injection 12-channel
high voltage analog switch configured as 6 SPDT analog switches
intended for medical ultrasound applications.
Bleed resistors are integrated on the output switches to eliminate
charge built up on the piezo electric transducers.The bleed resistors
are at a nominal value of 35kΩ. Using HVCMOS technology, this
device combines high voltage bilateral DMOS switches and low
power CMOS logic to provide efficient control of high voltage
analog signals. The outputs are configured as single-pole doublethrow analog switches. Data is shifted into a 6-bit shift register
using an external clock. The LE latches the shift register data into
the individual switch latches. A logic HI connects a switch common
YX to SWX. A logic LOW connects YX to SWX. A logic HI in CL resets
all switches to SWX simultaneously.
VPP VNN
D
LE
CL
High Voltage
Level
Translator
SW0
Y0
SW0
SW1
D
LE
CL
High Voltage
Level
Translator
Y1
SW1
VDD
SW2
D
LE
CL
CLK
DIN
6 BIT
SHIFT
REGISTER
High Voltage
Level
Translator
Y2
SW2
SW3
DOUT
D
LE
CL
GND
High Voltage
Level
Translator
Y3
SW3
SW4
D
LE
CL
High Voltage
Level
Translator
Y4
SW4
SW5
D
LE
CL
LE CL
Doc.# DSFP-HV209
B070213
High Voltage
Level
Translator
Y5
SW5
RGND1/RGND2
Supertex inc.
www.supertex.com
HV209
Pin Configuration
Ordering Information
Part Number
Package Option
HV209FG-G
HV209FG-G M931
Packing
1
250/Tray
48-Lead LQFP
48
1000/Reel
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter
Value
VDD Logic power supply voltage
-0.5V to +15V
VPP - VNN Supply voltage
VPP Positive high voltage supply
-0.5V to +200V
VNN Negative high voltage supply
+0.5V to -200V
Logic input voltages
48-Lead LQFP
(top view)
+220V
Product Marking
Top Marking
-0.5V to VDD +0.3V
VSIG Analog signal range
Peak analog signal current/channel
Storage temperature
YYWW
VNN to VPP
HV209FG
LLLLLLLLL
3.0A
Bottom Marking
-65°C to +150°C
Power dissipation: 48-lead LQFP
CCCCCCCC
AAA
1.0W
Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect
device reliability. All voltages are referenced to device ground.
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
48-Lead LQFP
Typical Thermal Resistance
Package
θja
48-Lead LQFP
52OC/W
Recommended Operating Conditions
Sym
Parameter
Value
VPP
Positive high voltage supply1
VNN
Negative high voltage supply
VDD
Logic power supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
VSIG
Analog signal voltage peak-to-peak
TA
+40V to VNN +200V
-10V to -160V
1
+4.5V to +13.2V
1
0.8VDD to VDD
0V to 0.2VDD
VNN +10V to VPP -10V
2
Operating free air-temperature
0°C to 70°C
Notes:
1. Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last.
2. VSIG must be within VPP and VNN voltage range or floating during power up/down transition.
Doc.# DSFP-HV209
B070213
2
Supertex inc.
www.supertex.com
HV209
DC Electrical Characteristics
(over recommended operating conditions unless otherwise noted)
Sym
Parameter
0OC
+25OC
+70OC
Units Conditions
min
max
min
typ
max
min
max
-
30
-
26
38
-
48
ISIG = 5.0mA
-
25
-
22
27
-
32
ISIG = 200mA
-
25
-
22
27
-
30
-
18
-
18
24
-
27
-
23
-
20
25
30
ISIG = 5.0mA
-
22
-
16
25
27
ISIG = 200mA
Small signal switch
on-resistance matching
-
20
-
5.0
20
-
20
%
RONL
Large signal switch
on-resistance
ISW = 5.0mA, VPP = 100V,
VNN = -100V
-
-
-
15
-
-
-
Ω
VSIG = VPP -10V, ISIG = 1.0A
RINT
Output switch shunt
resistance
-
-
20
35
50
-
-
KΩ
Output switch to RGND
IRINT = 0.5mA
DC offset switch off
-
50
-
-
50
-
50
mV
No load, RGND = 0V
DC offset switch on
-
50
-
-
50
-
50
mV
No load, RGND = 0V
IPPQ
Pos. HV supply current
-
-
-
10
50
-
-
INNQ
Neg. HV supply current
-
-
-
-10
-50
-
-
µA
All SWs off
IPPQ
Pos. HV supply current
-
-
-
10
50
-
-
INNQ
Neg. HV supply current
-
-
-
-10
-50
-
-
µA
All SWs on, ISW = 5.0mA
ISW
Switch output peak
current
-
3.0
-
3.0
2.0
-
2.0
A
VSIG duty cycle ≤ 0.1%
fSW
Output switch frequency
-
-
-
-
50
-
-
6.5
-
-
7.0
-
8.0
-
4.0
-
-
5.0
-
5.5
-
4.0
-
-
5.0
-
5.5
-
6.5
-
-
7.0
-
8.0
-
4.0
-
-
5.0
-
5.5
-
4.0
-
-
5.0
-
5.5
RONS
ΔRONS
VOS
IPP
INN
Small signal switch
on-resistance
IPP supply current
INN supply current
Ω
KHz
ISIG = 5.0mA
ISIG = 200mA
VPP = 40V
VNN = -160V
VPP = 100V
VNN = -100V
VPP = 190V
VNN = -10V
Duty cycle = 50%
VPP = 40V
VNN = -160V
mA
50KHz
output
switching
frequency
with no load
VPP = 100V
VNN = -100V
VPP = 190V
VNN = -10V
VPP = 40V,
VNN = -160V
mA
50KHz
output
switching
frequency
with no load
VPP = 100V
VNN = -100V
VPP = 190V
VNN = -10V
IDD
Logic supply average
current
-
4.0
-
-
4.0
-
4.0
mA
fCLK = 5.0MHz, VDD = 5.0V
IDDQ
Logic supply quiescent
current
-
10
-
-
10
-
10
µA
---
ISOR
Data out source current
0.45
-
0.45 0.70
-
0.40
-
mA
VOUT = VDD -0.7V
ISINK
Data out sink current
0.45
-
0.45 0.70
-
0.40
-
mA
VOUT = 0.7V
CIN
Logic input capacitance
-
10
10
-
10
pF
---
Doc.# DSFP-HV209
B070213
-
-
3
Supertex inc.
www.supertex.com
HV209
AC Electrical Characteristics
(over recommended operating conditions VDD = 5.0V unless otherwise noted)
Sym
Parameter
0OC
+25OC
+70OC
min
max
min
typ
max
min
max
Units Conditions
tSD
Set up time before LE
rises
150
-
150
-
-
150
-
ns
---
tWLE
Time width of LE
150
-
150
-
-
150
-
ns
---
tDO
Clock delay time to data
out
-
150
-
-
150
-
150
ns
---
tWCL
Time width of CL
150
-
150
-
-
150
-
ns
---
tSU
Set up time data to clock
15
15
8.0
-
20
-
ns
---
tH
Hold time data from clock
35
-
35
-
-
35
-
ns
---
fCLK
Clock frequency
-
5.0
-
-
5.0
-
5.0
MHz
tON
Turn on time
-
5.0
-
-
5.0
-
5.0
µs
VSIG = VPP -10V, RL = 10kΩ
tOFF
Turn off time
-
5.0
-
-
5.0
-
5.0
µs
VSIG = VPP -10V, RL = 10kΩ
-
20
-
-
20
-
20
-
20
-
-
20
-
20
-
20
-
-
20
-
20
-30
-
-30
-33
-
-30
-
dB
f = 5.0MHz, 1.0kΩ//15pF load
-58
-
-58
-
-
-58
-
dB
f = 5.0MHz, 50Ω load
-60
-
-60
-70
-
-60
-
dB
f = 5.0MHz, 50Ω load
-
300
-
-
300
-
300
mA
300ns pulse width,
2.0% duty cycle
dv/dt
Maximum VSIG slew rate
KO
Off Isolation
KCR
Switch crosstalk
IID
Output switch isolation
diode current
50% duty cycle, fDATA = fCLK/2
VPP = 40V, VNN = -160V
V/ns
VPP = 100V, VNN = -100V
VPP = 190V, VNN = -10V
CGS(OFF)
Off capacitance switch to
GND
5.0
17
5.0
12
17
5.0
17
pF
0V, 1.0MHz
CGS(ON)
On capacitance switch to
GND
25
50
25
38
50
25
50
pF
0V, 1.0MHz
-
150
-
-
150
-
150
-
150
-
-
150
-
150
+VSPK
-VSPK
Output voltage spike
Doc.# DSFP-HV209
B070213
4
mV
RLOAD = 50Ω
RLOAD = 50Ω
Supertex inc.
www.supertex.com
HV209
Test Circuits
VPP -10V
RLOAD
VOUT
VOUT
VIN =10VP-P
@5MHz
10kΩ
VOUT
RLOAD
VPP
VPP
VDD
VNN
VNN
GND
5V
VPP
VPP
VDD
VNN
VNN
GND
5V
VPP
VPP
VDD
VNN
VNN
GND
KO = 20Log
TON/TOFF Test Circuit
DC Offset ON/OFF
+VSPK
–VSPK
IID
VNN
VOUT
VIN
OFF Isolation
VIN =10VP-P
@5MHz
VSIG
5V
NC
50Ω
50Ω
RLOAD
VOUT
50Ω
1kΩ
VPP
VPP
VDD
VNN
VNN
GND
5V
VPP
VPP
VDD
VNN
VNN
GND
KCR = 20Log
Isolation Diode Current
Doc.# DSFP-HV209
B070213
VPP
VPP
VDD
VNN
VNN
GND
5V
VOUT
VIN
Crosstalk
5
5V
Output Voltage Spike
Supertex inc.
www.supertex.com
HV209
Logic Timing Waveforms
DN
DN+1
DATA
IN
50%
LE
50%
DN-1
50%
50%
tWLE
tSD
50%
CLOCK
50%
tSU
tH
tDO
DATA
OUT
50%
tON
tOFF
VOUT
(typ)
OFF
90%
10%
ON
50%
CLR
50%
tWCL
Logic Truth Table
Data Inputs
Switch States
LE
CL
L
L
L
SW0
H
L
L
SW0
L
L
L
SW1
H
L
L
SW1
L
L
L
SW2
H
L
L
SW2
L
L
L
SW3
H
L
L
SW3
L
L
L
SW4
H
L
L
SW4
L
L
L
SW5
H
L
L
SW5
D0
D1
D2
D3
D4
D5
X
X
X
X
X
X
H
L
X
X
X
X
X
X
X
H
Doc.# DSFP-HV209
B070213
6
Y0
Y1
Y2
Y3
Y4
Y5
Hold Previous State
SW0
SW1
SW2
SW3
SW4
SW5
Supertex inc.
www.supertex.com
HV209
Pin Description
Doc.# DSFP-HV209
B070213
Pin #
Function
Pin #
Function
1
N/C
25
SW5
2
SW0
26
Y5
3
Y0
27
SW5
4
SW0
28
N/C
5
N/C
29
SW3
6
SW2
30
Y3
7
Y2
31
SW3
8
SW2
32
N/C
9
N/C
33
SW1
10
SW4
34
Y1
11
Y4
35
SW1
12
SW4
36
N/C
13
N/C
37
RGND1
14
N/C
38
N/C
15
N/C
39
DOUT
16
VNN
40
VDD
17
N/C
41
DIN
18
N/C
42
CLR
19
N/C
43
LE
20
N/C
44
CLK
21
VPP
45
GND
22
N/C
46
N/C
23
N/C
47
N/C
24
N/C
48
RGND2
7
Supertex inc.
www.supertex.com
HV209
48-Lead LQFP Package Outline (FG)
7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch
D
D1
E1 E
Note 1
(Index Area
D1/4 x E1/4)
48
1
e
b
Top View
View B
A A2
L2
Seating
Plane
L
L1
A1
Gauge
Plane
Seating
Plane
θ
View B
Side View
Note:
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.
Symbol
A
A1
A2
b
D
D1
E
E1
MIN
Dimension
NOM
(mm)
MAX
1.40*
0.05
1.35
0.17
8.80*
6.80*
8.80*
6.80*
-
-
1.40
0.22
9.00
7.00
9.00
7.00
1.60
0.15
1.45
0.27
9.20*
7.20*
9.20*
7.20*
e
L
0.50
BSC
0.45
0.60
0.75
L1
L2
1.00
REF
0.25
BSC
θ
0O
3.5O
7O
JEDEC Registration MS-026, Variation BBC, Issue D, Jan. 2001.
* This dimension is not specified in the JEDEC drawing.
Drawings are not to scale.
Supertex Doc. #: DSPD-48LQFPFG Version, D041309.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
Supertex inc.
©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.
Doc.# DSFP-HV209
B070213
8
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
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