HV9921/HV9922/HV9923 Initial Release 3-Pin Switch-Mode LED Lamp Driver ICs Features General Description Constant Output Current: o HV9921 – 20mA o HV9922 – 50mA o HV9923 – 30mA Universal 85-264VAC Operation Fixed OFF-Time Buck Converter Internal 500V Power MOSFET The HV9921/22/23 are pulse width modulated (PWM) high-efficiency LED driver control ICs. They allow efficient operation of LED strings from voltage sources ranging up to 400VDC. The HV9921/22/23 include an internal high voltage switching MOSFET controlled with fixed off-time TOFF of approximately 10µs. The LED string is driven at constant current, thus providing constant light output and enhanced reliability. The output current is internally fixed at 20mA for HV9921, 50mA for HV9922, and 30mA for the HV9923. The peak current control scheme provides good regulation of the output current throughout the universal AC line voltage range of 85 to 264VAC or DC input voltage of 20 to 400V. Applications Decorative Lighting Low Power Lighting Fixtures Typical Application Circuit HV9921/22/23 NR092005 1 HV9921/HV9922/HV9923 Absolute Maximum Ratings Ordering Information Supply Voltage, VDD -0.3 to +10V Package Options DEVICE +5mA Supply Current, IDD TO-92 SOT-89 Operating Ambient Temperature Range -40°C to +85°C HV9921 HV9921N3-G HV9921N8-G Operating Junction Temperature Range -40° to +125°C HV9922 HV9922N3-G HV9922N8-G Storage Temperature Range -65° to +150°C HV9923 HV9923N3-G HV9923N8-G Power Dissipation @ 25°C, TO-92 Power Dissipation @ 25°C, SOT-89 -G indicates package is RoHS compliant (‘Green’) 740mW 1600mW† † Mounted on FR4 board, 25mm x 25mm x 1.57mm. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (The * denotes the specifications which apply over the full operating junction temperature range of -40°C < TA < +85°C, otherwise the specifications are at TA=25°C, VDRAIN=50V, unless otherwise noted) Regulator (VDD) Symbol VDD Parameter VDD Regulator Output Min 7.1 Typ 7.5 Max 7.8 Units V VDRAIN VDRAIN Supply Voltage 20 V VUVLO VDD Undervoltage Threshold 5.0 V Conditions ∆VUVLO VDD Undervoltage Lockout Hysteresis 200 IDD Operating Supply Current 200 350 µA Typ Max Units V 210 Ω IDRAIN = 20mA (HV9921) IDRAIN = 50mA (HV9922) IDRAIN = 30mA (HV9923) 5 pF VDRAIN = 400V mV VDD(EXT) = 8.5V, VDRAIN = 40V Output (DRAIN) Symbol VBR RON CDRAIN ISAT Parameter Breakdown Voltage Min 500 ON Resistance – HV9921,22, 23 Output Capacitance MOSFET Saturation Current 1 100 150 Conditions mA Current Sense Comparator Symbol ITH ITH ITH Parameter Threshold Current – HV9921 Threshold Current – HV9922 Threshold Current – HV9923 Min 20.5 52 30.8 Typ Max 25.5 63 38.2 Units mA * mA * mA * TBLANK Leading Edge Blanking Delay 200 300 400 ns TON(MIN) Minimum ON Time 650 ns Max 13 Units µs Conditions * OFF-Time Generator Symbol TOFF Parameter OFF Time Min 8 Typ 10.5 2 Conditions NR092005 HV9921/HV9922/HV9923 Functional Block Diagram GND DRAIN VDD TOFF = 10µs Regulator 7.0V REF S Q R Q + R TBLANK = 300ns HV9921/22/23 Pin Configuration 1-Drain 2-GND 3-VDD 1 2 3 TO-243AA (SOT-89) 123 TO-92 Drain – This is a drain terminal of the output switching MOSFET and a linear regulator input. GND – This is a common connection for all circuits. VDD – This is a power supply pin for all control circuits. Bypass this pin with a 0.1uF low impedance capacitor. 3 NR092005 HV9921/HV9922/HV9923 Typical Performance Characteristics (T J = 25°C unless otherwise noted) 200 1.1 Normalized Threshold Current 180 ON Resistance, Ohm 1.05 1 0.95 0.9 0.85 160 140 120 100 80 60 40 20 0.8 -40 -15 10 35 60 85 0 -40 110 Junction Temperature, °C -15 10 35 60 85 110 Junction Tem perature, °C 12 1000 DRAIN Capacitance (pF) OFF Time, uS 10 8 6 4 2 0 -40 100 10 1 -15 10 35 60 85 110 0 10 20 30 40 30 40 DRAIN Voltage (V) 580 180 570 160 560 140 DRAIN Current, mA DRAIN Breakdown Voltage, V Junction Tem perature, °C 550 540 530 520 510 TJ = 25°C TJ = 125°C 120 100 80 60 40 500 20 490 -40 -15 10 35 60 85 0 110 0 Junction Tem perature, °C 10 20 DRAIN Voltage, V 4 NR092005 HV9921/HV9922/HV9923 Functional Description where ITH is the current sense comparator threshold. The ripple current introduces a peak-to-average error in the output current setting that needs to be accounted for. Due to the constant off-time control technique used in the HV9921/22/23, the ripple current is independent of the input AC or DC line voltage variation. Therefore, the output current will remain unaffected by the varying input voltage. The HV9921/22/23 are PWM peak current controllers for controlling a buck converter topology in continuous conduction mode (CCM). The output current is internally preset at 20mA (HV9921), 50mA (HV9922), or 30mA (HV9923). When the input voltage of 20 to 400V appears at the DRAIN pin, the internal high-voltage linear regulator seeks to maintain a voltage of 7VDC at the VDD pin. Until this voltage exceeds the internally programmed under-voltage threshold, the output switching MOSFET is non-conductive. When the threshold is exceeded, the MOSFET turns on. The input current begins to flow into the DRAIN pin. Hysteresis is provided in the under-voltage comparator to prevent oscillation. Adding a filter capacitor across the LED string can reduce the output current ripple even further, thus permitting a reduced value of L1. However, one must keep in mind that the peak-to-average current error is affected by the variation of TOFF. Therefore, the initial output current accuracy might be sacrificed at large ripple current in L1. Another important aspect of designing an LED driver with the HV9921/22/23 is related to certain parasitic elements of the circuit, including distributed coil capacitance of L1, junction capacitance and reverse recovery of the rectifier diode D1, capacitance of the printed circuit board traces CPCB and output capacitance CDRAIN of the controller itself. These parasitic elements affect the efficiency of the switching converter and could potentially cause false triggering of the current sense comparator if not properly managed. Minimizing these parasitics is essential for efficient and reliable operation of the HV9921/22/23. When the input current exceeds the internal preset level, a current sense comparator resets an RS flip-flop, and the MOSFET turns off. At the same time, a one-shot circuit is activated that determines the duration of the off-state (10.5µS typ.). As soon as this time is over, the flip-flop sets again. The new switching cycle begins. A “blanking” delay of 300nS is provided that prevents false triggering of the current sense comparator due to the leading edge spike caused by circuit parasitics. Coil capacitance of inductors is typically provided in the manufacturer’s data books either directly or in terms of the self-resonant frequency (SRF). Application Information SRF = 1 /( 2π L ⋅ CL ) The HV9921/22/23 is a low-cost off-line buck converter IC specifically designed for driving multi-LED strings. It can be operated from either universal AC line range of 85 to 264VAC, or 20 to 400VDC, and drives up to tens of high brightness LEDs. All LEDs can be run in series, and the HV9921/22/23 regulates at constant current, yielding uniform illumination. The HV9921/22/23 is compatible with triac dimmers. The output current is internally fixed at 20mA for the HV9921, 50mA for the HV9922, and 30mA for HV9923. These parts are available in space saving TO-92 and SOT-89 packages. where L is the inductance value, and CL is the coil capacitance.) Charging and discharging this capacitance every switching cycle causes high-current spikes in the LED string. Therefore, connecting a small capacitor CO (~10nF) is recommended to bypass these spikes. Using an ultra-fast rectifier diode for D1 is recommended to achieve high efficiency and reduce the risk of false triggering of the current sense comparator. Using diodes with shorter reverse recovery time trr and lower junction capacitance CJ achieves better performance. The reverse voltage rating VR of the diode must be greater than the maximum input voltage of the LED lamp. Selecting L1 and D1 There is a certain trade-off to be considered between optimal sizing of the output inductor L1 and the tolerated output current ripple. The required value of L1 is inversely proportional to the ripple current ∆IO in it. V ⋅T L1 = O OFF ∆ IO The total parasitic capacitance present at the DRAIN pin of the HV9921/22/23 can be calculated as: (1) CP = CDRAIN + CPCB + CL + C J When the switching MOSFET turns on, the capacitance CP is discharged into the DRAIN pin of the IC. The discharge current is limited to about 150mA typically. However, it may become lower at increased junction temperature. The duration of the leading edge current spike can be estimated VO is the forward voltage of the LED string. TOFF is the offtime of the HV9921/22/23. The output current in the LED string (IO) is calculated then as: I O = ITH − 1 ⋅ ∆ IO 2 (3) (2) 5 NR092005 HV9921/HV9922/HV9923 as: TSPIKE V ⋅C = IN P + trr I SAT IDD is the internal linear regulator current. When the LED driver is powered from the full-wave rectified AC line input, the exact equation for calculating the conduction loss is more cumbersome. However, it can be estimated using the following equation: (4) PCOND = K C ⋅ I O 2 ⋅ RON + K d ⋅ I DD ⋅ VAC In order to avoid false triggering of the current sense comparator, CP must be minimized in accordance with the following expression: CP < I SAT ⋅ (TBLANK ( MIN ) − trr ) (10) where VAC is the input AC line voltage. The coefficients KC and Kd can be determined from the minimum duty ratio of the HV9921/22/23 (5) VIN ( MAX ) 0.7 where TBLANK(MIN) is the minimum blanking time of 200ns, and VIN(MAX) is the maximum instantaneous input voltage. 0.6 Estimating Power Loss 0.5 Discharging the parasitic capacitance CP into the DRAIN pin of the HV9921/22/23 is responsible for the bulk of the switching power loss. It can be estimated using the following equation: ⎛ V 2C ⎞ PSWITCH = ⎜ IN P + VIN I SAT ⋅ trr ⎟ ⋅ FS ⎝ 2 ⎠ Kd (Dm) Kc (Dm) 0.3 (6) 0.2 where Fs is the switching frequency, ISAT is the saturated DRAIN current of the HV9921/22/23. The switching loss is the greatest at the maximum input voltage. 0.1 −1 VIN − η ⋅ VO VIN ⋅ TOFF (7) ( ) 0.4 0.5 0.6 0.7 Design Example 1 Let us design an HV9921 LED lamp driver meeting the following specifications: The switching power loss associated with turn-off transitions of the DRAIN pin can be disregarded. Due to the large amount of parasitic capacitance connected to this switching node, the turn-off transition occurs essentially at zero-voltage. Input: Universal AC, 85-264VAC Output Current: 20mA Load: String of 10 LED (LW541C by OSRAM VF = 4.1V max. each) Conduction power loss in the HV9921/22/23 can be calculated as: PCOND = D ⋅ I O ⋅ RON + I DD ⋅ VIN ⋅ (1 − D ) 0.3 As with all off-line converters, selecting an input filter is critical to obtaining good EMI. A switching side capacitor, albeit of small value, is necessary in order to ensure low impedance to the high frequency switching currents of the converter. As a rule of thumb, this capacitor should be approximately 0.10.2 µF/W of LED output power. A recommended input filter is shown in Figure 2 for the following design example. VAC is the input AC line voltage. 2 0.2 EMI Filter When the HV9921/22/23 LED driver is powered from the full-wave rectified AC input, the switching power loss can be estimated as: (8) 1 (VAC ⋅ CP + 2 ⋅ I SAT ⋅ trr ) VAC − η −1 ⋅ VO 2 ⋅ TOFF 0.1 Fig. 1. Conduction Loss Coefficients KC and Kd where η is the efficiency of the power converter. PSWITCH ≈ 0 Dm The switching frequency is given by the following: FS = 0.4 Step 1. Calculating L1. (9) The output voltage VO = 10 ⋅ VF ≈ 41V (max.). Use equation (1) assuming a 30% peak-to-peak ripple. L1 = where D = VO /ηVIN is the duty ratio, RON is the ON resistance, 6 41V ⋅ 10.5 µ s = 72mH 0.3 ⋅ 20mA NR092005 HV9921/HV9922/HV9923 Let us assume that the overall efficiency η = 0.7. Switching power loss: 1 41V ⎞ PSWITCH ≈ (264V ⋅ 31pF + 2 ⋅ 100mA ⋅ 20ns )⎛⎜ 264V − ⎟ 2 ⋅ 10.5 µ s 07 . ⎠ ⎝ Select L1 68mH, I=30mA. Typical SRF=170KHz. Calculate the coil capacitance. CL = 1 1 = ≈ 13 pF 2 L1 ⋅ ( 2π ⋅ SRF ) 68mH ⋅ ( 2π ⋅ 170KHz )2 PSWITCH ≈ 120mW Minimum duty ratio: Step 2. Selecting D1 Dm = 41V /( 07 . ⋅ 264V ⋅ 2 ) ≈ 0.16 Usually, the reverse recovery characteristics of ultrafast rectifiers at IF=20~50mA are not provided in the manufacturer’s data books. The designer may want to experiment with different diodes to achieve the best result. Conduction power loss: PCOND = 0.25 ⋅ (20mA ) ⋅ 210Ω + 0.63 ⋅ 200 µ A ⋅ 264V ≈ 55mW 2 Select D1 MUR160 with VR = 600V, trr ≈ 20ns (IF=20mA, IRR=100mA) and CJ ≈ 8pF (VF>50V). Step 3. Calculating total parasitic capacitance using (3) Total power dissipation in HV9921: CP = 5 pF + 5 pF + 13 pF + 8 pF = 31pF PTOTAL = 120mW + 55mW = 175mW Step 6. Selecting input capacitor CIN Step 4. Calculating the leading edge spike duration using (4), (5) TSPIKE = Output Power = 41V ⋅ 20mA = 820mW 264V ⋅ 2 ⋅ 31pF + 20ns ≈ 136ns < TBLANK ( MIN ) Select CIN ECQ-E4104KF by Panasonic (0.1µF, 400V, 100mA Metalized Polyester Film). Step 5. Estimating power dissipation in HV9921 at 264VAC using (8) and (10) Figure 2. Universal 85-264VAC LED Lamp Driver D2 LIN D3 CIN CIN2 D4 LED1 -LED12 CO D5 D1 U1 AC Line 85-264V L1 VRD1 HV9921/22/23 F1 3 CDD VDD DRAIN 1 GND 2 7 NR092005 HV9921/HV9922/HV9923 Efficiency (%) Figure 3. Typical Efficiency Figure 4. Switch-Off Transition. Ch1: VDRAIN, Ch3: IDRAIN 82.00 80.00 78.00 76.00 74.00 72.00 70.00 68.00 66.00 64.00 62.00 ZERO VOLTAGE TRANSITION 75 100 125 150 175 200 225 250 275 Input AC Line Voltage (VAC) Figure 5. Typical Efficiency Figure 6. Switch-Off Transition. Ch1: VDRAIN, Ch3: IDRAIN LEADING EDGE SPIKE SWITCH OFF 25mA 8 NR092005 HV9921/HV9922/HV9923 Thermal Considerations vs. Radiated EMI The copper area where GND pin is connected acts not only as a single point ground, but also as a heat sink. This area should be maximized for good heat sinking, especially when HV9921N8, HV9922N8, and HV9923N8 (SOT-89 package) are used. The same applies to the cathode of the freewheeling diode D1. Both nodes are quiet and therefore, will not cause radiated RF emission. The switching node copper area connected to the DRAIN pin of the HV9921/22/23, the anode of D1 and the inductor L1 needs to be minimized. A large switching node area can increase high frequency radiated EMI. HV9921/22/23 Layout Considerations See Figure 7 for a recommended circuit board layout for the HV9921/22/23. Single Point Grounding Use a single point ground connection from the input filter capacitor to the area of copper connected to the GND pin. Bypass Capacitor (CDD) The VDD pin bypass capacitor CDD should be located as near as possible to the VDD and GND pins. Input Filter Layout Considerations Switching Loop Areas The area of the switching loop connecting the input filter capacitor CIN, the diode D1 and the HV9921/22/23 together should be kept as small as possible. The input circuits of the EMI filter must not be placed in the direct proximity to the inductor L1 in order to avoid magnetic coupling of its leakage fields. This consideration is especially important when unshielded construction of L1 is used. When an axial input EMI filter inductor LIN is selected, it must be positioned orthogonal with respect to L1. The loop area formed by CIN2, LIN and CIN should be minimized. The input lead wires must be twisted together. The switching loop area connecting the output filter capacitor CO, the inductor L1 and the diode D1 together should be kept as small as possible. Figure 7. Recommended circuit board layout with the HV9921N3/HV9922N3/HV9923N3 COMPONENT SIDE VIEW VRD1 CO LIN LED + D1 F1 LED - CIN CIN2 AC Line 85-264VAC L1 D2-5 CDD 9 U1 NR092005 HV9921/HV9922/HV9923 3 Lead TO-92 Plastic Package (N3) 0.190 ± 0.020 (4.826 ± 0.508) D 0.190 ± 0.020 (4.826 ± 0.508) A 5° NOM Seating Plane 0.500 MIN (12.700) 0.018 Typ (0.457) 0.050 MAX (1.270) Uncontrolled Lead Dia. L 123 b C 0.050 ± 0.005 (1.270 ± 0.127) e1 0.100 ± 0.005 (2.540 ± 0.127) e 0.015 ± 0.005 Typ (0.381 ± 0.127) Before Lead Finish H 0.050 ± 0.005 (1.270 ± 0.127) E 0.140 ± 0.005 (3.556 ± 0.127) 10° NOM 1 2 3 0.090 R NOM (2.286) 3-Lead TO-243 (SOT-89) Surface Mount Package (N8) 0.177 ±0.004 (4.496 ± 0.102) 0.059 ±0.004 (1.499 ± 0.102) D 0.068 ±0.004 (1.727 ± 0.102) A b3 0.039 ±0.002 (0.990 ± 0.060) C 0.016 ±0.002 (0.394 ± 0.038) K 0.161 ±0.006 (4.089 ± 0.152) H M E 0.048 ±0.001 (1.225 ± 0.025) 0.096 ±0.006 (2.438 ± 0.152) L 0.087 ±0.003 (2.210 ± 0.076) b1 b2 0.041 ±0.006 (1.041 ± 0152) e1 0.017 ±0.003 (0.419 ± 0.064) 0.020 ±0.003 (0.508 ± 0.076) DSFP# HV9921/22/23 NR092005 e Measurement = 0.118 BSC (2.997) Inches (millimeters) Note: Circle (eg. ©) indicates JEDEC reference. 0.059 BSC (1.499) 10