ICS667-01 HDTV CLOCK SYNTHESIZER Description Features The ICS667-01 is a low-cost, low jitter, high-performance PLL clock synthesizer designed to produce the 74.176 MHz clock necessary for HDTV systems. Using ICS’ patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal or clock input. The zero ppm synthesis error exactly locks the display to the digital stream. • • • • • • ICS manufactures the largest variety multimedia clock synthesizers for all applications. Consult ICS to eliminate crystals and oscillators from your board. Packaged in 8-pin SOIC Available in Pb (lead) free package Input frequency of 27 MHz Zero ppm synthesis error in output clock 3.3 V ±5% operating supply Ideal for HDTV applications and oscillator manufacturers • Advanced, low power, sub-micron CMOS process Block Diagram VDD Clock Synthesis and Control Circuitry 27 MHz crystal or clock input CLK 74.17582418 MHz ICLK/X1 Clock Buffer 27.0000 MHz X2 2 GND Optional tuning crystal capacitors MDS 667-01 C OE 1 Revision 031605 I nt e gra t e d C ir c u it S y s te m s z 5 2 5 R a c e S t r e e t S a n J o s e, C A 9 5 1 2 6 z te l ( 40 8 ) 2 9 7 - 1 2 0 1 z w w w.i c s t . c o m ICS667-01 HDTV CLOCK SYNTHESIZER Pin Assignment ICLK/X1 1 8 X2 VDD 2 7 27M GND 3 6 OE CLK 4 5 GND Pin Descriptions Pin Number Pin Name Pin Type Pin Description 1 ICLK/X1 XI 2 VDD Power Connect to +3.3 V. 3 GND Power Connect to ground. 4 CLK Output 74.17582418 MHz. 5 GND Power Connect to ground. 6 OE Input Output enable. Tri-states CLK output when low. Internal pull-up to VDD. 7 27M Output 8 X2 XO Crystal connection. Connect to a 27 MHz fundamental crystal or clock. 27 MHz buffered clock or crystal oscillator output. Crystal connection. Connect to a 27 MHz crystal, or leave unconnected for clock input. External Components Decoupling Capacitor As with any high performance mixed-signal IC, the ICS667-01 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between VDD and GND on pins 2 and 3. It must be connected close to the ICS667-01 to minimize lead inductance. Pin 5 can be connected to pin 3. No external power supply filtering is required for the ICS667-01. crystal should be used. The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) between the crystal and device. Crystal capacitors, if needed, must be connected from each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should equal (CL -16 pF)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with an 18 pF load capacitance, each crystal capacitor would be 4 pF [(18-16) x 2] = 4. Series Termination Resistor A 33Ω terminating resistor can be used next to the clock outputs for trace lengths over one inch. Crystal Load Capacitors The total on-chip capacitance is approximately 18 pF. A parallel resonant, fundamental mode, AT cut 27 MHz MDS 667-01 C 2 Revision 031605 In t e gra te d C i r c u i t S ys t e m s z 5 2 5 R a c e S t r e e t, S a n J o s e, C A 9 5 1 2 6 z te l ( 4 08 ) 2 9 7 - 1 2 0 1 z w w w. ic s t . c o m ICS667-01 HDTV CLOCK SYNTHESIZER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS667-01. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +70°C Storage Temperature -65 to +150°C Soldering Temperature 260°C Recommended Operation Conditions Parameter Min. Ambient Operating Temperature Typ. 0 Power Supply Voltage (measured in respect to GND) +3.150 3.3 Max. Units +70 °C +3.465 V DC Electrical Characteristics VDD=3.3 V+ 5% unless otherwise noted, Ambient temperature 0 to +70°C Parameter Symbol Conditions Min. Typ. Max. Units 3.15 3.3 3.465 V Operating Voltage VDD Input High Voltage VIH ICLK, OE Input Low Voltage VIL ICLK, OE Output High Voltage VOH IOH = -4 mA Output Low Voltage VOL IOL = 4 mA Operating Supply Current IDD No load 30 mA Each output +50 mA 7 pF Short Circuit Current Input Capacitance MDS 667-01 C CIN 3 2.0 V 0.8 VDD-0.4 V V 0.4 V Revision 031605 In t e gra te d C i r c u i t S ys t e m s z 5 2 5 R a c e S t r e e t, S a n J o s e, C A 9 5 1 2 6 z te l ( 4 08 ) 2 9 7 - 1 2 0 1 z w w w. ic s t . c o m ICS667-01 HDTV CLOCK SYNTHESIZER AC Electrical Characteristics VDD =3.3V+ 5%, CL=15pF unless otherwise noted, Ambient Temperature 0 to +70°C Parameter Symbol Input Frequency Conditions Min. FIN Typ. Max. Units 27 MHz Frequency Error, Output Clock 0 ppm Output Clock Rise Time tOR 0.8 to 2.0 V 1.5 ns Output Clock Fall Time tOF 2.0 to 8.0 V 1.5 ns 60 % Output Clock Duty Cycle at 1.4 V 40 50 Maximum Absolute Jitter, short term tja Deviation from mean 200 ps Maximum Absolute Jitter, Long term term over 1us tjl Deviation from mean 500 ps OE going from Low to High 20 ns OE pin 750 kΩ Output Enable Time Internal Pull-up Resistor RPUP Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Symbol Min. Max. Units Still air 150 °C/W θJA 1 m/s air flow 140 °C/W θJA 3 m/s air flow 120 °C/W 40 °C/W θJC Marking Diagram (Pb free) 8 5 5 667M01LF ###### YYWW$$ 667M-01 ###### YYWW$$ 1 Typ. θJA Marking Diagram 8 Conditions 1 4 4 Notes: 1. ###### is the lot number. 2. YYWW is the last two digits of the year and week that the part was assembled. 3. Bottom marking: (origin) Origin = country of origin if other than USA. 4. “LF” denotes Pb (lead) free package. MDS 667-01 C 4 Revision 031605 In t e gra te d C i r c u i t S ys t e m s z 5 2 5 R a c e S t r e e t, S a n J o s e, C A 9 5 1 2 6 z te l ( 4 08 ) 2 9 7 - 1 2 0 1 z w w w. ic s t . c o m ICS667-01 HDTV CLOCK SYNTHESIZER Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Inches 8 Symbol E A A1 B C D E e H h L α H INDEX AREA 1 2 D Min Max 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° A Min Max .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) C Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature ICS667M-01 ICS667M-01T ICS667M-01LF ICS667M-01LFT see page 5 Tubes Tape and Reel Tubes Tape and Reel 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 0 to +70° C 0 to +70° C 0 to +70° C 0 to +70° C see page 5 Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 667-01 C 5 Revision 031605 In t e gra te d C i r c u i t S ys t e m s z 5 2 5 R a c e S t r e e t, S a n J o s e, C A 9 5 1 2 6 z te l ( 4 08 ) 2 9 7 - 1 2 0 1 z w w w. ic s t . c o m