ICS840051 Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS840051 is a Gigabit Ethernet Clock Generator and a member of the HiPerClocksTM HiPerClockS™ family of high performance devices from ICS. The ICS840051 can synthesize 10 Gigabit Ethernet, SONET, or Serial ATA reference clock frequencies with the appropriate choice of crystal and output divider. The ICS840051 has excellent phase jitter performance and is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space. • 1 LVCMOS/LVTTL output, 15Ω output impedance ICS • Crystal oscillator interface designed for 18pF parallel resonant crystals • Output frequency range: 70MHz - 170MHz • VCO range: 560MHz - 680MHz • RMS phase jitter at 155.52MHz (1.875MHz - 20MHz): 0.48ps (typical) • RMS phase noise at 155.52MHz Offset Noise Power 100Hz ............... -99.7 dBc/Hz 1KHz ................ -120 dBc/Hz 10KHz ................ -128 dBc/Hz 100KHz ................ -127 dBc/Hz • 3.3V operating supply • 0°C to 70°C ambient operating temperature • Lead-Free fully RoHS compliant • Industrial temperature information available upon request FREQUENCY TABLE Inputs Crystal Frequency (MHz) FREQ_SEL Output Frequency (MHz) 20.141601 0 161.132812 20.141601 1 80.566406 19.53125 0 156.25 19.53125 1 78.125 19.44 0 155.52 19.44 1 77.76 18.75 0 15 0 18.75 1 75 BLOCK DIAGRAM OE PIN ASSIGNMENT Pullup VDDA OE XTAL_OUT XTAL_IN FREQ_SEL Pulldown XTAL_IN OSC XTAL_OUT Phase Detector 0 ÷4 (default) 1 ÷8 VCO 560MHz-680MHz 8 7 6 5 VDD Q0 GND FREQ_SEL Q0 ICS840051 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View ÷32 (fixed) 840051AG 1 2 3 4 www.icst.com/products/hiperclocks.html 1 REV. A JANUARY 14, 2005 ICS840051 Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR TABLE 1. PIN DESCRIPTIONS Number Name Type 1 VDDA Power 2 OE Input 5 XTAL_OUT, XTAL_IN FREQ_SEL 6 GND Power 7 Q0 Output 8 VDD Power 3, 4 Input Input Description Analog supply pin. Output enable pin. When HIGH, Q0 output is enabled. When LOW, Pullup forces Q0 to HiZ state. LVCMOS/LVTTL interface levels. See Table 3A. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. See Table 3B. Power supply ground. Single-ended clock output. LVCMOS/LVTTL interface levels. 15Ω output impedance. Core supply pin. NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter CIN Input Capacitance Test Conditions CPD Power Dissipation Capacitance RPULLUP RPULLDOWN ROUT Minimum Typical Maximum Units 4 pF 7 pF Input Pullup Resistor 51 KΩ Input Pulldown Resistor 51 KΩ Output Impedance 15 Ω VDD, VDDA = 3.465V TABLE 3A. CONTROL FUNCTION TABLE Control Input Output OE Q0 0 Hi-Z 1 Active TABLE 3B. FREQ_SEL FUNCTION TABLE Control Input FRE_SEL 840051AG N Divider 0 ÷4 (default) 1 ÷8 www.icst.com/products/hiperclocks.html 2 REV. A JANUARY 14, 2005 ICS840051 Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5 V Outputs, VO -0.5V to VDD + 0.5V Package Thermal Impedance, θJA 101.7°C/W (0 mps) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = 0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical Maximum Units VDD Core Supply Voltage 3.135 3.3 3.465 V VDDA Analog Supply Voltage 3.135 3.3 3.465 V IDD Power Supply Current 60 mA IDDA Analog Supply Current 10 mA TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = 0°C TO 70°C Symbol Parameter VIH Input High Voltage VIL Input Low Voltage Test Conditions Minimum Maximum Units 2 Typical VDD + 0.3 V -0.3 0.8 V OE VDD = VIN = 3.465V 5 µA FREQ_SEL VDD = VIN = 3.465V 150 µA IIH Input High Current IIL Input Low Current VOH Output High Voltage; NOTE 1 VOL Output Low Voltage; NOTE 1 OE VDD = 3.465V, VIN = 0V -150 µA FREQ_SEL VDD = 3.465V, VIN = 0V -5 µA 2.6 V 0.5 V Maximum Units 21.25 MHz NOTE 1: Outputs terminated with 50Ω to VDD/2. See Parameter Measurement Information Section, "3.3V Output Load Test Circuit". TABLE 5. CRYSTAL CHARACTERISTICS Parameter Test Conditions Minimum Mode of Oscillation Typical Fundamental Frequency 17.5 Equivalent Series Resistance (ESR) 50 Ω Shunt Capacitance 7 pF 840051AG www.icst.com/products/hiperclocks.html 3 REV. A JANUARY 14, 2005 ICS840051 Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR TABLE 6. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = 0°C TO 70°C Symbol Parameter fOUT Output Frequency tjit(Ø) tR / tF RMS Phase Jitter ( Random); NOTE 1 Output Rise/Fall Time Test Conditions Typical 70 155.52MHz, Integration Range: 1.875MHz - 20MHz 77.76MHz, Integration Range: 1.875MHz - 20MHz 20% to 80% odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots. 840051AG Minimum www.icst.com/products/hiperclocks.html 4 Maximum Units 170 MHz 0.48 ps 0.45 ps 200 500 ps 48 52 % REV. A JANUARY 14, 2005 ICS840051 Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR TYPICAL PHASE NOISE AT 155.52MHZ 0 -10 ➤ -20 NOISE POWER dBc Hz -30 10GigE Filter -40 155.52MHz -50 RMS Phase Jitter (Random) 1.875Mhz to 20MHz = 0.48ps (typical) -60 -70 -80 -90 -100 Raw Phase Noise Data -110 ➤ -120 -130 -140 -150 ➤ -160 -170 -180 -190 100 1k Phase Noise Result by adding 10GigE Filter to raw data 10k 100k 1M 10M 100M OFFSET FREQUENCY (HZ) TYPICAL PHASE NOISE AT 77.76MHZ 0 -10 ➤ -20 NOISE POWER dBc Hz -30 10GigE Filter -40 77.76MHz -50 RMS Phase Jitter (Random) 1.875Mhz to 20MHz = 0.45ps (typical) -60 -70 -80 -90 -100 Raw Phase Noise Data -110 ➤ -120 -130 -140 -150 -160 ➤ -170 -180 -190 100 1k 10k Phase Noise Result by adding 10GigE Filter to raw data 100k 1M 10M 100M OFFSET FREQUENCY (HZ) 840051AG www.icst.com/products/hiperclocks.html 5 REV. A JANUARY 14, 2005 ICS840051 Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION 1.65V ± 5% Phase Noise Plot Noise Power SCOPE V DD Qx LVCMOS Phase Noise Mask GND Offset Frequency f1 -1.65V ± 5% f2 RMS Jitter = Area Under the Masked Phase Noise Plot 3.3V OUTPUT LOAD AC TEST CIRCUIT RMS PHASE JITTER V DD 80% 2 Q0 80% Pulse Width t odc = Clock Outputs PERIOD 20% 20% tR tF t PW t PERIOD OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 840051AG OUTPUT RISE/FALL TIME www.icst.com/products/hiperclocks.html 6 REV. A JANUARY 14, 2005 ICS840051 Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR APPLICATION INFORMATION POWER SUPPLY FILTERING TECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840051 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD and VDDA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10Ω resistor along with a 10µF and a .01µF bypass capacitor should be connected to each VDDA pin. 3.3V VDD .01µF 10Ω V DDA .01µF 10µF FIGURE 1. POWER SUPPLY FILTERING CRYSTAL INPUT INTERFACE nant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. The ICS840051 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using an 18pF parallel reso- XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 22p Figure 2. CRYSTAL INPUt INTERFACE 840051AG www.icst.com/products/hiperclocks.html 7 REV. A JANUARY 14, 2005 ICS840051 Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR RELIABILITY INFORMATION TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP θJA by Velocity (Meters per Second) Multi-Layer PCB, JEDEC Standard Test Boards 0 1 2.5 101.7°C/W 90.5°C/W 89.8°C/W TRANSISTOR COUNT The transistor count for ICS840051 is: 1927 840051AG www.icst.com/products/hiperclocks.html 8 REV. A JANUARY 14, 2005 ICS840051 Integrated Circuit Systems, Inc. PACKAGE OUTLINE - G SUFFIX FOR FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR 8 LEAD TSSOP TABLE 8. PACKAGE DIMENSIONS SYMBOL Millimeters Minimum N Maximum 8 A -- 1.20 A1 0.05 0.15 A2 0.80 1.05 b 0.19 0.30 c 0.09 0.20 D 2.90 E E1 3.10 6.40 BASIC 4.30 e 4.50 0.65 BASIC L 0.45 0.75 α 0° 8° aaa -- 0.10 Reference Document: JEDEC Publication 95, MO-153 840051AG www.icst.com/products/hiperclocks.html 9 REV. A JANUARY 14, 2005 ICS840051 Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR TABLE 9. ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature ICS840051AG 0051A 8 Lead TSSOP tube 0°C to 70°C ICS840051AGT 0051A 8 Lead TSSOP 2500 tape & reel 0°C to 70°C ICS840051AGLF 051AL 8 Lead "Lead-Free" TSSOP tube 0°C to 70°C ICS840051AGLFT 051AL 8 Lead "Lead-Free" TSSOP 2500 tape & reel 0°C to 70°C The aforementioned trademarks, HiPerClockS™ and FemtoClocks™ are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840051AG www.icst.com/products/hiperclocks.html 10 REV. A JANUARY 14, 2005