IDT54/74FCT139/A/C FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES IDT54/74FCT139 IDT54/74FCT139A IDT54/74FCT139C FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • The IDT54/74FCT139/A/C are dual 1-of-4 decoders built using an advanced dual metal CMOS technology. These devices have two independent decoders, each of which accept two binary weighted inputs (A0-A1) and provide four mutually exclusive active LOW outputs (O0-O3). Each decoder has an active LOW enable (E). When E is HIGH, all outputs are forced HIGH. • • • • • • • • IDT54/74FCT139 equivalent to FAST speed IDT54/74FCT139A 35% faster than FAST IDT54/74FCT139C 45% faster than FAST Equivalent to FAST output drive over full temperature and voltage supply extremes IOL = 48mA (commercial) and 32mA (military) CMOS power levels (1mW typ. static) TTL input and output level compatible CMOS output level compatible Substantially lower input current levels than FAST (5µA max.) JEDEC standard pinout for DIP and LCC Product available in Radiation Tolerant and Radiation Enhanced versions Military product compliant to MIL-STD-883, Class B PIN CONFIGURATIONS FUNCTIONAL BLOCK DIAGRAM Ea A0a A1a Eb A0b A1b Ea 1 16 VCC A0a A1a 2 3 15 Eb O0a 4 O1a O2a 5 6 P16-1 D16-1 14 SO16-1 13 & 12 E16-1 11 O3a GND 7 10 O1b O2b 8 9 O3b A0b A1b O0b DIP/SOIC/CERPACK TOP VIEW 2605 cnv* 01 O3a O0b O1b O2b NC O2a 1 20 19 18 A0b 5 17 A1b NC O1a 6 16 NC 7 15 O0b O2a 8 14 O1b Ea O1a A0a O0a VCC Eb INDEX 3 2 O3b 2605 cnv* 03 A1a 4 O0a L20-2 LCC TOP VIEW O2b O3b GND NC O3a 9 10 11 12 13 2605 cnv* 02 The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a trademark of National Semiconductor Co. MILITARY AND COMMERCIAL TEMPERATURE RANGES 1992 Integrated Device Technology, Inc. 7.4 7.4 MAY 1992 DSC 4613/3 1 1 IDT54/74FCT139/A/C FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES TRUTH TABLE(1) PIN DESCRIPTION E Inputs A0 A1 Outputs H X X H H H H L L L L H H H L H L H L H H L L H H H L H L H H H H H L O0 O1 O2 NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care O3 Description Address Inputs E O0 - O3 Enable Input (Active LOW) Outputs (Active LOW) 2605 tbl 04 2605 tbl 05 ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating VTERM(2) Terminal Voltage with Respect to GND VTERM(3) Terminal Voltage with Respect to GND TA Operating Temperature TBIAS Temperature Under Bias TSTG Storage Temperature PT Power Dissipation IOUT DC Output Current Pin Names A 0 , A1 CAPACITANCE (TA = +25°C, f = 1.0MHz) Commercial –0.5 to +7.0 Military –0.5 to +7.0 Unit V –0.5 to VCC –0.5 to VCC V 0 to +70 –55 to +125 °C –55 to +125 –65 to +135 °C –55 to +125 –65 to +150 °C 0.5 0.5 W 120 120 mA Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V Typ. 6 Max. 10 Unit pF VOUT = 0V 8 12 pF NOTE: 2605 tbl 1. This parameter is measured at characterization but not tested. NOTES: 2605 tbl 01 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only. 7.4 2 02 IDT54/74FCT139/A/C FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10% Parameter Input HIGH Level Test Conditions(1) Guaranteed Logic HIGH Level VIL Input LOW Level II H Input HIGH Current Symbol VIH II L Min. 2.0 Typ.(2) — Max. — Unit V Guaranteed Logic LOW Level — — 0.8 V VCC = Max. — — 5 µA VI = VCC Input LOW Current VI = 2.7V — — 5(4) VI = 0.5V — — –5(4) VI = GND — — –5 VIK Clamp Diode Voltage VCC = Min., IN = –18mA — –0.7 –1.2 V IOS Short Circuit Current VCC = Max.(3) , VO = GND –60 –120 — mA VOH Output HIGH Voltage VCC = 3V, VIN = VLC or VHC, IOH = –32µA VHC VCC — V VOL Output LOW Voltage VCC = Min. IOH = –300µA VHC VCC — VIN = VIH or VIL IOH = –12mA MIL. 2.4 4.3 — IOH = –15mA COM'L. 2.4 4.3 — VCC = 3V, VIN = VLC or VHC, IOL = 300µA — GND VLC VCC = Min. IOL = 300µA — GND VLC(4) VIN = VIH or VIL IOL = 32mA MIL. — 0.3 0.5 IOL = 48mA COM'L. — 0.3 0.5 NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. This parameter is guaranteed but not tested. 7.4 V 2605 tbl 03 3 IDT54/74FCT139/A/C FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS VLC = 0.2V; VHC = VCC – 0.2V Symbol ICC ∆ICC ICCD IC Parameter Quiescent Power Supply Current Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Total Power Supply Current (6) Test Conditions(1) VCC = Max. VIN ≥ VHC; VIN ≤ VLC VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open One Bit Toggling 50% Duty Cycle VCC = Max. Outputs Open fo = 10MHz 50% Duty Cycle One Output Toggling Min. Typ.(2) Max. Unit — 0.2 1.5 mA — 0.5 2.0 mA VIN ≥ VHC VIN ≤ VLC — 0.15 0.3 mA/ MHz VIN ≥ VHC VIN ≤ VLC (FCT) VIN = 3.4V VIN = GND — 1.7 4.5 mA — 2.0 5.5 — 3.2 7.5 (5) — 3.7 9.5 (5) VIN ≥ VHC VIN ≤ VLC (FCT) VIN = 3.4V VIN = GND VCC = Max. Outputs Open fo = 10MHz 50% Duty Cycle One Output Toggling on Each Decoder NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + foNO) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fo = Output Frequency NO = Number of Outputs at fo All currents are in milliamps and all frequencies are in megahertz. 2605 tbl 04 SWITCHING CHARACTERISTICS OVER OPERATING RANGE IDT54/74FCT139 Com'l. Parameter Description tPLH tPHL Propagation Delay A0 or A1 to On tPLH tPHL Propagation Delay E to On Condition(1) CL = 50pF RL = 500Ω (2) Min. Mil. (2) Max. Min. IDT54/74FCT139A IDT54/74FCT139C Com'l. Com'l. (2) Max. Min. Mil. (2) (2) Max. Min. Max. Min. Mil. Max. Min. (2) Max. Unit 1.5 9.0 1.5 12.0 1.5 5.9 1.5 7.8 1.5 5.0 1.5 6.2 ns 1.5 8.0 1.5 1.5 5.5 1.5 7.2 1.5 4.8 1.5 5.8 ns NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 9.0 2605 tbl 07 7.4 4 IDT54/74FCT139/A/C FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS VCC 7.0V 500Ω V OUT VIN Pulse Generator D.U.T. 50pF RT 500Ω SET-UP, HOLD AND RELEASE TIMES Closed All Other Tests Open 3V 1.5V 0V tH TIMING INPUT 3V 1.5V 0V LOW-HIGH-LOW PULSE 3V 1.5V 0V HIGH-LOW-HIGH PULSE 1.5V tW t REM PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. Open Drain Disable Low Enable Low PULSE WIDTH DATA INPUT ASYNCHRONOUS CONTROL Switch DEFINITIONS: 2605 tbl 08 CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. CL t SU Test t SU 1.5V 3V 1.5V 0V tH PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE DISABLE 3V 3V 1.5V SAME PHASE INPUT TRANSITION t PLH t PHL CONTROL INPUT OUTPUT NORMALLY SWITCH LOW CLOSED t PZH VOL t PLH t PHL OUTPUT SWITCH NORMALLY OPEN HIGH 3V OPPOSITE PHASE INPUT TRANSITION 1.5V 0V t PLZ t PZL 0V VOH 1.5V OUTPUT 1.5V 3.5V 1.5V 3.5V 0.3V V OL t PHZ 0.3V 1.5V 0V V OH 0V 0V NOTES 2605 drw 10 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0 MHz; ZO ≤ 50Ω; tF ≤ 2.5ns; tR ≤ 2.5ns. 7.4 5 IDT54/74FCT139/A/C FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION IDT XXXX XX FCT Temp. Range Device Type X Package X Process 7.4 Blank B Commercial MIL-STD-883, Class B P D SO L E Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK 139 139A 139C Dual 1-of-4 Decoder Fast Dual 1-of-4 Decoder Super Fast Dual 1-of-4 Decoder 54 74 –55°C to +125°C 0°C to +70°C 2605 cnv* 09 6