IKSEMICON IL34063AN

TECHNI CAL DATA
IL34063A
DC-TO-DC CONVERTER CONTROL CIRCUITS
The IL34063A is a monolithic control circuit containing the primary functions required for DC-to-DC
converters. These devices consist of an internal temperature compensated reference, comparator, controlled
duty cycle oscillator with an active current limit circuit, driver and high current output switch. This series
was specifically designed to be incorporated in Step-Down and Step-Up and Voltage-Inverting applications
with a minimum number of external components.
FEATURES
FUNCTIONAL BLOCK DIAGRAM
•
•
•
•
•
•
•
Operation from 3.0 V to 40 V Input
Low Standby Current
Current Limiting
Output Switch Current to 1.5 A
Output Voltage Adjustable
Frequency Operation to 100 kHz
Precision 2% Reference
MAXIMUM RATINGS
Rating
Power Supply Voltage
Comparator Input Voltage Range
Switch Collector Voltage
Switch Emitter Voltage (Vpin 1 = 40 V)
Switch Collector to Emitter Voltage
Driver Collector Voltage
Driver Collector Current (Note 1)
Switch Current
Power Dissipation and Thermal Characteristics
Ceramic Package, U Suffix TA = +25°C
Thermal Resistance
Plastic Package, P Suffix TA = +25°C
Thermal Resistance
SOIC Package, D Suffix TA = +25°C
Thermal Resistance
Operating Junction Temperature
Operating Ambient Temperature Range
Storage Temperature Range
Symbol
VCC
VIR
VC(switch)
VE(switch)
VCE(switch)
IC(driver)
IC(driver)
ISW
Value
40
-0.3 to +40
40
40
40
40
100
1.5
Unit
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
mA
A
PD
RθJA
PD
RθJA
PD
RθJA
1.25
100
1.25
100
625
160
+150
0 to +70
-65to+150
W
°C/W
W
°C/W
mW °C/W
TJ
TA
Tstg
°C
°C
°C
* Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these or any other conditions beyond those
indicated under “recommended operating conditions” is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2011, February, Rev. 02
I L 34063A
ORDERING INFORMATION
Device
Temperature Range
34063AD
0° to +70°C
34063AN
Pin connection
Package
SO-8
Plastic DIP
ELECTRICAL CHARACTERICISTICS
(VCC = 5.0 V, TA= 0 to +70oC unless otherwise specified.)
Characteristics
Symbol
OSCILLATOR
Frequency (VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C)
fosc
Charge Current (VCC = 5.0 V to 40 V, TA = 25°C)
Ichg
Discharge Current (VCC = 5.0 V to 40 V, TA = 25°C)
Idischg
Discharge to Charge Current Ratio (Pin7 to Vcc, TA=25°C)
Idischg/Ichg
Current Limit Sense Voltage (Ichg = Idischg, TA = 25°C)
Vipk(sense)
OUTPUT SWITCH (Note 3)
Saturation Voltage, Darlington Connection (ISW = 1.0 A, Pins 1, 8 VCE(sat)
Min
Typ
Max
Unit
24
24
140
5.2
250
33
33
200
6.2
300
42
42
260
7.5
350
kHz
µA
µA
—
mV
—
1.0
1.3
V
—
0.45
0.7
V
50
—
120
0.01
—
100
—
µA
1.225
1.21
1.2375
1.25
—
1.25
1.275
1.29
1.2625
V
—
1.4
-40
5.0
-400
mV
nA
2.5
4.0
mA
connected)
VCE(sat)
Saturation Voltage (ISW = 1.0 A, RPin 8 = 82 Ω to VCC.
Forced β = 20)
DC Current Gain (ISW = 1.0 A, VCE = 5.0 V, TA = 25°C)
hFE
Collector Off-State Current (VCE = 40V)
IC(off)
COMPARATOR
Threshold Voltage (TA = 25°C)
Vth
(TA = TLOW to THIGH)
Threshold Voltage (TA = 25°C) **
Threshold Voltage Line Regulation (VCC = 3 0 V to 40 V)
Input Bias Current (Vin=0V)
Vth
Regline
IIB
TOTAL DEVICE
Supply Current (VCC = 5 0 V to 40 V, CT = 1 0 nF, Vpin7 = VCC.
ICC
V
VPin5 > Vth, Pin 2 = Gnd, Remaining pins open)
NOTES:
1. Maximum package power dissipation limits must be observed.
2. Low duty cycle pulse techniques are used during test to maintain Junction temperature as close to ambient temperature as possible
3. If the output switch is driven into hard saturation (non Darlington configuration) at low switch currents (< 300 mA) and high
driver currents (>30 mA), it may take up to 2.0 µs to come out of saturation This condition will shorten the off' time at frequencies >
30 kHz, and is magnified at high temperatures This condition does not occur with a Darlington configuration, since the output switch
cannot saturate If a non Darlington configuration is used, the following output drive condition is recommended
Forced β of output switch = IC, output/(Ic, driver -7.0 mA*) > 10
*The 100 Ω. resistor in the emitter of the driver device requires about 7.0 mA before the output switch conducts
**Possible version for shipment
2011, February, Rev. 02
I L 34063A
TYPICAL APPLICATION CIRCUITS
Step-Up Converter
L1
170µH
R3
8
DRC
SWC
Ipk
SWE
1
180Ω
7
2
D1
BYV10-40
RSG
6
Vcc
TC
3
0.22Ω
VIN
5
Cll
GND
12V
C3
+
C2
VOUT
4
34063A/E
100 µF
R1
R2
2.2kΩ
47kΩ
1.5nF
C3
+
330µF
Test Condition (VOUT = 28 V)
Test
Conditions
Line Regulation
VIN = 8 to 16 V, IO = 175 mA
Load Regulation
VIN = 12 V, IO = 75 to 175 mA
Output Ripple
VIN = 12 V, IO = 175 mA
Efficiency
VIN = 12 V, IO = 175 mA
Value (Typ)
30
10
300
89
Unit
mV
mV
mV
%
2011, February, Rev. 02
I L 34063A
Step-Down Converter
8
DRC
SWC
1
BYV10-40
RSC
0.33Ω
7
Ipk
SWE
2
D1
6
5
C2
Vcc
TC
Cll
GND
3
4
L1
220µH
C3
+
100 µF
34063A/E
R1
R2
1.2kΩ
3.6kΩ
470pF
C1
+
470µF
Test Condition (VOUT = 5 V)
Test
Conditions
Line Regulation
VIN = 15 to 25 V, IO = 500 mA
Load Regulation
VIN = 25 V, IO = 50 to 500 mA
Output Ripple
VIN = 25 V, IO = 500 mA
Efficiency
VIN = 25 V, IO = 500 mA
ISC
VIN = 25 V, RLOAD = 0.1 Ω
Value (Typ)
5
30
100
80
1.2
Unit
mV
mV
mV
%
A
2011, February, Rev. 02
I L 34063A
Voltage Inverting Converter
8
DRC
SWC
1
L1
R3
7
Ipk
SWE
2
0.22Ω
90µH
6
5
VIN
TC
Vcc
GND
Cll
3
4
D1
BYV10-40
4.5 to 6V
C2
+
34063A/E
100µF
R2
8.2kΩ
C3
1.5nF
R1
VOUT
953Ω
-12V / 100mA
C1
+
Test Condition (VOUT = -12 V)
Test
Conditions
Line Regulation
VIN = 4.5 to 6 V, IO = 100 mA
Load Regulation
VIN = 5 V, IO = 10 to 100 mA
Output Ripple
VIN = 5 V, IO = 100 mA
Efficiency
VIN = 5 V, IO = 100 mA
ISC
VIN = 5 V, RLOAD = 0.1 Ω
1000µF
Value (Typ)
15
20
230
58
0.9
Unit
mV
mV
mV
%
A
2011, February, Rev. 02
I L 34063A
Calculation
Parameter
Step-Up
(Discontinuous mode)
Vout +VF-V in(min)
Vin(min) - Vsat
1/fmin
4.5x10-5ton
2Iout(max)[(ton/toff)+1]
0.3/IPK(switch)
Ioutton
≡
Vripple(p-p)
Vin(min) - Vsat
ton(max)
IPK(switch)
ton/toff
(ton + toff)max
CT
IPK(switch)
RSC
CO
L(min)
Step-Down
(Continuous mode)
Vout +VF
Vin(min) - Vsat - Vout
1/fmin
4.5x10-5ton
2Iout(max)
0.3/IPK(switch)
IPK(switch) (ton + toff)
8Vripple(p-p)
Vin(min)-Vsat-Vout
ton(max)
IPK(switch)
Voltage Inverting
(Discontinuous mode)
Vout + VF
Vin - Vsat
1/fmin
4.5x10-5ton
2Iout(max)[(ton/toff)+1]
0.3/IPK(switch)
Ioutton
≡
Vripple(p-p)
Vin(min) - Vsat
ton(max)
IPK(switch)
NOTES:
Vsat = Saturation voltage of the output switch
VF = Forward voltage drop of the output rectifier
THE FOLLOWING POWER SUPPLY CHARACTERISTICS MUST BE CHOSEN:
Vin = Nominal input voltage
Vout = Desired output voltage, Vout  = 1.25(1+R2/R1)
Iout = Desired output current
fmin = Minimum desired output switching frequency at the selected values of Vin and lo
Vripple = Desired peak to peak output ripple voltage. In practice, the calculated capacitor value will and to be
increased due to its equivalent series resistance and board layout. The ripple voltage should be kept to a low
value since it will directly affect the line and load regulation.
Step-up With External NPN Switch
8
VOUT
1
+
S Q
Q1
R
2
7
RSC
VIN
6
Ipk
Oscillator
3
1.25V
Reference
Regulator
4
Comparator
+
5
2011, February, Rev. 02
I L 34063A
Step-down With External NPN Switch
8
1
S Q
Q2
Q1
R
2
7
RSC
VIN
Ipk
Oscillator
6
VOUT
3
+
Comparator
1.25 V
Reforence
Regulator
4
5
Step-down With External PNP Switch
8
1
S Q
Q2
Q1
R
VOUT
2
+
7
RSC
VIN
6
Ipk
Oscillator
3
1.25 V
Reference
Regulator
4
Comparator
5
2011, February, Rev. 02
I L 34063A
Voltage Inverting With External NPN Switch
8
1
S Q
Q2
Q1
R
2
7
VOUT
RSC
VIN
Ipk
Oscillator
6
3
+
Comparator
1.25 V
Reference
Regulator
4
5
Voltage Inverting With External PNP Saturated Switch
8
1
S Q
Q2
V OUT
Q1
R
2
+
7
RS C
VI N
6
Ipk
Oscillator
3
1.25 V
Reforence
Regulator
4
Comparator
5
2011, February, Rev. 02
I L 34063A
Dual Output Voltage
+12V
+
GND
8
+
1
S Q
Q2
-12V
Q1
R
2
7
RSC
VIN
6
Ipk
Oscillator
3
1.25 V
Reforence
Regulator
4
Comparator
5
Higher Output Power, Higher Input Voltage
+VOUT
+
Isolated from input
-VOUT
+
8
1
S Q
Q2
Q1
R
VIN
2
7
RSC
6
Ipk
Oscillator
3
1.25 V
Reforence
Regulator
4
Comparator
+
-
5
2011, February, Rev. 02
I L 34063A
N SUFFIX PLASTIC DIP
(MS – 001BA)
A
Dimension, mm
5
8
B
1
4
F
Symbol
MIN
MAX
A
8.51
10.16
B
6.1
7.11
C
L
C
5.33
D
0.36
0.56
F
1.14
1.78
-T- SEATING
PLANE
N
G
M
K
0.25 (0.010) M
J
H
D
T
NOTES:
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
G
2.54
H
7.62
J
0°
10°
K
2.92
3.81
L
7.62
8.26
M
0.2
0.36
N
0.38
D SUFFIX SOIC
(MS - 012AA)
Dimension, mm
A
8
5
B
H
1
G
P
4
K
D
0.25 (0.010) M
MIN
MAX
A
4.8
5
B
3.8
4
C
1.35
1.75
D
0.33
0.51
F
0.4
1.27
R x 45
C
-T-
Symbol
SEATING
PLANE
J
F
T CM
NOTES:
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B ‑ 0.25 mm (0.010) per side.
M
G
1.27
H
5.72
J
0°
8°
K
0.1
0.25
M
0.19
0.25
P
5.8
6.2
R
0.25
0.5
2011, February, Rev. 02