IRF IR2113E6 High and low side driver Datasheet

PD - 91882
IR2113E6
HIGH AND LOW SIDE DRIVER
Product Summary
Features
n Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
n Gate drive supply range from 10 to 20V
n Undervoltage lockout for both channels
n Separate logic supply range from 5 to 20V
Logic and power ground ±5V offset
n CMOS Schmitt-triggered inputs with pull-down
n Cycle by cycle edge-triggered shutdown logic
n Matched propagation delay for both channels
n Outputs in phase with inputs
VOFFSET
600V max.
IO+/-
2A / 2A
VOUT
10 - 20V
ton/off (typ.)
120 & 94 ns
Delay Matching
10 ns
Description
The IR2113E6 is a high voltage, high speed power MOSFET
and IGBT driver with independent high and low side referenced output channels. Proprietary HVIC and latch immune
CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or
LSTTL outputs. The output drivers feature a high pulse
current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in
high frequency applications. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 600 volts.
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional information is shown
in Figures 28 through 35.
Symbol
VB
VS
VHO
VCC
VLO
VDD
VSS
VIN
dVS/dt
PD
RthJA
Tj
TS
TL
Parameter
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN & SD)
Allowable Offset Supply Voltage Transient (Fig. 16)
Package Power Dissipation @ TA ≤ = 25°C (Fig. 19)
Thermal Resistance, Junction to Ambient
Junction Temperature
Storage Temperature
Package Mounting Surface Temperature
Weight
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Min.
Max.
-0.5
VS + 20
—
600
VS -0.5
VB + 0.5
-0.5
20
-0.5
VCC + 0.5
-0.5
VSS + 20
VCC - 20
VCC + 0.5
VSS - 0.5
VDD + 0.5
—
50
—
1.6
—
125
-55
125
-55
150
300 (for 5 seconds)
0.45 (typical)
Units
V
V/ns
W
°C/W
°C
g
1
4/13/99
IR2113E6
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical
ratings at other bias conditions are shown in Figures 36 and 37.
Symbol
Parameter
VB
VS
VHO
VCC
VLO
VDD
VSS
VIN
Min.
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN & SD)
Max.
V S + 10
-4
VS
10
0
VSS + 5
-5
VSS
Units
VS + 20
600
VB
20
VCC
VSS + 20
5
VDD
V
Dynamic Electrical Characteristics
VBIAS (VCC , VBS , VDD) = 15V, CL = 1000 pF, TA = 25°C and VSS = COM unless otherwise specified.
The dynamic electrical characteristics are measured using the test circuit shown in Figure 3.
Tj = 25°C
ton
toff
tsd
tr
tf
Mt
Tj = -55 to
125°C
Parameter
Min
Typ. Max. Min. Max Units
Turn-On Propagation Delay
Turn-Off Propagation Delay
Shutdown Propagation Delay
Turn-On Rise Time
Turn-Off Fall Time
Delay Matching, HS & LS Turn-On/Off
—
—
—
—
—
—
120
94
110
25
17
—
150
125
140
35
25
10
—
—
—
—
—
—
260
220
235
50
40
—
ns
Test Conditions
VS = 0V
V S = 600V
VS = 600V
CL = 1000pf
CL = 1000pf
Hton-Lton / Htoff-Ltoff
Typical Connection
up to 6
500V
HO
V DD
V DD
VB
HIN
HIN
VS
SD
SD
LIN
LIN
V CC
V SS
V SS
COM
V CC
2
TO
LOAD
LO
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IR2113E6
Static Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15V, TA = 25°C and VSS = COM unless otherwise specified. The VIN, VTH and
IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD.
The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or
LO.
Tj = -55 to
125°C
Typ. Max. Min. Max Units
Tj = 25°C
Symbol
Parameter
Min
Test Conditions
VIH
VIL
Logic “1” Input Voltage
Logic “0” Input Voltage
9.5
—
—
—
—
6.0
10
—
—
5.7
VOH
High Level Output Voltage, VBIAS - VO
—
0.7
1.2
—
1.5
VOL
Low Level Output Voltage, VO
—
—
0.1
—
0.1
VIN = VIH, IO = 0A
ILK
Offset Supply Leakage Current
—
—
50
—
250
VB = VS = 600V
IQBS
Quiescent VBS Supply Current
—
125
230
—
500
VIN = VIH or VIL
IQCC
Quiescent VCC Supply Current
—
180
340
—
600
IQDD
Quiescent VDD Supply Current
—
5.0
30
—
60
IIN+
Logic “1” Input Bias Current
—
15
40
—
70
VIN = 15V
IIN-
Logic “0” Input Bias Current
—
—
1.0
—
10
VIN = 0V
7.5
8.7
9.7
—
—
7.0
8.3
9.4
—
—
7.4
8.6
9.6
—
—
7.0
8.2
9.4
—
—
2.0
—
—
—
—
VBSUV+ VBS Supply Undervoltage Positive
Going Threshold
VBSUV- VBS Supply Undervoltage Negative
Going Threshold
VCCUV+ VCC Supply Undervoltage Positive
Going Threshold
VCCUV- VCC Supply Undervoltage Negative
Going Threshold
Output High Short Circuit Pulsed
IO+
Current
IOOutput Low Short Circuit Pulsed
Current
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VDD = 15V
VDD = 15V
V
µA
—
—
—
—
VIN = VIH or VIL
VIN =VIH or VIL
V
A
2.0
VIN = VIH, IO = 0A
VO UT= 0V, VIN =15 V
PW < = 10µs
VOUT = 15V, VIN = 0V
PW < = 10µs
3
131313
IR2113E6
4
11
8
6
9
13
14
15
17
Figure 1. Input/Output Timing Diagram
11
4
4
8
Figure 2. Floating Supply Voltage Transient Test
Circuit
2
8
6
13
6
9
ton
14
15
50%
50%
HIN
LIN
toff
tr
90%
17
17
2
HO
LO
Figure 3. Switching Time Test Circuit
tf
90%
10%
10%
Figure 4. Switching Time Waveform Definition
HIN
LIN
50%
50%
SD
LO
50%
HO
10%
tsd
HO
LO
MT
MT
90%
90%
LO
Figure 3. Shutdown Waveform Definitions
4
HO
Figure 6. Delay Matching Waveform Definitions
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IR2113E6
250
250
200
200
Turn-On Delay Time (ns)
Turn-On Delay Time (ns)
Max.
150
Max.
100
Typ.
50
150
Typ.
100
50
0
0
-50
-25
0
25
50
75
100
125
10
12
Temperature (°C)
Figure 7A. Turn-On Time vs. Temperature
16
18
20
Figure 7B. Turn-On Time vs. Voltage
250
250
200
200
Turn-Off Delay Time (ns)
Turn-Off Delay Time (ns)
14
VBIAS Supply Voltage (V)
150
Max.
100
Typ.
50
Max.
150
Typ.
100
50
0
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Temperature (°C)
Figure 8A. Turn-Off Time vs. Temperature
Figure 8B. Turn-Off Time vs. Voltage
250
250
200
200
Shutdown Delay time (ns)
Shutdown Delay Time (ns)
Max.
150
Max.
100
Typ.
50
150
Typ.
100
50
0
0
-50
-25
0
25
50
75
100
Temperature (°C)
Figure 9A. Shutdown Time vs. Temperature
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125
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 9B. Shutdown Time vs. Voltage
5
100
100
80
80
Turn-On Rise Time (ns)
Turn-On Rise Time (ns)
IR2113E6
60
40
Max.
60
Max.
40
Typ.
Typ.
20
20
0
0
-50
-25
0
25
50
75
100
125
10
12
50
50
40
40
30
Max.
20
Typ.
10
18
20
30
20
Max.
Typ.
10
0
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Temperature (°C)
Figure 11A. Turn-Off Fall Time vs. Temperature
Figure 11B. Turn-Off Fall Time vs. Voltage
15.0
15.0
12.0
12.0
Logic "1" Input Threshold (V)
Logic "1" Input Threshold (V)
16
Figure 10B. Turn-On Rise Time vs. Voltage
Turn-Off Fall Time (ns)
Turn-Off Fall Time (ns)
Figure 10A. Turn-On Rise Time vs. Temperature
Min.
9.0
6.0
3.0
9.0
6.0
Min.
3.0
0.0
0.0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 12A. Logic “1” Input Threshold vs. Temperature
6
14
VBIAS Supply Voltage (V)
Temperature (°C)
5
7.5
10
12.5
15
17.5
20
VDD Logic Supply Voltage (V)
Figure 12B. Logic “1” Input Threshold vs. Voltage
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15.0
15.0
12.0
12.0
Logic "0" Input Threshold (V)
Logic "0" Input Threshold (V)
IR2113E6
9.0
6.0
Max.
3.0
9.0
6.0
3.0
0.0
Max.
0.0
-50
-25
0
25
50
75
100
125
5
7.5
12.5
15
17.5
20
Figure 13B. Logic “0” Input Threshold vs. Voltage
5.00
5.00
4.00
4.00
High Level Output Voltage (V)
High Level Output Voltage (V)
Figure 13A. Logic “0” Input Threshold vs. Temperature
3.00
2.00
Max.
1.00
3.00
2.00
Max.
1.00
0.00
0.00
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Temperature (°C)
Figure 14A. High Level Output vs. Temperature
Figure 14B. High Level Output vs. Voltage
1.00
15.0
0.80
12.0
Logic "1" Input Threshold (V)
Low Level Output Voltage (V)
10
VDD Logic Supply Voltage (V)
Temperature (°C)
0.60
0.40
9.0
6.0
Min.
3.0
0.20
Max.
0.00
0.0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 15A. Low Level Output vs. Temperature
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5
7.5
10
12.5
15
17.5
20
VDD Logic Supply Voltage (V)
Figure 15B. Low Level Output vs. Voltage
7
500
500
400
400
Offset Supply Leakage Current (µA)
Offset Supply Leakage Current (µA)
IR2113E6
300
200
100
300
200
100
Max.
Max.
0
0
-50
-25
0
25
50
75
100
125
0
100
Temperature (°C)
Figure 16A. Offset Supply Current vs. Temperature
300
400
500
Figure 16B. Offset Supply Current vs. Voltage
500
500
400
400
VBS Supply Current (µA)
VBS Supply Current (µA)
200
VB Boost Voltage (V)
300
Max.
200
300
200
Max.
Typ.
100
100
0
Typ.
0
-50
-25
0
25
50
75
100
125
10
12
Figure 17A. VBS Supply Current vs. Temperature
16
18
20
Figure 17B. VBS Supply Current vs. Voltage
625
625
500
500
VCC Supply Current (µA)
VCC Supply Current (µA)
14
VBS Floating Supply Voltage (V)
Temperature (°C)
375
Max.
250
375
250
Max.
Typ.
125
125
0
0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 18A. VCC Supply Current vs. Temperature
8
Typ.
10
12
14
16
18
20
VCC Fixed Supply Voltage (V)
Figure 18B. VCC Supply Current vs. Voltage
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100
100
80
80
VDD Supply Current (µA)
VDD Supply Current (µA)
IR2113E6
60
40
Max.
60
40
Max.
20
20
Typ.
Typ.
0
0
-50
-25
0
25
50
75
100
125
5
7.5
Figure 19A. VDD Supply Current vs. Temperature
12.5
15
17.5
20
Figure 19B. VDD Supply Current vs. Voltage
100
100
80
80
Logic "1" Input Bias Current (µA)
Logic "1" Input Bias Current (µA)
10
VDD Logic Supply Voltage (V)
Temperature (°C)
60
40
Max.
20
60
40
Max.
20
Typ.
T yp.
0
0
-50
-25
0
25
50
75
100
5
125
7.5
12.5
15
17.5
20
Figure 20B. Logic “1” Input Current vs. Voltage
5.00
5.00
4.00
4.00
Logic "0" Input Bias Current (µA)
Logic "0" Input Bias Current (µA)
Figure 20A. Logic “1” Input Current vs. Temperature
3.00
2.00
1.00
10
VDD Logic Supply Voltage (V)
Temperature (°C)
Max.
0.00
3.00
2.00
Max.
1.00
0.00
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 21A. Logic “0” Input Current vs. Temperature
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5
7.5
10
12.5
15
17.5
20
VDD Logic Supply Voltage (V)
Figure 21B. Logic “0” Input Current vs. Voltage
9
IR2113E6
11.0
11.0
10.0
Max.
VBS Undervoltage Lockout - (V)
VBS Undervoltage Lockout + (V)
10.0
9.0
Typ.
8.0
Min.
Max.
9.0
Typ.
8.0
7.0
7.0
6.0
Min.
6.0
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
Figure 22. VBS Undervoltage (+) vs. Temperature
VCC Undervoltage Lockout - (V)
VCC Undervoltage Lockout + (V)
100
125
10.0
Max.
9.0
Typ.
8.0
Min.
Max.
9.0
Typ.
8.0
7.0
7.0
6.0
Min.
6.0
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
50
75
100
125
Figure 25. VCC Undervoltage (-) vs. Temperature
5.00
4.00
4.00
Output Source Current (A)
5.00
Typ.
Min.
2.00
1.00
0.00
-50
25
Temperature (°C)
Figure 24. VCC Undervoltage (+) vs. Temperature
Output Source Current (A)
75
11.0
10.0
3.00
2.00
Typ.
1.00
Min.
0.00
-25
0
25
50
75
100
125
Temperature (°C)
Figure 26A. Output Source Current vs. Temperature
10
50
Figure 23. VBS Undervoltage (-) vs. Temperature
11.0
3.00
25
Temperature (°C)
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 26B. Output Source Current vs. Voltage
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5.00
5.00
4.00
4.00
3.00
Output Sink Current (A)
Output Sink Current (A)
IR2113E6
Typ.
Min.
2.00
1.00
0.00
-50
3.00
2.00
Typ.
1.00
Min.
0.00
-25
0
25
50
75
100
125
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Temperature (°C)
Figure 27A. Output Sink Current vs. Temperature
Figure 27B. Output Sink Current vs. Voltage
320V
150
320V
150
125
125
100
75
10V
50
Junction Temperature (°C)
Junction Temperature (°C)
140V
140V
25
0
1E+2
100
75
10V
50
25
1E+3
1E+4
1E+5
0
1E+2
1E+6
1E+3
Frequency (Hz)
320V
150
140V
140V
125
100
10V
75
50
25
Junction Temperature (°C)
Junction Temperature (°C)
1E+6
320V
150
125
10V
100
75
50
25
1E+3
1E+4
1E+5
1E+6
Frequency (Hz)
Figure 30. IR2110 TJ vs. Frequency (IRFBC40)
Ω , VCC = 15V
RGATE = 15Ω
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1E+5
Figure 29. IR2110 TJ vs. Frequency (IRFBC30)
Ω, VCC = 15V
RGATE = 22Ω
Figure 28. IR2110 TJ vs. Frequency (IRFBC20)
Ω , VCC = 15V
RGATE = 33Ω
0
1E+2
1E+4
Frequency (Hz)
0
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (Hz)
Figure 31. IR2110 TJ vs. Frequency (IRFPE50)
Ω, VCC = 15V
RGATE = 10Ω
11
IR2113E6
320V
150
140V
100
10V
75
50
25
100
10V
75
50
25
0
1E+2
1E+3
1E+4
1E+5
0
1E+2
1E+6
1E+3
Frequency (Hz)
125
1E+6
320V 140V 10V
150
125
10V
Junction Temperature (°C)
Junction Temperature (°C)
1E+5
Figure 33. IR2110S TJ vs. Frequency (IRFBC30)
Ω , VCC = 15V
RGATE = 22Ω
320V 140V
150
100
75
50
25
100
75
50
25
0
1E+2
1E+3
1E+4
1E+5
0
1E+2
1E+6
1E+3
Frequency (Hz)
1E+4
1E+5
1E+6
Frequency (Hz)
Figure 34. IR2110S TJ vs. Frequency (IRFBC40)
Ω, VCC = 15V
RGATE = 15Ω
Figure 35. IR2110S TJ vs. Frequency (IRFPE50)
Ω , VCC = 15V
RGATE = 10Ω
0.0
20.0
VSS Logic Supply Offset Voltage (V)
-2.0
VS Offset Supply Voltage (V)
1E+4
Frequency (Hz)
Figure 32. IR2110S TJ vs. Frequency (IRFBC20)
Ω, VCC = 15V
RGATE = 33Ω
Typ.
-4.0
-6.0
-8.0
-10.0
16.0
12.0
8.0
Typ.
4.0
0.0
10
12
14
16
18
VBS Floating Supply Voltage (V)
Figure 36. Maximum VS Negative Offset vs.
VBS Supply Voltage
12
140V
125
Junction Temperature (°C)
125
Junction Temperature (°C)
320V
150
20
10
12
14
16
18
20
VCC Fixed Supply Voltage (V)
Figure 37. Maximum VSS Positive Offset vs.
VCC Supply Voltage
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IR2113E6
Functional Block Diagram
VB
UV
DETECT
VDD
R Q
S
HIN
HV
LEVEL
SHIFT
VDD /VCC
LEVEL
SHIFT
PULSE
FILTER
PULSE
GEN
R
R
Q
HO
S
VS
SD
VCC
LIN
S
VDD /VCC
LEVEL
SHIFT
R Q
UV
DETECT
LO
DELAY
COM
VSS
Lead Definitions
Lead
Symbol Description
VDD
Logic supply
HIN
Logic input for high side gate driver output (HO), in phase
SD
Logic input for shutdown
LIN
Logic input for low side gate driver output (LO), in phase
VSS
Logic ground
VB
High side floating supply
HO
High side gate drive output
VS
High side floating supply return
VCC
Low side supply
LO
Low side gate drive output
COM
Low side return
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13
IR2113E6
Case Outline and Dimensions — Leadless Chip Carrier (LCC) Package
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Data and specifications subject to change without notice.
4/99
14
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