PD - 94946
SMPS MOSFET
Applications
l High Frequency DC-DC converters
l Lead-Free
HEXFET® Power MOSFET
VDSS
200V
Benefits
l Low Gate to Drain to Reduce Switching
Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design,(See
AN 1001)
l Fully Characterized Avalanche Voltage
and Current
IRFB31N20DPbF
IRFS31N20DPbF
IRFSL31N20DPbF
RDS(on) max
ID
0.082Ω
31A
TO-262
TO-220AB
D2Pak
IRFB31N20DPbF IRFS31N20DPbF IRFSL31N20DPbF
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
Max.
31
21
124
3.1
200
1.3
± 30
2.1
-55 to + 175
Units
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Applicable Off Line SMPS Topologies
l
Telecom 48V Input DC/DC Active Clamp Reset Forward Converter
Notes
through
www.irf.com
are on page 11
1
3/1/04
IRFB/S/SL31N20DPbF
Static @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
V(BR)DSS
∆V(BR)DSS/∆TJ
Min.
200
–––
–––
3.0
–––
–––
–––
–––
Typ.
–––
0.25
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.082
Ω
VGS = 10V, ID = 18A
5.5
V
VDS = VGS, ID = 250µA
25
VDS = 200V, VGS = 0V
µA
250
VDS = 160V, VGS = 0V, TJ = 150°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
17
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
RθJC
RθCS
RθJA
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Junction-to-Ambient
Typ.
–––
70
18
33
16
38
26
10
2370
390
78
2860
150
170
Max. Units
Conditions
–––
S
VDS = 50V, ID = 18A
107
ID = 18A
23
nC
VDS = 160V
65
VGS = 10V
–––
VDD = 100V
–––
ID = 18A
ns
–––
RG = 2.5Ω
–––
RD = 5.4Ω,
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 160V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 160V
Typ.
Max.
Units
–––
–––
–––
420
18
20
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
–––
0.75
–––
62
40
Thermal Resistance
Parameter
°C/W
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
31
––– –––
showing the
A
G
integral reverse
––– ––– 124
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 18A, VGS = 0V
––– 200 300
ns
TJ = 25°C, IF = 18A
––– 1.7 2.6
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFB/S/SL31N20DPbF
1000
1000
VGS
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
BOTTOM 5.5V
100
100
10
1
5.5V
0.1
0.1
20µs PULSE WIDTH
TJ = 25 °C
1
10
10
5.5V
3.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
100
TJ = 175 ° C
10
TJ = 25 ° C
1
V DS = 50V
20µs PULSE WIDTH
6
7
8
9
10
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
1000
VGS , Gate-to-Source Voltage (V)
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
5
20µs PULSE WIDTH
TJ = 175 °C
1
0.1
100
VDS , Drain-to-Source Voltage (V)
0.1
VGS
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
BOTTOM 5.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
11
ID = 30A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFB/S/SL31N20DPbF
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
10000
Ciss
1000
Coss
100
Crss
VGS , Gate-to-Source Voltage (V)
20
100000
10
100
VDS = 160V
VDS = 100V
VDS = 40V
16
12
8
4
10
1
ID = 18A
0
1000
FOR TEST CIRCUIT
SEE FIGURE 13
0
20
VDS, Drain-to-Source Voltage (V)
1000
ISD , Reverse Drain Current (A)
60
80
100
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
I D , Drain Current (A)
100
TJ = 175 ° C
10
TJ = 25 ° C
1
0.1
0.2
V GS = 0 V
0.4
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
40
QG , Total Gate Charge (nC)
1.2
100
10us
100us
10
1ms
1
TC = 25 ° C
TJ = 175° C
Single Pulse
1
10ms
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFB/S/SL31N20DPbF
30
VGS
25
ID , Drain Current (A)
RD
V DS
D.U.T.
RG
+
-VDD
20
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15
Fig 10a. Switching Time Test Circuit
10
VDS
5
0
90%
25
50
75
100
125
150
TC , Case Temperature ( °C)
175
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
PDM
0.05
t1
0.02
0.01
0.01
0.00001
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB/S/SL31N20DPbF
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
tp
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS , Single Pulse Avalanche Energy (mJ)
1000
15V
TOP
800
BOTTOM
ID
7.3A
15A
18A
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
10 V
50KΩ
12V
QGS
.2µF
.3µF
QGD
D.U.T.
VG
+
V
- DS
VGS
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFB/S/SL31N20DPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFB/S/SL31N20DPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
10.54 (.415)
10.29 (.405)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
4- DRAIN
14.09 (.555)
13.47 (.530)
1.40 (.055)
1.15 (.045)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- SOURCE
3- EMITTER
4 - DRAIN
HEXFET
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010
L OT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y L INE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
8
PAR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
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IRFB/S/SL31N20DPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 5 3 0 S W IT H
L OT COD E 80 2 4
AS S E M B L E D ON W W 0 2, 20 00
IN T H E AS S E M B L Y L IN E "L "
IN T E R N AT IO N AL
R E C T IF IE R
L OGO
N ote: "P " in as s em bly lin e
po s itio n in dicates "L ead-F r ee"
P AR T N U M B E R
F 5 30 S
AS S E M B L Y
L O T CO D E
D AT E C O D E
Y E AR 0 = 2 0 0 0
W E E K 02
L IN E L
OR
IN T E R N AT IO N AL
R E C T IF IE R
L O GO
AS S E M B L Y
L OT COD E
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P AR T N U M B E R
F 530S
D AT E CO D E
P = D E S IG N AT E S L E AD -F R E E
P R O D U C T (O P T IO N AL )
Y E AR 0 = 2 0 0 0
W E E K 02
A = AS S E M B L Y S IT E CO D E
9
IRFB/S/SL31N20DPbF
TO-262 Package Outline
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789
AS SEMBLED ON WW 19, 1997
IN T HE ASS EMBLY LINE "C"
Note: "P" in as s embly line
pos ition indicates "Lead-Free"
INT ERNAT IONAL
RECT IFIER
LOGO
ASS EMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 7 = 1997
WEEK 19
LINE C
OR
INT ERNAT IONAL
RECT IFIER
LOGO
AS S EMBLY
LOT CODE
10
PART NUMBER
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
WEEK 19
A = AS S EMBLY S ITE CODE
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IRFB/S/SL31N20DPbF
D2Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
4
3
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 3.8mH
RG = 25Ω, IAS = 18A.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 18A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS,
This is only applied to TO-220AB package
TJ ≤ 175°C
This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/04
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11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/