ISL83385E TM Data Sheet January 2001 15kV ESD Protected, +3V to +5.5V, +/-1 Microamp, 250kbps, RS-232 Transmitters/Receivers File Number 6001 Features • ESD Protection for RS-232 I/O Pins to ±15kV (IEC1000) The Intersil ISL83385E contains 3.0V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Targeted applications are PDAs, Palmtops, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. Efficient on-chip charge pumps, coupled with a manual powerdown function reduces the standby supply current to a 1µA trickle. Small footprint packaging, and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are guaranteed at worst case load conditions. This device is fully compatible with 3.3V only systems, mixed 3.3V and 5.0V systems, and 5.0V only systems. • Low Power, Pin Compatible Upgrade for MAX3385E • Single SHDN Pin Disables Transmitters • Receivers Active in Powerdown • Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V • Latch-Up Free • On-Chip Voltage Converters Require Only Four External 0.1µF Capacitors • Receiver Hysteresis For Improved Noise Immunity • Very Low Supply Current . . . . . . . . . . . . . . . . . . . . 0.3mA • Guaranteed Minimum Data Rate . . . . . . . . . . . . 250kbps • Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs The single pin powerdown function (SHDN = 0) disables all the transmitters, while shutting down the charge pump to minimize supply current drain. • Wide Power Supply Range. . . . . . . . Single +3V to +5.5V Table 1 summarizes the features of the ISL83385E, while Application Note AN9863 summarizes the features of each device comprising the 3V RS-232 family. Applications Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. ISL83385ECB 0 to 70 18 Ld SOIC M18.3 ISL83385ECB-T 0 to 70 Tape and Reel M18.3 ISL83385ECA 0 to 70 20 Ld SSOP M20.209 ISL83385ECA-T 0 to 70 Tape and Reel M20.209 ISL83385EIB -40 to 85 18 Ld SOIC M18.3 ISL83385EIB-T -40 to 85 Tape and Reel M18.3 ISL83385EIA -40 to 85 20 Ld SSOP M20.209 ISL83385EIA-T -40 to 85 Tape and Reel M20.209 • Low Supply Current in Powerdown State . . . . . . . . . <1µA • Any System Requiring RS-232 Communication Ports - Battery Powered, Hand-Held, and Portable Equipment - Laptop Computers, Notebooks, Palmtops - Modems, Printers and other Peripherals - Digital Cameras - Cellular/Mobile Phones TABLE 1. SUMMARY OF FEATURES PART NUMBER ISL83385E NO. OF NO. OF Tx. Rx. 2 2 1 NO. OF MONITOR Rx. (ROUTB) DATA RATE (kbps) Rx. ENABLE FUNCTION? READY OUTPUT? MANUAL POWERDOWN? AUTOMATIC POWERDOWN FUNCTION? 0 250 NO NO YES NO CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2001 ISL83385E Pinouts ISL83385E (SOIC) TOP VIEW ISL83385E (SSOP) TOP VIEW 18 SHDN NC 1 C1+ 2 17 VCC 3 16 GND V+ C1- 4 15 T1OUT C2+ 5 14 R1IN C2- 6 13 R1OUT V- 7 12 T1IN T2OUT 8 11 T2IN NC 1 C1+ 2 19 VCC 3 18 GND V+ 10 R2OUT R2IN 9 C1- 4 17 T1OUT C2+ 5 16 R1IN C2- 6 15 R1OUT V- 7 14 T1IN T2OUT 8 13 T2IN R2IN 9 NC 10 Pin Descriptions PIN VCC FUNCTION System power supply input (3.0V to 5.5V). V+ Internally generated positive transmitter supply (+5.5V). V- Internally generated negative transmitter supply (-5.5V). GND Ground connection. C1+ External capacitor (voltage doubler) is connected to this lead. C1- External capacitor (voltage doubler) is connected to this lead. C2+ External capacitor (voltage inverter) is connected to this lead. C2- External capacitor (voltage inverter) is connected to this lead. TIN TTL/CMOS compatible transmitter Inputs. TOUT RIN ±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs. ±15kV ESD Protected, RS-232 compatible receiver inputs. ROUT TTL/CMOS level receiver outputs. SHDN Active low input to shut down transmitters and on-board power supply, to place device in low power mode. 2 20 SHDN 12 R2OUT 11 NC ISL83385E Typical Operating Circuit ISL83385E (NOTE 2) C3 (OPTIONAL CONNECTION, NOTE 1) C1 0.1µF C2 0.1µF T1IN T2IN TTL/CMOS LOGIC LEVELS R1OUT + 0.1µF 2 + 4 5 + 6 + +3.3V to +5V 17 C1+ VCC 3 V+ C1C2+ 12 11 7 V- C2- + T1 15 T2 14 9 10 R2IN 5kΩ R2 SHDN GND 16 3 R1IN 5kΩ R2OUT 2. Pin numbers refer to SOIC package. T1OUT T2OUT R1 1. The negative terminal of C3 can be connected to either VCC or Gnd. C4 0.1µF 8 13 NOTES: + C3 0.1µF 18 VCC RS-232 LEVELS ISL83385E Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Input Voltages TIN, SHDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table Thermal Resistance (Typical, Note 3) θJA (oC/W) 18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 125 Moisture Sensitivity (see Technical Brief TB363) All Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC, SSOP - Lead Tips Only) Operating Conditions Temperature Range ISL83385ECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC ISL83385EIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = 25oC PARAMETER TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS DC CHARACTERISTICS Supply Current, Enabled All Outputs Unloaded, SHDN = VCC, VCC = 3.15V 25 - 0.3 1 mA Supply Current, Powerdown SHDN = GND 25 - 1 10 µA Full - - 0.8 V VCC = 3.3V Full 2.0 - - V VCC = 5.0V Full 2.4 - - V 25 - 0.5 - V TIN, SHDN Full - ±0.01 ±1.0 µA Output Voltage Low IOUT = 1.6mA Full - - 0.4 V Output Voltage High IOUT = -1.0mA Full - V LOGIC AND TRANSMITTER INPUTS Input Logic Threshold Low TIN, SHDN Input Logic Threshold High TIN, SHDN Transmitter Input Hysteresis Input Leakage Current RECEIVER OUTPUTS VCC -0.6 VCC -0.1 RECEIVER INPUTS Input Voltage Range Full -25 - 25 V VCC = 3.3V 25 0.6 1.2 - V VCC = 5.0V 25 0.8 1.5 - V VCC = 3.3V 25 - 1.5 2.4 V VCC = 5.0V 25 - 1.8 2.4 V Input Hysteresis 25 - 0.5 - V Input Resistance 25 3 5 7 kΩ Input Threshold Low Input Threshold High TRANSMITTER OUTPUTS Output Voltage Swing All Transmitter Outputs Loaded with 3kΩ to Ground Full ±5.0 ±5.4 - V Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M - Ω Full - ±35 ±60 mA Output Short-Circuit Current 4 ISL83385E Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = 25oC (Continued) TEMP (oC) MIN TYP MAX UNITS VOUT = ±12V, VCC = 0V or 3V to 5.5V, SHDN = GND Full - - ±25 µA Maximum Data Rate RL = 3kΩ, CL = 1000pF, One Transmitter Switching Full 250 500 - kbps Receiver Propagation Delay Receiver Input to Receiver Output, CL = 150pF tPHL 25 - 0.15 - µs tPLH 25 - 0.15 - µs PARAMETER TEST CONDITIONS Output Leakage Current TIMING CHARACTERISTICS Transmitter Output Enable Time From SHDN Rising Edge to TOUT = ±3.7V 25 - 100 - µs Transmitter Skew tPHL - tPLH (Note 4) 25 - 100 - ns Receiver Skew tPHL - tPLH 25 - 50 - ns Transition Region Slew Rate RL = 3kΩ to 7kΩ, CL = 150pF to 1000pF Measured From 3V to -3V or CL = 150pF to 2500pF -3V to 3V, VCC = 3.3V 25 6 - 30 V/µs 25 4 - 30 V/µs Human Body Model 25 - ±15 - kV IEC1000-4-2 Air Gap Discharge 25 - ±15 - kV IEC1000-4-2 Contact Discharge 25 - ±8 - kV Human Body Model 25 - ±3 - kV ESD PERFORMANCE RS-232 Pins (TOUT, RIN) All Other Pins NOTE: 4. Transmitter skew is measured at the transmitter zero crossing points. Detailed Description The ISL83385E operates from a single +3V to +5.5V supply, guarantees a 250kbps minimum data rate, requires only four small external 0.1µF capacitors, features low power consumption, and meets all ElA RS-232C and V.28 specifications. The circuit is divided into three sections: The charge pump, the transmitters, and the receivers. Charge-Pump Intersil’s new ISL83385E utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate ±5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows these devices to maintain RS-232 compliant output levels over the ±10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1µF capacitors for the voltage doubler and inverter functions over the full VCC range; other capacitor combinations can be used as shown in Table 3. The charge pumps operate discontinuously (i.e., they turn off as soon as the V+ and V- supplies are pumped up to the nominal values), resulting in significant power savings. these transmitters deliver true RS-232 levels over a wide range of single supply system voltages. All transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see Table 2). These outputs may be driven to ±12V when disabled. All devices guarantee a 250kbps data rate for full load conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one transmitter operating at full speed. Under more typical conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one transmitter easily operates at 900kbps. Transmitter inputs float if left unconnected (there are no pullup resistors), and may cause ICC increases. Connect unused inputs to GND for the best performance. TABLE 2. POWERDOWN TRUTH TABLE SHDN TRANSMITTER RECEIVER INPUT OUTPUTS OUTPUTS MODE OF OPERATION H Active Active Normal Operation L High-Z Active Manual Powerdown Transmitters Receivers The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232 output levels. Coupled with the on-chip ±5.5V supplies, The ISL83385E contains standard inverting receivers that convert RS-232 signals to CMOS output levels and accept inputs up to ±30V while presenting the required 3kΩ to 7kΩ input impedance (see Figure 1) even if the power is off 5 ISL83385E (VCC = 0V). The receivers’ Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. VCC RXIN RXOUT -25V ≤ VRIN ≤ +25V GND ≤ VROUT ≤ VCC 5kΩ GND FIGURE 1. INVERTING RECEIVER CONNECTIONS Low Power Operation This 3V device requires a nominal supply current of 0.3mA, even at VCC = 5.5V, during normal operation (not in powerdown mode). This is considerably less than the 11mA current required by comparable 5V RS-232 devices, allowing users to reduce system power simply by replacing the old style device with the ISL83385E in new designs. Powerdown Functionality The already low current requirement drops significantly when the device enters powerdown mode. In powerdown, supply current drops to 1µA, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter outputs tristate. This micro-power mode makes these devices ideal for battery powered and portable applications. Software Controlled (Manual) Powerdown The ISL83385E may be forced into its low power, standby state via a simple shutdown (SHDN) pin (see Figure 2). Driving this pin high enables normal operation, while driving it low forces the IC into it’s powerdown state. The time required to exit powerdown, and resume transmission is less than 100µs. Connect SHDN to VCC if the powerdown function isn’t needed. SHDN PWR MGT LOGIC Capacitor Selection These charge pumps only require 0.1µF capacitors for the full operational voltage range. Table 3 lists other acceptable capacitor values for various supply voltage ranges. Do not use values smaller than those listed in Table 3. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor’s equivalent series resistance (ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-. TABLE 3. REQUIRED CAPACITOR VALUES VCC (V) C1 (µF) C2, C3, C4 (µF) 3.0 to 3.6 0.1 0.1 4.5 to 5.5 0.047 0.33 3.0 to 5.5 0.1 0.47 Power Supply Decoupling In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are particularly sensitive to power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect the bypass capacitor as close as possible to the IC. Transmitter Outputs when Exiting Powerdown Figure 3 shows the response of two transmitter outputs when exiting powerdown mode. As they activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients. Each transmitter is loaded with 3kΩ in parallel with 2500pF. Note that the transmitters enable only when the magnitude of the supplies exceed approximately 3V. 5V/DIV SHDN T1 ISL83385E 2V/DIV I/O UART CPU T2 VCC = +3.3V C1 - C4 = 0.1µF TIME (20µs/DIV.) FIGURE 2. CONNECTIONS FOR MANUAL POWERDOWN 6 FIGURE 3. TRANSMITTER OUTPUTS WHEN EXITING POWERDOWN ISL83385E High Data Rates The ISL83385E maintains the RS-232 ±5V minimum transmitter output voltages even at high data rates. Figure 4 details a transmitter loopback test circuit, and Figure 5 illustrates the loopback test result at 120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at 120kbps. Figure 6 shows the loopback results for a single transmitter driving 1000pF and an RS-232 load at 250kbps. The static transmitter was also loaded with an RS-232 receiver. 5V/DIV. T1IN T1OUT R1OUT VCC = +3.3V C1 - C4 = 0.1µF VCC + 0.1µF 2µs/DIV. FIGURE 6. LOOPBACK TEST AT 250kbps + C1+ VCC V+ C1 C1- + C3 ISL83385E + V- C2+ C2 C4 + C2TIN TOUT RIN ROUT Interconnection with 3V and 5V Logic The ISL83385E directly interfaces with most 5V logic families, including ACT and HCT CMOS. See Table 4 for more information on possible combinations of interconnections. 1000pF TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES 5k VCC SHDN FIGURE 4. TRANSMITTER LOOPBACK TEST CIRCUIT 5V/DIV. T1IN SYSTEM POWER-SUPPLY VOLTAGE (V) VCC SUPPLY VOLTAGE (V) 3.3 3.3 5 5 5 3.3 COMPATIBILITY Compatible with all CMOS families. Compatible with all TTL and CMOS logic families. Compatible with ACT and HCT CMOS, and with TTL. Incompatible with AC, HC, or CD4000 CMOS. ±15kV ESD Protection T1OUT R1OUT VCC = +3.3V C1 - C4 = 0.1µF 5µs/DIV. FIGURE 5. LOOPBACK TEST AT 120kbps 7 All pins on the 3V interface devices include ESD protection structures, but the ISL83385E incorporates advanced structures which allow the RS-232 pins (transmitter outputs and receiver inputs) to survive ESD events up to ±15kV. The RS-232 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and don’t interfere with RS-232 signals as large as ±25V. ISL83385E Human Body Model (HBM) Testing As the name implies, this test method emulates the ESD event delivered to an IC during human handling. The tester delivers the charge through a 1.5kΩ current limiting resistor, making the test less severe than the IEC-1000 test which utilizes a 330Ω limiting resistor. The HBM method determines an ICs ability to withstand the ESD transients typically present during handling and manufacturing. Due to the random nature of these events, each pin is tested with respect to all other pins. The RS-232 pins on “E” family devices can withstand HBM ESD events to ±15kV. IEC1000-4-2 Testing the HBM test. The extra ESD protection built into this device’s RS-232 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the RS-232 port. AIR-GAP DISCHARGE TEST METHOD For this test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. The “E” device RS-232 pins withstand ±15kV air-gap discharges. CONTACT DISCHARGE TEST METHOD The IEC 1000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than Typical Performance Curves During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than ±8kV. All “E” family devices survive ±8kV contact discharges on the RS-232 pins. VCC = 3.3V, TA = 25oC 25 VOUT+ 4.0 20 SLEW RATE (V/µs) TRANSMITTER OUTPUT VOLTAGE (V) 6.0 2.0 1 TRANSMITTER AT 250kbps 1 TRANSMITTER AT 30kbps 0 -2.0 15 -SLEW +SLEW 10 VOUT - -4.0 -6.0 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) FIGURE 7. TRANSMITTER OUTPUT VOLTAGE vs LOAD CAPACITANCE 8 5 0 1000 2000 3000 4000 LOAD CAPACITANCE (pF) FIGURE 8. SLEW RATE vs LOAD CAPACITANCE 5000 ISL83385E Typical Performance Curves VCC = 3.3V, TA = 25oC (Continued) 45 3.5 40 3.0 35 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 250kbps NO LOAD ALL OUTPUTS STATIC 30 25 120kbps 20 15 20kbps 10 2.5 2.0 1.5 1.0 0.5 5 0 0 1000 2000 3000 4000 5000 0 2.5 3.0 3.5 FIGURE 9. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA PASSIVATION 100 mils x 100 mils (2540µm x 2540µm) METALLIZATION Type: Silox Thickness: 13kÅ TRANSISTOR COUNT Type: Metal 1: AISi(1%) Thickness: Metal 1: 8kÅ Type: Metal 2: AISi (1%) Thickness: Metal 2: 10kÅ 338 PROCESS Si Gate CMOS SUBSTRATE POTENTIAL (POWERED UP) Floating 9 4.5 5.0 5.5 FIGURE 10. SUPPLY CURRENT vs SUPPLY VOLTAGE Die Characteristics DIE DIMENSIONS 4.0 SUPPLY VOLTAGE (V) LOAD CAPACITANCE (pF) 6.0 ISL83385E Small Outline Plastic Packages (SOIC) M18.3 (JEDEC MS-013-AB ISSUE C) 18 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE N INDEX AREA H 0.25(0.010) M B M INCHES E -B1 2 3 L SEATING PLANE -A- h x 45o A D -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 10 SYMBOL MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.4469 0.4625 11.35 11.75 3 E 0.2914 0.2992 7.40 7.60 4 e α MILLIMETERS 0.050 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N α 18 0o 18 8o 0o 7 8o Rev. 0 12/93 ISL83385E Shrink Small Outline Plastic Packages (SSOP) M20.209 (JEDEC MO-150-AE ISSUE B) N 20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES E GAUGE PLANE -B1 2 3 L 0.25 0.010 SEATING PLANE -A- A D -C- α e B C 0.10(0.004) 0.25(0.010) M C A M SYMBOL MIN MAX MIN MAX NOTES A - 0.078 - 2.00 - A1 0.002 - 0.05 - - A2 0.065 0.072 1.65 1.85 - B 0.009 0.014 0.22 0.38 9 C 0.004 0.009 0.09 0.25 - D 0.272 0.295 6.90 7.50 3 E 0.197 0.220 5.00 5.60 4 e A2 A1 B S 0.026 BSC H 0.292 L 0.022 N NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. MILLIMETERS α 0.65 BSC 0.322 7.40 0.037 0.55 20 0o - 0.95 6 20 8o 0o - 8.20 7 8o Rev. 2 4/95 All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at website www.intersil.com/quality/iso.asp. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. 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