TECHNICAL DATA KK4066B Quad Bilateral Switch High-Voltage Silicon-Gate CMOS The KK4066B is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals. In addition, the on-state resistance is relatively constant over the full input-signal range. The KK4066B consists of four independent bilateral switches. A single control signal is required per switch. Both the p and the n device in a given switch are biased on or off simultaneously by the control signal.(As show in Fig.1.)The well of the n-channel device on each switch is either tied to the input when the switch is on or to GND when the switch is off. This configuration eliminates the variation of the switch-transistor threshold voltage with input signal, and thus keeps the on-state resistance low over the full operating-signal range. The advantages over single-channel switches include peak inputsignal voltage swings equal to the full supply voltage, and more constant on-state impedance over the input-signal range. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature • range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply ORDERING INFORMATION KK4066BN Plastic KK4066BD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE On/Off Control Input State of Analog Switch L Off H On PIN 14 =VCC PIN 7 = GND 1 KK4066B MAXIMUM RATINGS* Symbol Parameter Value Unit -0.5 to +20 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V VOUT IIN DC Input Current, per Pin ±10 mA PD Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ 750 500 mW PD Power Dissipation per Output Transistor 100 mW -65 to +150 °C 260 °C Tstg TL Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min Max Unit 3.0 18 V 0 VCC V -55 +125 °C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK4066B DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC V ≥-55°C 25 °C ≤125 °C Unit Symbol Parameter VIH Minimum High-Level Voltage ON/Off Control Inputs RON= Per Spec 5.0 10 15 VIL Minimum Low-Level Voltage ON/Off Control Inputs RON = Per Spec 5.0 10 15 1 2 2 1 2 2 1 2 2 V IIN Maximum Input Leakage Current, ON/OFF Control Inputs VIN = VCC or GND 18 ±0.1 ±0.1 ±1.0 µA ICC Maximum Quiescent Supply Current (per Package) VIN = VCC or GND 5.0 10 15 20 0.25 0.5 1 5 0.25 0.5 1 5 7.5 15 30 150 µA RON Maximum “ON” Resistance VC= VCC RL=10 kΩ returned V - GND to CC 2 VIS= GND to VCC 5.0 10 15 800 310 200 1050 400 240 1300 550 320 Ω Maximum Difference in “ON” Resistance Between Any Two Channels in the Same Package VC= VCC RL=10 kΩ 5.0 10 15 - 15 10 5 - Ω IOFF Maximum OffChannel Leakage Current, Any One Channel VC= 0 V VIS=18 V; VOS= 0 V VIS=0 V; VOS= 18V 18 ±0.1 ±0.1 ±1.0 µA ION Maximum OnChannel Leakage Current, Any One Channel VC= 0 V VIS=18 V; VOS= 0 V VIS=0 V; VOS= 18V 18 ±0.1 ±0.1 ±1.0 µA ∆RON Test Conditions Guaranteed Limit 3.5(Min) 7(Min) 11(Min) V 3 KK4066B AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns) Guaranteed Limit VCC Symbol Parameter V ≥-55°C 25°C ≤125°C Unit tPLH, tPHL Maximum Propagation Delay, Analog Input to Analog Output (Figure 2) 5.0 10 15 40 20 15 40 20 15 80 40 30 ns tPLZ, tPHZ, tPZL, tPZH Maximum Propagation Delay, ON/OFF Control to Analog Output (Figure 3) 5.0 10 15 70 40 30 70 40 30 140 80 60 ns C Maximum Capacitance ON/OFF Control Input Control Input = GND Analog I/O Feedthrough pF 15 7.5 0.6 ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) Symbol * Parameter Test Conditions VCC Limit* V 25°C Unit THD Total Harmonic Distortion VC = VCC , GND = -5 V RL = 10 kΩ, fIS =1 kHz sine wave 5 0.4 % BW Maximum OnChannel Bandwidth or Minimum Frequency Response VC = VCC , GND = -5 V RL = 1 kΩ 5 40 MHz BW Maximum OnChannel Bandwidth or Minimum Frequency Response VC = GND , VIS = 5 V RL = 1 kΩ 10 1 MHz BW Maximum OnChannel Bandwidth or Minimum Frequency Response VC (A) = VCC = 5 V VC (B) = GND = -5 V VIS (A) = 5 VP - P ,50 Ω source RL = 1 kΩ 5 8 MHz - Cross talk (Control Input to Signal Output) VC= 10 V tr, tf = 20 ns RL = 10 kΩ 10 50 mV - Maximum Control Input Repetition Rate VIS= VCC, RL = 1 kΩ CL = 50 pF VC= 10 V (square wave centered on 5 V) tr, tf = 20 ns, VOS= 1/2 VOS @1 kHz 5 10 15 6 9 9.5 MHz Guaranteed limits not tested. Determined by design and verified by qualification. 4 KK4066B Switch Input Switch Output, IIS (mA) VOS (V) VCC (V) VIS (V) -55 °C +25 °C +125 °C Min Max 5 5 0 5 0.64 -0.64 0.51 -0.51 0.36 -0.36 4.6 0.4 - 10 10 0 10 1.6 -1.6 1.3 -1.3 0.9 -0.9 9.5 0.5 - 15 15 0 15 4.2 -4.2 3.4 -3.4 2.4 -2.4 13.5 1.5 - GND ≤ VIS ≤ VCC Figure 1. Schematic diagram of 1 of 4 identical switches and its associated control circuitry. 5 KK4066B Figure 2. Switching Waveforms Figure 3. Switching Waveforms EXPANDED LOGIC DIAGRAM (1/4 of the Device) Control Switch GND = L OFF VCC = H ON 6 KK4066B N SUFFIX PLASTIC DIP (MS - 001AA) A 8 14 B Dimensions, mm 7 1 F L -T- SEATING PLANE M K G H D MIN MAX A 18.67 19.69 B 6.10 7.11 C C N Symbol J 5.33 D 0.36 0.56 F 1.14 1.78 G 2.54 H 7.62 J 0° 10° K 2.92 3.81 L 7.62 8.26 M 0.20 0.36 N 0.38 0.25 (0.010) M T NOTES: 1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D SUFFIX SOIC (MS - 012AB) Dimensions, mm A 14 8 H B 1 G P 7 R x 45 C -TK D SEATING PLANE J F 0.25 (0.010) M T C M NOTES: 1.Dimensions A and B do not include mold flash or protrusion. 2.Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B - 0.25 mm (0.010) per side. M Symbol. MIN MAX A 8.55 8.75 B 3.80 4.00 C 1.35 1.75 D 0.33 0.51 F 0.40 1.27 G 1.27 H 5.72 J 0° 8° K 0.10 0.25 M 0.19 0.25 P 5.80 6.20 R 0.25 0.50 7