Sanyo LA74308LP Audio interface for dsc Datasheet

Ordering number : ENA0898A
LA74308LP
Monolithic Linear IC
Audio Interface for DSC
Overview
The LA74308LP is a SPEAKER AMP and MIC AMP built-in audio interface for DSC.
It incorporates an 8/16kHz trap and supports CODECs with a sampling rate of 8kHz or 16kHz.
Features
• Three-wire type SERIAL communication
• MIC AMP
• MIC power supply incorporated (with built-in pull-up resistor)
• ALC AMP
• 4th order LPF + trap (compatible with REC/PB changeover, trap frequency selectable from 8kHz and 16kHz)
• SPEAKER AMP (The BEEP signal can be mixed.)
• Electronic VOLUME (controlled by serial communication)
• LINE output (with SERIAL MUTE and MUTE transistor)
• STANDBY control
Specifications
Maximum Ratings at Ta=25°C
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
VCC max
Allowable power dissipation
Pd max
Operating temperature
Topr
-10 to +85
°C
Storage temperature
Tstg
-55 to +150
°C
Ta≤85°C *
5.0
V
500
mW
* Printed circuit board mounting condition (40mm × 50mm × 0.8mm: glass epoxy) 2S2P (Four layers printed circuit board)
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
51408 TI IM / 82907 TI IM 20060927-S00005 No.A0898-1/16
LA74308LP
Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended operating voltage
Allowable operating voltage range
Conditions
Ratings
Unit
VCCA
3.0
V
VCCSP
3.3
V
2.7 to 3.6
V
2.7 to 3.6
V
VCCAop
VCCSPop
Take care not to exceed Pd max.
Electrical Characteristics at Ta=25°C, VCCA=3.0V, VCCSP=3.3V, f=1kHz, with the VREF capacitance charging
circuit in the OFF MODE
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Circuit current
VCCA current dissipation at no
signal 1
ICCA1
VCCA=3.0V:REC BLOCK(MIC/ALC/REC AMP)
POWER SAVE MODE
VCCA current dissipation at no
signal 2
ICCA2
VCCA=3.0V, LINE/SP AMP POWER SAVE MODE
VCCA standby current dissipation 1
ICCAS1
VCCA=3.0V, during standby control V3=0V
VCCA standby current dissipation 2
ICCAS2
VCCA=3.0V, BIAS MODE
VCCSP current dissipation at no
signal 1
ICCS1
VCCSP=3.3V, SPK POWER ON MODE
VCCSP current dissipation at no
signal 2
ICCS2
VCCSP=3.3V, SPK POWER SAVE MODE
VCCSP standby current dissipation 1
ICCSS1
VCCSP standby current dissipation 2
ICCSS2
4.9
6.6
8.3
mA
6.2
8.3
10.4
mA
1
μA
800
μA
2
4
mA
0.05
0.1
mA
VCCSP=3.3V, during standby control
(0V applied to pin 3)
9
μA
VCCSP=3.3V, BIAS MODE
9
μA
-9.5
-8
dBV
0.1
0.2
1
REC output system
REC reference output LEVEL
VOR
ALC IN, VIN=-53dBV
REC reference output distortion
HDR1
ALC IN, VIN=-53dBV, THD: from 2nd to 5th harmonic
ALC characteristics
ALM
ALC IN, VIN=-20dBV
ALC distortion
ALMD
ALC IN, VIN=-20dBV, THD: from 2nd to 5th harmonic
ALC IN max input level
VINRMX
ALC IN LEVEL at which REC output THD
-11
-3
-1.8
0.3
1
%
-7
dBV
-70
-60
dBV
-9.5
-8
dBV
(from 2nd to 5th harmonic) becomes 3% or less.
REC output noise voltage
VNOR
ALC IN, no input, JIS-A Filter
%
dBV
LINE output system (LINE load = as measured at the 22kΩ end)
LINE reference output LEVEL
VOL
PB IN, VIN=-17dBV
LINE reference output distortion
HDL
PB IN, VIN=-17dBV, THD: from 2nd to 5th harmonic
0.1
0.2
%
LINE reference output noise voltage
VNOL
PB IN, no input, JIS-A Filter
-77
-69
dBV
PB IN max input LEVEL
VINPMX
-9
dBV
-11
PB IN LEVEL at which LINE output THD
(from 2nd to 5th harmonic) becomes 1% or less.
LINE output frequency
FEQP1
PB IN, VIN=-10dBV, comparison of f=3kHz/1kHz
FEQP2
PB IN, VIN=-10dBV, comparison of f=4kHz/1kHz
FEQP3
PB IN, VIN=-10dBV, comparison of f=8kHz/1kHz
characteristics 1
LINE output frequency
-3.5
characteristics 2
LINE output frequency
characteristics 3
-2
dB
-10
-6
dB
-55
-30
dB
-3
0
dBV
0.4
1
%
-12
-6
dBV
-80
-70
dBV
-70
-64
dBV
SP output system (SP load = as measured at the 8Ω end)
SP reference output LEVEL1
VOSP1
PB IN, VIN=-17dBV, Vol=MAX (EVR DATA=31)
SP reference output distortion
THDSP
PB IN, VIN=-17dBV, Vol=MAX,
THD: from 2nd to 5th harmonic
SP reference output LEVEL2
VOSP2
PB IN, VIN=-17dBV, Vol=TYP (EVR DATA=14)
VOSP3
PB IN, VIN=-17dBV,Vol=MIN (EVR DATA=0)
JIS-A Filter
SP reference output noise voltage
VNOSP
PB IN no input, Vol=MAX, JIS-A Filter
SP maximum ratings output
VOMSP
PB IN, Vol=MAX, LEVEL at which THD=10%
(Vol.MAX)
(Vol.TYP)
SP reference output LEVEL3
(Vol.MIN)
-6
-18
200
320
mW
Continued on next page.
No.A0898-2/16
LA74308LP
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
MIC output system
MIC voltage gain
VGMIC
MIC IN, VIN=-36dBV
MIC output distortion
HDMIC
MIC IN, VIN=-36dBV, THD: from 2nd to 5th harmonic
MIC output noise voltage
VNOMIC
MIC IN, no input, JIS-A Filter
MIC IN max input level
VINMMX
16
17
18
0.05
0.1
%
-94
-83
dBV
-25
dBV
1.9
V
MIC IN LEVEL at which the MIC output THD
(from 2nd to 5th harmonic) becomes 3% or less.
MIC VCC output voltage
VMIC
At 6.2kΩ load
1.5
1.7
dB
Control system
Serial CLOCK frequency
FCLK
Serial input LOW level
SERLO
Serial input HIGH level
SERHI
0.1
1
MHz
0
0.7
V
2.3
3.5
V
Package Dimensions
unit : mm (typ)
3321
BOTTOM VIEW
TOP VIEW
13
18
0.4
24
0.75
19
12
3.5
0.35
0.35
3.5
7
6
1
0.2
0.75
0.85MAX
0.0NOM
TOP VIEW
SANYO : VQLP24(3.5X3.5)
No.A0898-3/16
LA74308LP
Description of the Content of Serial Communication
DATA No.
LSB
Default
LINE MUTE Tr.
0:OFF, 1:ON
1
1
VREF capacitance charging circuit SW
0:OFF, 1:ON
1
2
MIC AMP POWER SW
0:ON, 1:OFF
1
3
ALC AMP POWER SW
0:ON, 1:OFF
1
4
REC/PB changeover SW
0:PB, 1:REC
0
5
LPF characteristics (TRAP) changeover SW
0:16kHz, 1:8kHz
1
6
REC AMP POWER SW
0:ON, 1:OFF
1
7
LINE OUT POWER SW
0:ON, 1:OFF
1
8
LINE MUTE SW
0:OFF, 1:ON
1
9
SPK POWER SW
0:ON, 1:OFF
1
10
DATA=1
1 1 1 1 1:VOL MAX
0
11
DATA=2
∼
MSB
Parameter
0
0
12
DATA=4
13
DATA=8
14
DATA=16
15
BIAS MODE
0 0 0 0 0:VOL MIN (MUTE)
* EVR setting (the numeral shown in the left is decimal.
For characteristics, see P12.)
0
0
0
0:ACTIVE MODE, 1:BIAS MODE
0
Serial Transmission Timing
VIH
VIL
CS
tCS
tWH tWL
fMAX
tCH
tWC
VIH
CLOCK
VIL
tDS
tDH
VIH
DATA
VIL
LSB
• fMAX
• tWL
• tWH
• tCS
• tCH
• tDS
• tDH
• tWC
• VIH
• VIL
MSB
(Max clock frequency)
(Clock pulse width: Low)
(Clock pulse width: High)
(Chip enable setup time)
(Chip enable hold time)
(Data setup time)
(Data hold time)
(Chip enable pulse width)
(High voltage lower limit)
(Low voltage upper limit)
1.0MHz
500ns or more
500ns or more
500ns or more
500ns or more
500ns or more
500ns or more
500ns or more
2.3V to 3.5V
0.0V to 0.7V
No.A0898-4/16
LA74308LP
POWER ON RESET Condition (SERIAL communication)
H
Power Supply
L
H
STANDBY control
(Pin 3)
HIGH to cancel STANDBY
L
HIGH period for about 2ms
H
c
POWER ON PULSE
(Signal inside IC)
d
L
(Second C.S.)
First DATA communication
(First C.S.)
Dummy communication
H
C.S.
(Pin 6)
e
f
L
Dummy Data
First Data
H
Data
(Pin 8)
L
H
Clock
(Pin 7)
L
Delay of several
hundreds ns
H
POWER ON RESET
(IC inside)
g
L
POWER ON RESET (default) state
SERIAL communication
condition
(First DATA hold)
The POWER ON RESET state covers a period up to the rise f of the second C.S. input after fall d of POWER ON
PULSE c generated inside IC when the power is supplied and the STANDBY control is canceled. e is the dummy
communication.
Actually, because of delay of several hundreds ns in the IC, the first DATA condition begins in g and the normal
SERIAL communication condition begins after g.
No.A0898-5/16
LA74308LP
BIAS MODE Canceling State (SERIAL communication)
H
Normally HIGH
Power Supply
L
H
Normally HIGH
STANDBY control
(Pin 3)
L
HIGH period for about 5μs
d
H
POWER ON PULSE
(Signal inside IC)
e
L
(First C.S.)
Dummy communication
BIAS mode canceling
(Second C.S.)
First DATA communication
H
C.S.
(Pin 6)
f
c
L
Data15=0
Dummy Data
g
First Data
H
Data
(Pin 8)
L
H
Clock
(Pin 7)
L
Delay of several hundreds ns
H
POWER ON RESET
(IC inside)
h
L
POWER ON RESET (default) state
SERIAL communication
condition
(First DATA hold)
The POWER ON RESET state from the BIAS MODE covers the period from the rise of C.S c for communication of
canceling of the BIAS MODE to the second rise g of CS input after the fall e of POWER ON PULSE d generated inside
IC. f is the dummy communication.
Actually, because of delay of several hundreds ns in the IC, the first DATA condition begins in h and the normal
SERIAL communication condition begins after h.
No.A0898-6/16
Symbol
Pin
ICCAS1 T11
ICCAS2 T11
ICCS1
ICCS2
ICCSS1 T22
ICCSS2 T22
3
4
5
6
7
8
T22
T22
T22
VCCSP=3.3V
No input
VCCSP=3.3V
No input
VCCSP=3.3V
No input
T12
VIN=-20dBV
f=1kHz
T14
T12
T14
No input
VNOR
14
ALMD
12
T12
VIN=-20dBV
f=1kHz
T14
T12
ALM
11
T12
VIN=-53dBV
f=1kHz
T14
f=1kHz
HDR1
10
T12
VIN=-53dBV
f=1kHz
T14
13 VINRMX T14
VOR
9
0
3.3V
3.3V
JIS-A FILTER used
SW14=B, SW16=B
3.3V
3.3V
3.3V
3.3V
3.3V
0V
3.3V
3.3V
3.3V
0V
3.3V
3.3V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
LINE
Voltage
applied to Mute Tr.
pin 3
STANDBY
pin
400 to 20kHz LPF used, SW16=B
Pin 14 level at which pin 12 becomes
THD = 3% from 2nd to 5th harmonic)
400 to 20kHz LPF used, SW14=A
SW16=B, THD: from 2nd to 5th harmonic
400 to 20kHz LPF used,
SW14=A, SW16=B
400 to 20kHz LPF used, SW14=A
SW16=B, THD: from 2nd to 5th harmonic
400 to 20kHz LPF used
SW14=A, SW16=B
BIAS MODE
With the STANDBY pin V3=0V
VREF capacitance charging circuit in the OFF MODE
SPK POWER SAVE MODE
VREF capacitance charging circuit in the OFF MODE
SPK POWER ON MODE
BIAS MODE
VCCA=3.0V
T11
No input
T22
With the STANDBY pin V3=0V
VCCA=3.0V
T11
No input
VCCSP=3.3V
No input
VREF capacitance charging circuit in the OFF MODE
LINE/SP AMP POWER SAVE MODE
VCCA=3.0V
T11
No input
Major conditions
(for the serial control setting,
see the table in the right)
VREF capacitance charging circuit in the OFF MODE
MIC/ALC/REC AMP POWER SAVE MODE
Pin
Output
VCCA=3.0V
T11
No input
Conditions
REC output system
T22
T22
T11
ICCA2
2
T11
ICCA1
1
Circuit current
No.
Input
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
1
0
0
0
0
0
0
1
1
1
1
0
0
0
1
0:ON
1:OFF
0:ON
1:OFF
0:OFF
1:ON
ALC
P SW
MIC
P SW
VREF
charging
SW
3
2
1
1
1
1
1
1
1
0
0
0
0
0
0
1
0
0:PB
1:REC
REC
/PB
SW
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0:16kHz
1:8kHz
LPF
TRAP
5
0
0
0
0
0
0
1
1
1
1
0
0
0
1
0:ON
1:OFF
REC
P SW
6
1
1
1
1
1
1
0
0
0
0
0
0
1
0
0:ON
1:OFF
LINE
P SW
7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0:OFF
1:ON
LINE
Mute
8
Serial control setting
1
1
1
1
1
1
0
0
1
0
0
0
1
0
0:ON
1:OFF
SPK
P SW
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR1
DATA
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR2
DATA
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR4
DATA
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR8
DATA
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR16
DATA
14
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0:ACTIVE
1:BIAS
BIAS
MODE
15
LA74308LP
Electrical Characteristics Measurement Method at Ta=25°C, VCCA=3.0V, VCCSP=3.3V,
f=1kHz with the VREF capacitance charging circuit in the OFF MODE
No.A0898-7/16
Symbol
Pin
HDL
VNOL
VINPMX
FEQP1
FEQP2
FEQP3
16
17
18
19
20
21
T10
T10
T10
T10
T10
T10
T10
T5
T5
T5
T5
f=1kHz
VIN=-10dBV
f=3kHz
VIN=-10dBV
f=4kHz
VIN=-10dBV
f=8kHz
T5
T5
VIN=-17dBV
f=1kHz
No input
T5
Pin
VIN=-17dBV
f=1kHz
Conditions
VOSSP
VOSP3
25
27
VOSP2
24
VNOSP
THDSP
23
26
VOSP1
22
T10
T10
T10
T10
T10
T10
Output
3.3V
3.3V
400 to 20kHz LPF used, SW10=A,
Pin 10 level at which pin 5 becomes
THD = 3% (from 2nd to 5th harmonic)
f=3kHz/1kHz level ratio
SW10=A, SW16=A
f=8kHz/1kHz level ratio
SW10=A, SW16=A
3.3V
3.3V
3.3V
3.3V
3.3V
400 to 20kHz LPF used, Vol.=MAX
THD: from 2nd to 5th harmonic
400 to 20kHz LPF used
Vol.=TYP (EVR DATA=14)
JIS-A FILTER used
Vol.=MIN (EVR DATA=0)
JIS-A FILTER used
Vol.=MAX (EVR DATA=31)
400 to 20kHz LPF used
Vol.=MAX (EVR DATA=31)
Level at which Vol.=MAX and
THD=10% (from 2nd to 5th harmonic)
T21
T23
T21
T23
T21
T23
T21
T23
T21
T23
VIN=-17dBV
f=1kHz
VIN=-17dBV
f=1kHz
VIN=-17dBV
f=1kHz
f=1kHz
No input
3.3V
400 to 20kHz LPF used
Vol.=MAX (EVR DATA=31)
T21
T23
VIN=-17dBV
f=1kHz
3.3V
3.3V
3.3V
JIS-A FILTER used, SW10=B,
SW16=A
f=4kHz/1kHz level ratio
SW10=A, SW16=A
3.3V
3.3V
Voltage
applied to
pin 3
STANDBY pin
400 to 20kHz LPF used, SW10=A
SW16=A, THD: from 2nd to 5th harmonic
400 to 20kHz LPF used
SW10=A, SW16=A
Major conditions
(for the serial control setting,
see the table in the right)
SPK output system (SPK end: measured with 8Ω )
VOL1
15
LINE output system
No.
Input
0:OFF
1:ON
0:OFF
1:ON
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VREF
charging
SW
LINE
Mute
Tr.
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
MIC
P SW
2
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
ALC
P SW
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0:PB
1:REC
REC
/PB
SW
4
1
1
1
1
1
1
1
1
1
1
1
1
1
0:16kHz
1:8kHz
LPF
TRAP
5
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
REC
P SW
6
1
1
1
1
1
1
0
0
0
0
0
0
0
0:ON
1:OFF
LINE
P SW
7
1
1
1
1
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
LINE
Mute
8
Serial control setting
0
0
0
0
0
0
1
1
1
1
1
1
1
0:ON
1:OFF
SPK
P SW
9
1
1
0
0
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR1
DATA
10
1
1
0
1
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR2
DATA
11
1
1
0
1
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR4
DATA
12
1
1
0
1
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR8
DATA
13
1
1
0
0
1
1
0
0
0
0
0
0
0
0:OFF
1:ON
EVR16
DATA
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0:ACTIVE
1:BIAS
BIAS
MODE
15
LA74308LP
No.A0898-8/16
Symbol
Pin
32
VMIC
T17
No input
T18
T16
3.3V
3.3V
400 to 20kHz LPF used, SW17=A
Pin 17 level at which pin 16 becomes
THD = 3% (from 2nd to 5th harmonic)
Pin 18 Measurement of output
voltage (under 6.2kΩ load)
SW18=ON
f=1kHz
VINMMX T17
31
3.3V
T16
No input
VNOMIC T17
30
JIS-A FILTER used, SW17=B
3.3V
HDMIC
29
T17
400 to 20kHz LPF used, SW17=A
THD: from 2nd to 5th harmonic
VGMIC
28
VIN=-36dBV
T16
f=1kHz
Voltage
applied to
pin 3
T17
Major conditions
(for the serial control setting,
see the table in the right)
3.3V
Pin
STANDBY
pin
400 to 20kHz LPF used, SW17=A
Conditions
Output
VIN=-36dBV
T16
f=1kHz
MIC Output system
No.
Input
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:ON
1:OFF
0:OFF
1:ON
0:OFF
1:ON
0
MIC
P SW
VREF
charging
SW
LINE
Mute
Tr.
2
1
0
0
0
0
0
0
0:ON
1:OFF
ALC
P SW
3
1
1
1
1
1
0:PB
1:REC
REC
/PB
SW
4
1
1
1
1
1
0:16kHz
1:8kHz
LPF
TRAP
5
0
0
0
0
0
0:ON
1:OFF
REC
P SW
6
1
1
1
1
1
0:ON
1:OFF
LINE
P SW
7
1
1
1
1
1
0:OFF
1:ON
LINE
Mute
8
Serial control setting
1
1
1
1
1
0:ON
1:OFF
SPK
P SW
9
0
0
0
0
0
0:OFF
1:ON
EVR1
DATA
10
0
0
0
0
0
0:OFF
1:ON
EVR2
DATA
11
0
0
0
0
0
0:OFF
1:ON
EVR4
DATA
12
0
0
0
0
0
0:OFF
1:ON
EVR8
DATA
13
0
0
0
0
0
0:OFF
1:ON
EVR16
DATA
14
0
0
0
0
0
0:ACTIVE
1:BIAS
BIAS
MODE
15
LA74308LP
No.A0898-9/16
LA74308LP
Description of Pin Functions
Pin No.
Pin Description
1
Speaker input
2
EVR output
3
STANDBY control
4
LINE output
5
LINE MUTE Tr. output
6
C.S. input
7
CLOCK input
8
DATA input
9
GND
10
PB input
11
VCCA
12
REC output
13
ALC detection
14
ALC input
15
2nd order HPF
16
MIC output
17
MIC input
18
INT power supply for MIC
19
Ripple rejection for VREFL
20
SPK GND
21
Speaker positive-phase output
22
VCCSP
23
Speaker negative-phase output
24
SPK GND
No.A0898-10/16
LA74308LP
Block Diagram
T16
T17
∼
MIC OUT
MIC
IN
600Ω A
SW17
ALC IN
0.01μF
VREF
Rg=1kΩ
+
17
18
16
+17dB
+
R
2.2kΩ
19
MIC VCC
15
+17dB ALC
+18dB
VREF
P
+9dB
R
11
charging circuit
21
3.3V
23
+-
T1
B
SW10
9
A GND
EVR
1μF
T11
VCCA
0.1μF
PB IN
22
+
+
10
SPK8Ω
VCCSP
T22
T12
REC OUT
12
LPF
VREF
∼
0.47μF
REC:50kΩ/PB:200kΩ
T21
A
13
14
DET
100kΩ
P
20
+
SW14
B
T14
0.1μF
B
6.2kΩ
SW18
6.2kΩ
4.7μF
B
A
SW16
+8dB
MUTE
Rg=1kΩ
A
∼
MUTE CTL
10Ω
8
DATA
7
T7 (CLOCK)
T23
+8dB
24
SPK GND
LOGIC
2kΩ
1
2
3
4
5
6
T6
C.S
0.1μF
0.1μF
T2
T5
22kΩ
V3
LINE OUT
T3
STANDBY CTL
No.A0898-11/16
LA74308LP
LPF Characteristics
LA74308LP LPF characteristics
2.00E+01
0.00E+00
Response [dB]
-2.00E+01
fs=8kHz mode
-4.00E+01
fs=16kHz mode
-6.00E+01
-8.00E+01
-1.00E+02
1.00E+02
1.00E+03
1.00E+04
1.00E+05
Frequency [Hz]
EVR Characteristics
LA74308LP EVR characteristics (At PB IN reference input = -9dBV)
0
-10
-20
GAIN [ dB ]
-30
-40
-50
-60
-70
-80
-90
0
5
10
15
20
25
30
35
5-bit data (decimal)
SPK Output Level & Distortion Rate
LA74308LP SPK output & THD characteristics (PB IN Max input -9dBV)
0.35
14
12
SPK output
SPK8 Ω output [ W ]
THD
0.25
10
0.2
8
0.15
6
0.1
4
0.05
2
0
THD: from 2nd to 5th harmonic [ % ]
0.3
0
0
5
10
15
20
25
30
35
5-bit data (decimal)
No.A0898-12/16
LA74308LP
LA74308LP Input/output Pattern Table
PIN
Pin Name
DC voltage
AC voltage
1
SP IN
1.27V
At PB reference input
Description of functions
Equivalent circuit diagram in pin
Speaker input pin
VCCSP(=3.3V)
Output level = -9dBV
(EVR MAX)
400Ω 11kΩ
1
23
SPK OUT-
1.27V
At PB reference input
23
Speaker negative-phase output pin
Output level = -9dBV
(EVR MAX)
2
EVR OUT
1.5V
EVR output pin
VCC(=3.0V)
10kΩ
35kΩ
2
12.5kΩ
VREFL
3
STANDBY L
STANDBY control pin
70kΩ
2V or more:
3
STANDBY canceled
50kΩ
4
LINE OUT
LINE output pin
VCC(=3.0V)
2kΩ
4
26kΩ
14kΩ
VREFL
5
LINE MUTE
1.5V
At PB reference input
LINE output mute transistor
Output level = -9dBV
5
10Ω
6
CS
CS input pin
6
7
7
CLOCK
CLOCK input pin
8
8
DATA
60kΩ
Ω
50kΩ
DATA input pin
Continued on next page.
No.A0898-13/16
LA74308LP
Continued from preceding page.
PIN
Pin Name
DC voltage
9
GND
0V
10
PB IN
1.5V
AC voltage
Description of functions
Equivalent circuit diagram in pin
GND pin
Reference input level
PB input pin
VCC(=3.0V)
=-17dBV
49.5kΩ
500Ω
10
11
VCC
3V
12
REC OUT
1.5V
Power supply pin
Reference input level
R output pin
VCC(=3.0V)
=-9dBV
500Ω
11kΩ
12
6kΩ
VREF
13
ALC DET
ALC detection pin
VCC(=3.0V)
1kΩ
13
500Ω
14
ALC IN (REC)
1.5V
Reference input level
ALC input pin
VCC(=3.0V)
=-53dBV
Max input level
=-8dBV
500Ω
14
EVR IN (PB)
1.5V
EVR input pin
REC:50kΩ
PB:200kΩ
VREF
15
HPF
1.5V
Used when forming the 2nd order
VCC(=3.0V)
HPF
100kΩ
15
Continued on next page.
No.A0898-14/16
LA74308LP
Continued from preceding page.
PIN
Pin Name
DC voltage
16
MIC OUT (REC)
1.5V
AC voltage
Description of functions
Equivalent circuit diagram in pin
VCC(=3.0V)
MIC output pin
(for REC mode)
500Ω
LPF OUT (PB)
16
LPF output pin
(for PB mode)
17
MIC IN
1.5V
Reference input level
VCC(=3.0V)
MIC input pin
=-70dBV
Max input level
500Ω
=-25dBV
17
70kΩ
VREFL
18
MIC VCC
2.30V
MIC power pin
VCC(=3.0V)
2.2kΩ
18
28kΩ
19
VREFL
2.30V
MIC VCC and VREFL ripple
VCC(=3.0V)
rejection pin
400Ω
19
500Ω
200kΩ
20
SP GND
0V
SPK OUT+
1.27V
Speaker GND pin
24
21
At PB reference input
Speaker positive-phase output pin
VCCSP(=3.3V)
Output level = -9dBV
(EVR MAX)
21
10kΩ
10.7kΩ
23
22
VCCSP
3.3V
Speaker power pin
No.A0898-15/16
LA74308LP
Application Circuit
MIC IN
2.2kΩ
19
0.47μF
16
17
18
4.7μF
+
0.01μF
0.01μF
+
-
MIC VCC
15
P
R
21
0.1μF REC OUT
12
ALC
VREF
REC: 50kΩ /
PB: 200kΩ
VCCA
3.0V
R
P
VREF
charging circuit
13
DET
20
SPK 8Ω
14
11
+
1μF
LPF
10
0.1μF PB IN
VCCSP
+
3.3V
1μF
22
9
EVR
MUTE CTL
+-
MUTE
23
8
DATA
LOGIC
24
7
CLOCK
1
0.1μF
BEEP IN
2
0.1μF
3
4
5
C. S.
6
0.1μF
STAND-BY LINE OUT
LOW
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ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
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This catalog provides information as of May, 2008. Specifications and information herein are subject
to change without notice.
PS No.A0898-16/16