NSC LM2984C

LM2984C Microprocessor Power Supply System
General Description
The LM2984C positive voltage regulator features three independent and tracking outputs capable of delivering the
power for logic circuits, peripheral sensors and standby
memory in a typical microprocessor system. The LM2984C
includes circuitry which monitors both its own high-current
output and also an external mP. If any error conditions are
sensed in either, a reset error flag is set and maintained until
the malfunction terminates. Since these functions are included in the same package with the three regulators, a
great saving in board space can be realized in the typical
microprocessor system. The LM2984C also features very
low dropout voltages on each of its three regulator outputs
(0.6V at the rated output current). Furthermore, the quiescent current can be reduced to 1 mA in the standby mode.
Designed also for vehicular applications, the LM2984C and
all regulated circuitry are protected from reverse battery installations or 2-battery jumps. Familiar regulator features
such as short circuit and thermal overload protection are
also provided. Fixed outputs of 5V are available in the plastic TO-220 power package.
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Three low dropout tracking regulators
Output current in excess of 500 mA
Low quiescent current standby regulator
Microprocessor malfunction RESET flag
Delayed RESET on power-up
Accurate pretrimmed 5V outputs
Reverse battery protection
Overvoltage protection
Reverse transient protection
Short circuit protection
Internal thermal overload protection
ON/OFF switch for high current outputs
100% electrical burn-in in thermal limit
Typical Application Circuit
LM2984C
Order Number LM2984CT
See NS Package Number TA11B
C1995 National Semiconductor Corporation
TL/H/8821
COUT must be at least 10 mF to
maintain stability. May be increased
without bound to maintain regulation
during transients. Locate as close as
possible to the regulator. This capac- TL/H/8821 – 1
itor must be rated over the same operating temperature range as the
regulator. The equivalent series resistance (ESR) of this capacitor is
critical; see curve.
RRD-B30M115/Printed in U. S. A.
LM2984C Microprocessor Power Supply System
May 1989
Absolute Maximum Ratings
Internal Power Dissipation
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Input Voltage
Survival Voltage (k100 ms)
Operational Voltage
Internally Limited
Operating Temperature Range (TA)
0§ C to a 125§ C
Maximum Junction Temperature (Note 1)
150§ C
b 65§ C to a 150§ C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
230§ C
ESD rating is to be determined.
35V
26V
Electrical Characteristics
VIN e 14V, IOUT e 5 mA, COUT e 10 mF, Tj e 25§ C (Note 6) unless otherwise indicated
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
5.00
4.85
5.15
4.75
5.25
Vmin
Vmax
2
25
VOUT (Pin 11)
Output Voltage
5 mA s Io s 500 mA
6V s VIN s 26V
Line Regulation
9V s VIN s 16V
mVmax
7V s VIN s 26V
5
50
mVmax
Load Regulation
5 mA s IOUT s 500 mA
12
50
mVmax
Output Impedance
250 mAdc and 10 mArms,
fo e 120 Hz
24
Quiescent Current
IOUT e 500 mA
38
100
mAmax
IOUT e 250 mA
14
50
mAmax
10 Hz–100 kHz, IOUT e 100 mA
100
mV
20
mV/1000 hr
Output Noise Voltage
Long Term Stability
mX
Ripple Rejection
fo e 120 Hz
70
60
Dropout Voltage
IOUT e 500 mA
0.53
0.80
1.00
Vmax
IOUT e 250 mA
0.28
0.50
0.60
Vmax
0.92
0.75
32
26
26
Vmin
45
35
35
Vmin
b 30
b 15
b 15
Vmin
b 55
b 35
b 35
Vmin
Current Limit
Maximum Operational
Input Voltage
Continuous DC
Maximum Line Transient
VOUT s 6V, ROUT e 100X
Reverse Polarity
Input Voltage DC
VOUT t b0.6V, ROUT e 100X
Reverse Polarity Input
Voltage Transient
T s 100 ms, ROUT e 100X
2
dBmin
Amin
Electrical Characteristics (Continued)
VIN e 14V, Ibuf e 5 mA, Cbuf e 10 mF, Tj e 25§ C (Note 6) unless otherwise indicated
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
5.00
4.85
5.15
4.75
5.25
Vmin
Vmax
Vbuffer (Pin 10)
Output Voltage
Line Regulation
5 mA s Io s 100 mA
6V s VIN s 26V
9V s VIN s 16V
2
25
mVmax
7V s VIN s 26V
5
50
mVmax
Load Regulation
5 mA s Ibuf s 100 mA
15
50
mVmax
Output Impedance
50 mAdc and 10 mArms,
200
Quiescent Current
Ibuf e 100 mA
8.0
15.0
mAmax
Output Noise Voltage
10 Hz–100 kHz, IOUT e 100 mA
100
mV
20
mV/1000 hr
Long Term Stability
Ripple Rejection
fo e 120 Hz
Dropout Voltage
Ibuf e 100 mA
Current Limit
Maximum Operational
Input Voltage
Continuous DC
Maximum Line
Transient
Vbuf s 6V, Rbuf e 100X
Reverse Polarity
Input Voltage DC
Vbuf t b0.6V, Rbuf e 100X
Reverse Polarity Input
Voltage Transient
T s 100 ms, Rbuf e 100X
mX
70
60
0.35
0.50
dBmin
0.23
0.15
32
26
26
Vmin
45
35
35
Vmin
b 30
b 15
b 15
Vmin
b 55
b 35
b 35
Vmin
0.60
Vmax
Amin
Electrical Characteristics
VIN e 14V, Istby e 1 mA, Cstby e 10 mF, Tj e 25§ C (Note 6) unless otherwise indicated
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
5.00
4.85
5.15
4.75
5.25
Vmin
Vmax
Vstandby (Pin 9)
Output Voltage
1 mA s Io s 7.5 mA
6V s VIN s 26V
Line Regulation
9V s VIN s 16V
2
25
mVmax
7V s VIN s 26V
5
50
mVmax
Load Regulation
0.5 mA s Istby s 7.5 mA
6
50
mVmax
Output Impedance
5 mAdc and 1 mArms, fo e 120 Hz
0.9
Quiescent Current
Istby e 7.5 mA
1.2
2.0
mAmax
Istby e 2 mA
0.9
1.5
mAmax
3
X
Electrical Characteristics (Continued)
VIN e 14V, Istby e 1 mA, Cstby e 10 mF, Tj e 25§ C (Note 6) unless otherwise indicated
Parameter
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Conditions
Typical
Units
10 Hz–100 kHz, Istby e 1 mA
100
Ripple Rejection
fo e 120 Hz
70
60
Dropout Voltage
Istby e 1 mA
0.26
0.50
0.50
Vmax
Dropout Voltage
Istby e 7.5 mA
0.38
0.60
0.70
Vmax
Vstandby (Continued)
Output Noise Voltage
Long Term Stability
mV
20
Current Limit
mV/1000 hr
dBmin
15
12
Maximum Operational
Input Voltage
4.5V s Vstby s 6V
Rstby e 1000X
mAmin
45
35
35
Vmin
Maximum Line
Transient
Vstby s 6V,
Rstby e 1000X
45
35
35
Vmin
Reverse Polarity
Input Voltage DC
Vstby t b0.6V,
Rstby e 1000X
b 30
b 15
b 15
Vmin
Reverse Polarity Input
Voltage Transient
T s 100 ms, Rstby e 1000X
b 55
b 35
b 35
Vmin
Electrical Characteristics
VIN e 14V, Tj e 25§ C (Note 6) COUT e 10 mF, Cbuf e 10 mF, Cstby e 10 mF unless otherwise specified
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
Tracking and Isolation
Tracking
VOUT – Vstby
IOUT s 500 mA, Ibuf e 5 mA,
Istby s 7.5 mA
g 30
g 100
mVmax
Tracking
Vbuf – Vstby
IOUT e 5 mA, Ibuf s 100 mA,
Istby s 7.5 mA
g 30
g 100
mVmax
Tracking
VOUT – Vbuf
IOUT s 500 mA, Ibuf s 100 mA,
Istby e 1 mA
g 30
g 100
mVmax
Isolation*
Vbuf from VOUT
ROUT e 1X, Ibuf s 100 mA
5.00
4.50
5.50
Vmin
Vmax
Isolation*
Vstby from VOUT
ROUT e 1X, Istby s 7.5 mA
5.00
4.50
5.50
Vmin
Vmax
Isolation*
VOUT from Vbuf
Rbuf e 1X, IOUT s 500 mA
5.00
4.50
5.50
Vmin
Vmax
Isolation*
Vstby from Vbuf
Rbuf e 1X, Istby s 7.5 mA
5.00
4.50
5.50
Vmin
Vmax
*Isolation refers to the ability of the specified output to remain within the tested limits when the other output is shorted to ground.
4
Electrical Characteristics (Continued)
VIN e 14V, IOUT e 5 mA, Ibuf e 5 mA, Istby e 5 mA, Rt e 130k, Ct e 0.33 mF, Cmon e 0.47 mF, Tj e 25§ C (Note 6) unless
otherwise specified
Parameter
Conditions
Typical
Tested
Limit
(Note 2)
Design
Limit
(Note 3)
Units
1
mAmin
Computer Monitor/Reset Functions
Ireset Low
VIN e 4V, Vrst e 0.4V
5
2
Vreset Low
VIN e 4V, Irst e 1 mA
0.10
0.40
Rt voltage
(Pin 2)
1.22
1.15
Vmin
1.22
1.30
Vmax
50
45
msmin
msmax
Power On Reset
Delay
VmPmon e 5V
(Tdly e 1.2 Rt Ct)
VOUT Low
Reset Threshold
(Note 4)
VOUT High
Reset Threshold
(Note 4)
Reset Output
Leakage
VmPmon e 5V, Vrst e 12V
mPmon Input
Current (Pin 4)
Vmax
50
55
4.00
3.60
Vmin
4.00
4.40
Vmax
5.50
5.25
Vmin
5.50
6.00
Vmax
0.01
1
mAmax
VmPmon e 2.4V
7.5
25
mAmax
VmPmon e 0.4V
0.01
10
1.22
0.80
0.80
Vmin
1.22
2.00
2.00
Vmax
50
45
mPmon Input
Threshold Voltage
mAmax
mP Monitor Reset
Oscillator Period
VmPmon e 0V
(Twindow e 0.82 RtCmon)
msmin
mP Monitor Reset
Oscillator Pulse Width
VmPmon e 0V
(RESETpw e 2000 Cmon)
Minimum mP Monitor
Input Pulse Width
(Note 5)
Reset Fall Time
Rrst e 10k, Vrst e 5V, Crst s 10 pF
0.20
1.00
Reset Rise Time
Rrst e 10k, Vrst e 5V, Crst s 10 pF
0.60
1.00
msmax
On/Off Switch Input
Current (Pin 8)
VON e 2.4V
7.5
25
mAmax
VON e 0.4V
0.01
10
1.22
0.80
0.80
Vmin
1.22
2.00
2.00
Vmax
50
55
1.0
0.7
0.5
msmax
msmin
1.0
1.3
2.0
msmax
2
On/Off Switch Input
Threshold Voltage
msmax
msmax
mAmax
Note 1: Thermal resistance without a heatsink for junction-to-case temperature is 3§ C/W. Thermal resistance case-to-ambient is 40§ C/W.
Note 2: Tested Limits are guaranteed and 100% production tested.
Note 3: Design Limits are guaranteed (but not 100% production tested) over the indicated temperature and supply voltage range. These limits are not used to
calculate outgoing quality levels.
Note 4: An internal comparator detects when the main regulator output (VOUT) drops below 4.0V or rises above 5.5V. If either condition exists at the output, the
Reset Error Flag is held low until the error condition has terminated. The Reset Error Flag is then allowed to go high again after a delay set by Rt and Ct. (See
Applications Section.)
Note 5: This parameter is a measure of how short a pulse can be detected at the mP Monitor Input. This parameter is primarily influenced by the value of Cmon.
(See Typical Performance Characteristics and Applications Section.)
Note 6: To ensure constant junction temperature, low duty cycle pulse testing is used.
5
Block Diagram
TL/H/8821 – 2
Pin Description
Pin No.
Pin Name
Comments
1
2
3
4
5
6
7
8
9
10
11
VIN
Rt
Ct
mPmon
Cmon
Ground
Reset
ON/OFF
Vstandby
Vbuffer
VOUT
Positive supply input voltage
Sets internal timing currents
Sets power-up reset delay timing
Microcomputer monitor input
Sets mC monitor timing
Regulator ground
Reset error flag output
Enables/disables high current regulators
Standby regulator output (7.5 mA)
Buffer regulator output (100 mA)
Main regulator output (500 mA)
External Components
Component
Typical Value
Component Range
Comments
CIN
Rt
Ct
Ctc
Rtc
1 mF
130k
0.33 mF
0.01 mF
10k
0.47 mF– 10 mF
24k–1.2M
0.033 mF–3.3 mF
0.001 mF–0.1 mF
1k–100k
Cmon
0.47 mF
0.047 mF–4.7 mF
Rrst
10k
5k–100k
Load for open collector reset output. Determined by computer reset input
requirements.
Cstby
10 mF
10 mF–no bound
A 10 mF is required for stability but larger values can be used to maintain
regulation during transient conditions.
Cbuf
10 mF
10 mF–no bound
COUT
10 mF
10 mF–no bound
A 10 mF is required for stability but larger values can be used to maintain
regulation during transient conditions.
A 10 mF is required for stability but larger values can be used to maintain
regulation during transient conditions.
Required if device is located far from power supply filter.
Sets internal timing currents.
Sets power-up reset delay.
Establishes time constant of AC coupled computer monitor.
Establishes time constant of AC coupled computer monitor. (See
applications section.)
Sets time window for computer monitor. Also determines period and pulse
width of computer malfunction reset. (See applications section.)
6
Typical Circuit Waveforms
TL/H/8821 – 3
Connection Diagram
TL/H/8821 – 4
Order Number LM2984CT
See NS Package Number TA11B
7
Typical Performance Characteristics
Dropout Voltage (VOUT)
Dropout Voltage (Vbuf)
Dropout Voltage (Vstby)
Dropout Voltage (VOUT)
Dropout Voltage (Vbuf)
Dropout Voltage (Vstby)
Peak Output Current (VOUT)
Peak Output Current (Vbuf)
Peak Output Current (Vstby)
Quiescent Current (VOUT)
Quiescent Current (Vbuf)
Quiescent Current (Vstby)
TL/H/8821 – 5
8
Typical Performance Characteristics
(Continued)
Quiescent Current (VOUT)
Quiescent Current (Vbuf)
Quiescent Current (Vstby)
Quiescent Current (VOUT)
Quiescent Current (Vbuf)
Quiescent Current (Vstby)
Output Voltage (VOUT)
Output Voltage (Vbuf)
Output Voltage (Vstby)
Low Voltage Behavior (VOUT)
Low Voltage Behavior (Vbuf)
Low Voltage Behavior (Vstby)
TL/H/8821 – 6
9
Typical Performance Characteristics
(Continued)
Line Transient
Response (VOUT)
Line Transient
Response (Vbuf)
Line Transient
Response (Vstby)
Load Transient
Response (VOUT)
Load Transient
Response (Vbuf)
Load Transient
Response (Vstby)
Output Impedance (VOUT)
Output Impedance (Vbuf)
Output Impedance (Vstby)
Ripple Rejection (VOUT)
Ripple Rejection (Vbuf)
Ripple Rejection (Vstby)
TL/H/8821 – 7
10
Typical Performance Characteristics
(Continued)
Device Dissipation vs
Ambient Temperature
Output Voltage
TL/H/8821 – 9
TL/H/8821 – 8
Output Capacitor ESR
(Standby Output, Pin 9)
Output Capacitor ESR
(Buffer Output, Pin 10)
TL/H/8821–13
TL/H/8821 – 14
Output Capacitor ESR
(Main Output, Pin 11)
TL/H/8821 – 15
Application Hints
outputs are controlled with the ON/OFF pin described later,
the standby output remains on under all conditions as long
as sufficient input voltage is supplied to the IC. Thus, memory and other circuits powered by this output remain unaffected by positive line transients, thermal shutdown, etc.
The standby regulator circuit is designed so that the quiescent current to the IC is very low (k1.5 mA) when the other
regulator outputs are off.
The capacitor on the output of this regulator can be increased without bound. This will help maintain the output
voltage during negative input transients and will also help to
reduce the noise on all three outputs. Because the other
two track the standby output: therefore any noise reduction
here will also reduce the other two noise voltages.
OUTPUT CAPACITORS
The LM2984C output capacitors are required for stability.
Without them, the regulator outputs will oscillate, sometimes
by many volts. Though the 10 mF shown are the minimum
recommended values, actual size and type may vary depending upon the application load and temperature range.
Capacitor effective series resistance (ESR) also affects the
IC stability. Since ESR varies from one brand to the next,
some bench work may be required to determine the minimum capacitor value to use in production. Worst case is
usually determined at the minimum ambient temperature
and the maximum load expected.
Output capacitors can be increased in size to any desired
value above the minimum. One possible purpose of this
would be to maintain the output voltages during brief conditions of negative input transients that might be characteristic of a particular system.
Capacitors must also be rated at all ambient temperatures
expected in the system. Many aluminum type electrolytics
will freeze at temperatures less than b30§ C, reducing their
effective capacitance to zero. To maintain regulator stability
down to b40§ C, capacitors rated at that temperature (such
as tantalums) must be used.
Each output must be terminated by a capacitor, even if it is
not used.
BUFFER OUTPUT
The buffer output is designed to drive peripheral sensor circuitry in a mP system. It will track the standby and main
regulator within a few millivolts in normal operation. Therefore, a peripheral sensor can be powered off this supply and
have the same operating voltage as the mP system. This is
important if a ratiometric sensor system is being used.
The buffer output can be short circuited while the other two
outputs are in normal operation. This protects the mP system from disruption of power when a sensor wire, etc. is
temporarily shorted to ground, i.e. only the sensor signal
would be interrupted, while the mP and memory circuits
would remain operational.
The buffer output is similar to the main output in that it is
controlled by the ON/OFF switch in order to save power in
STANDBY OUTPUT
The standby output is intended for use in systems requiring
standby memory circuits. While the high current regulator
11
Application Hints (Continued)
the standby mode. It is also fault protected against overvoltage and thermal overload. If the input voltage rises above
approximately 30V (e.g. load dump), this output will automatically shut down. This protects the internal circuitry and
enables the IC to survive higher voltage transients than
would otherwise be expected. Thermal shutdown is necessary since this output is one of the dominant sources of
power dissipation in the IC.
DELAYED RESET
Resistor Rt and capacitor Ct set the period of time that the
RESET output is held low after a main output error condition
has been sensed. The delay is given by the formula:
Tdly e 1.2 RtCt (seconds)
The delayed RESET will be initiated any time the main output is outside the 4V to 5.5V window, i.e. during power-up,
short circuit, overvoltage, low line, thermal shutdown or
power-down. The mP is therefore RESET whenever the output voltage is out of regulation. (It is important to note that a
RESET is only initiated when the main output is in error. The
buffer and standby outputs are not directly monitored for
error conditions.)
MAIN OUTPUT
The main output is designed to power relatively large loads,
i.e. approximately 500 mA. It is therefore also protected
against overvoltage and thermal overload.
This output will track the other two within a few millivolts in
normal operation. It can therefore be used as a reference
voltage for any signal derived from circuitry powered off the
standby or buffer outputs. This is important in a ratiometric
sensor system or any system requiring accurate matching of
power supply voltages.
mP MONITOR RESET
There are two distinct and independent error monitoring
systems in the LM2984C. The one described above monitors the main regulator output and initiates a delayed RESET whenever this output is in error. The other error monitoring system is the mP watchdog. These two systems are
OR’d together internally and both force the RESET output
low when either type of error occurs.
This watchdog circuitry continuously monitors a pin on the
mP that generates a positive going pulse during normal operation. The period of this pulse is typically on the order of
milliseconds and the pulse width is typically on the order of
10’s of microseconds. If this pulse ever disappears, the
watchdog circuitry will time out and a RESET low will be
sent to the mP. The time out period is determined by two
external components, Rt and Cmon, according to the formula:
Twindow e 0.82 RtCmon (seconds)
ON/OFF SWITCH
The ON/OFF switch controls the main output and the buffer
output. The threshold voltage is compatible with most logic
families and has about 20 mV of hysteresis to insure ‘clean’
switching from the standby mode to the active mode and
vice versa. This pin can be tied to the input voltage through
a 10 kX resistor if the regulator is to be powered continuously.
POWER DOWN OVERRIDE
Another possible approach is to use a diode in series with
the ON/OFF signal and another in series with the main output in order to maintain power for some period of time after
the ON/OFF signal has been removed (see Figure 1 ). When
the ON/OFF switch is initially pulled high through diode D1,
the main output will turn on and supply power through diode
D2 to the ON/OFF switch effectively latching the main output. An open collector transistor Q1 is connected to the
ON/OFF pin along with the two diodes and forces the regulators off after a period of time determined by the mP. In this
way, the mP can override a power down command and store
data, do housekeeping, etc. before reverting back to the
standby mode.
The width of the RESET pulse is set by Cmon and an internal resistor according to the following:
RESETpw e 2000 Cmon (seconds)
A square wave signal can also be monitored for errors by
filtering the Cmon input such that only the positive edges of
the signal are detected. Figure 2 is a schematic diagram of a
typical circuit used to differentiate the input signal. Resistor
Rtc and capacitor Ctc pass only the rising edge of the
square wave and create a short positive pulse suitable for
the mP monitor input. If the incoming signal continues in a
high state or in a low state for too long a period of time, a
RESET low will be generated.
TL/H/8821 – 10
FIGURE 1. Power Down Override
RESET OUTPUT
This output is an open collector NPN transistor which is
forced low whenever an error condition is present at the
main output or when a mP error is sensed (see mP Monitor
section). If the main output voltage drops below 4V or rises
above 5.5V, the RESET output is forced low and held low
for a period of time set by two external components, Rt and
Ct. There is a slight amount of hysteresis in these two
threshold voltages so that the RESET output has a fast rise
and fall time compatible with the requirements of most mP
RESET inputs.
TL/H/8821 – 11
FIGURE 2. Monitoring Square Wave mP Signals
The threshold voltage and input characteristics of this pin
are compatible with nearly all logic families.
There is a limit on the width of a pulse that can be reliably
detected by the watchdog circuit. This is due to the output
resistance of the transistor which discharges Cmon when a
high state is detected at the input. The minimum detectable
pulse width can be determined by the following formula:
PWmin e 20 Cmon (seconds)
12
TL/H/8821 – 12
Equivalent Schematic Diagram
13
LM2984C Microprocessor Power Supply System
Physical Dimensions inches (millimeters)
Lit. Ý108032-1
Molded TO-220 Package (TA)
Order Number LM2984CT
NS Package Number TA11A
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