Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LMT87, LMT87-Q1 SNIS170C – JAN 2014 – REVISED OCTOBER 2015 LMT87/LMT87-Q1 SC70/TO-92, Analog Temperature Sensors with Class-AB Output 1 Features 3 Description • The LMT87 and LMT87-Q1 are precision CMOS integrated-circuit temperature sensors with an analog output voltage that is linearly and inversely proportional to temperature. Its features make it suitable for many general temperature sensing applications. It can operate down to 2.7-V supply with 5.4-µA power consumption. Package options including through-hole TO-92 package allows the LMT87 to be mounted on-board, off-board, to a heat sink, or on multiple unique locations in the same application. A class-AB output structure gives the LMT87 and LMT87-Q1 strong output source and sink current capability that can directly drive up to 1.1-nF capacitive loads. This means it is well suited to drive an analog-to-digital converter sample-and-hold input with its transient load requirements. It has accuracy specified in the operating range of −50°C to 150°C. The accuracy, 3-lead package options, and other features also make the LMT87 and LMT87-Q1 an alternative to thermistors. 1 • • • • • • • • • LMT87-Q1 is AEC-Q100 Grade 0 Qualified and is Manufactured on an Automotive Grade Flow Very Accurate: ±0.3°C typical Wide Temperature Range of −50°C to 150°C Low 5.4-µA Quiescent Current Sensor Gain of –13.6 mV/°C Packages: – Small SC70 (SOT 5-lead) Surface Mount – Leaded TO-92 Output is Short-Circuit Protected Push-Pull Output with 50-µA Source Current Capability Footprint Compatible with the Industry-Standard LM20/19 and LM35 Temperature Sensors Cost-Effective Alternative to Thermistors 2 Applications • • • • • • • • For devices with different average sensor gains and comparable accuracy, the LMT84/LM84-Q1, LMT85/LMT85-Q1, and LMT86/LMT86-Q1 (For more details, see .) Automotive Industrial White Goods – Appliances Battery Management Disk Drives Games Wireless Transceivers Cell phones Device Information (1) PART NUMBER LMT87 LMT87-Q1 (1) PACKAGE BODY SIZE (NOM) SOT (5) 2.00 mm x 1.25 mm TO-92 (3) 4.3 mm x 3.5 mm SOT (5) 2.00 mm x 1.25 mm For all available packages, see the orderable addendum addendum at the end of the data sheet. 4 Full-Range Celsius Temperature Sensor (−50°C to 150°C) Output Voltage vs Temperature VDD (+2.7V to +5.5V) 3.5 LMT87 CBP OUT OUTPUT VOLTAGE (V) 3.0 VDD 2.5 2.0 1.5 1.0 0.5 0.0 GND ±50 0 50 100 150 TEMPERATURE (ƒC) C001 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LMT87, LMT87-Q1 SNIS170C – JAN 2014 – REVISED OCTOBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Full-Range Celsius Temperature Sensor (−50°C to 150°C) ................................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 5 5 5 5 6 6 6 7 Absolute Maximum Ratings ...................................... ESD Ratings - Commercial ....................................... ESD Ratings - Automotive ........................................ Recommended Operating Conditions ...................... Thermal Information .................................................. Accuracy Characteristics........................................... Electrical Characteristics .......................................... Typical Characteristics ............................................. 8.2 Functional Block Diagram ......................................... 9 8.3 Feature Description................................................... 9 8.4 Device Functional Modes........................................ 11 9 1 2 4 5 Detailed Description .............................................. 9 8.1 Overview ................................................................... 9 Application and Implementation ........................ 12 9.1 Application Information............................................ 12 9.2 Typical Applications ............................................... 12 10 Power Supply Recommendations ..................... 14 11 Layout................................................................... 14 11.1 Layout Guidelines ................................................. 14 11.2 Layout Example .................................................... 15 12 Device and Documentation Support ................. 16 12.1 12.2 12.3 12.4 12.5 Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 16 16 16 16 16 13 Mechanical, Packaging, and Orderable Information ........................................................... 16 5 Revision History Changes from Revision B (May 2014) to Revision C Page • Deleted all mentions of TO-126 package .............................................................................................................................. 1 • Added TO-92 LPM pin configuration graphic ......................................................................................................................... 4 • Changed Handling Ratings to ESD Ratings and moved Storage Temperature to Absolute Maximum Ratings table........... 5 • Changed KV to V ................................................................................................................................................................... 5 • Added layout recommendation for TO-92 LP and LPM packages....................................................................................... 15 • Added Community Resources ............................................................................................................................................. 16 Changes from Revision A (June 2013) to Revision B Page • Added data sheet flow and layout to conform with new TI standards. Added the following sections: Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, Mechanical, Packaging, and Orderable Information .................................................................................................................................. 1 • Added TO-92 and TO-126 package information. .................................................................................................................. 1 • Changed 450 °C/W to 275 °C/W. New specification is derived using TI ' s latest methodology. ......................................... 6 • Deleted Note: The input current is leakage only and is highest at high temperature. It is typically only 0.001 μA. The 1 μA limit is solely based on a testing limitation and does not reflect the actual performance of the part............................. 6 2 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 LMT87, LMT87-Q1 www.ti.com SNIS170C – JAN 2014 – REVISED OCTOBER 2015 Device Comparison (1) ORDER NUMBER PACKAGE (2) BODY SIZE (NOM) MOUNTING TYPE LMT87DCK SOT (AKA 5 2.00 mm x 1.25 mm Surface mount LMT87LP TO-92 (AKA (2): LP) 3 4.3 mm x 3.5 mm Through-hole; straight leads LMT87LPM TO-92 (AKA (2): LPM) 3 4.3 mm x 3.5 mm Through-hole; formed leads 5 2.00 mm x 1.25 mm Surface mount LMT87DCK-Q1 (1) (2) SOT (AKA : SC70, DCK) PIN (2) : SC70, DCK) For all available packages and complete order numbers, see the orderable addendum at the end of the data sheet. AKA = Also Known As Comparable Alternative Devices PART NUMBER AVERAGE OUTPUT SENSOR GAIN POWER SUPPLY RANGE LMT84/LMT84-Q1 –5.5 mV/°C 1.5 V to 5.5 V LMT85/LMT85-Q1 –8.2 mV/°C 1.8 V to 5.5 V LMT86/LMT86-Q1 –10.9 mV/°C 2.2 V to 5.5 V LMT87/LMT87-Q1 –13.6 mV/°C 2.7 V to 5.5 V Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 3 LMT87, LMT87-Q1 SNIS170C – JAN 2014 – REVISED OCTOBER 2015 www.ti.com 6 Pin Configuration and Functions 3-Pin TO-92 LPM Package 5-Pin SOT (SC70) DCK Package Top View 1 5 VDD VDD 2 LMT87 GND 3 4 OUT VDD VDD OUT GND 3-Pin TO-92 LP Package VDD OUT GND Pin Functions PIN LABEL DCK NUMBER LP NUMBER DESCRIPTION LPC NUMBER TYPE VDD 5 Power VDD 1 Power EQUIVALENT CIRCUIT FUNCTION Power Supply Voltage Power Supply Voltage VDD OUT Analog Output 3 See Pin Diagrams Outputs a voltage which is inversely proportional to temperature See Pin Diagrams GND VDD 4 Power Positive Supply Voltage GND 2 Ground Power Supply Ground, (direct connection to the back side of the die) 4 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 LMT87, LMT87-Q1 www.ti.com SNIS170C – JAN 2014 – REVISED OCTOBER 2015 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT Supply Voltage −0.3 6 V Voltage at Output Pin −0.3 (VDD + 0.5) V Output Current -7 7 mA Input Current at Any Pin (3) -5 5 mA 150 °C 150 °C TJMAX Maximum Junction Temperature Tstg Storage Temperature (1) (2) (3) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions . Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Soldering process must comply with TI's Reflow Temperature Profile specifications. Refer to www.ti.com/packaging. Reflow temperature profiles are different for lead-free and non-lead-free packages. When the input voltage (VI) at any pin exceeds power supplies (VI < GND or VI > V), the current at that pin should be limited to 5 mA. 7.2 ESD Ratings - Commercial VALUE Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins. Applies for TO-92 package LMT87LP. VESD (1) (2) (3) Electrostatic discharge UNIT (1) ±2500 Human body model (HBM), per JESD22-A114, all pins. Applies for SC70 package LMT87DCK. ±2500 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins. (2) Applies for all parts. ±1000 Machine model ESD stress voltage, per JEDEC specification JESD22A115. (3) Applies for SC70 package LMT87DCK. ±250 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. The machine model is a 200-pF capacitor discharged directly into each pin. 7.3 ESD Ratings - Automotive VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per JESD22-A114, all pins. SC70 package LMT87DCK-Q1. (1) Applies for Charged-device model (CDM), per JEDEC specification JESD22-C101, all pins. (2) Applies for SC70 package LMT87DCK-Q1. UNIT ±2500 V ±1000 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.4 Recommended Operating Conditions MIN Specified Temperature Range VDD Supply Voltage Range MAX UNIT TMIN ≤ TA ≤ TMAX °C –50 ≤ TA ≤ 150 °C 2.7 5.5 V Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 5 LMT87, LMT87-Q1 SNIS170C – JAN 2014 – REVISED OCTOBER 2015 www.ti.com 7.5 Thermal Information THERMAL METRIC (1) (2) (3) LMT87 LMT87-Q1 LMT87 DCK LP 5 PINS 3 PINS UNIT RθJA Junction-to-ambient thermal resistance 275 167 °C/W RθJC(top) Junction-to-case (top) thermal resistance 84 90 °C/W RθJB Junction-to-board thermal resistance 56 146 °C/W ψJT Junction-to-top characterization parameter 1.2 35 °C/W ψJB Junction-to-board characterization parameter 55 146 °C/W (1) (2) (3) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953). The junction-to-ambient thermal resistance (R θJA) under natural convection is obtained in a simulation on a JEDEC-standard, High K board as specified in JESD51-7, in an environment described in JESD51-2. Changes in output due to self heating can be computed by multiplying the internal dissipation by the thermal resistance. 7.6 Accuracy Characteristics These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in Table 1. PARAMETER CONDITIONS 70°C to 150°C; VDD = 3.0 V to 5.5 V MIN (1) TYP MAX (1) -2.7 ±0.4 2.7 20°C to 40°C; VDD = 2.7 V to 5.5 V ±0.6 20°C to 40°C; VDD = 3.4 V to 5.5 V -2.7 0°C; VDD = 3.6 V to 5.5 V -2.7 –50°C; VDD = 4.2 V to 5.5 V (1) (2) °C ±0.6 2.7 ±0.3 –50°C; VDD = 3.6 V to 5.5 V °C °C ±0.3 Temperature accuracy (2) 0°C; VDD = 3.0 V to 5.5 V UNIT °C °C ±0.6 2.7 ±0.3 °C °C Limits are specific to TI's AOQL (Average Outgoing Quality Level). Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Transfer Table at the specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the specified conditions. Accuracy limits do not include load regulation; they assume no DC load. 7.7 Electrical Characteristics Unless otherwise noted, these specifications apply for +VDD = 2.7 V to 5.5 V. MIN and MAX limits apply for TA = TJ = TMIN to TMAX ; typical limits apply for TA = TJ = 25°C. PARAMETER CONDITIONS MIN (1) Sensor gain (output transfer function slope) Load regulation (3) Line regulation Supply current CL Output load capacitance (1) (2) (3) (4) (5) 6 (2) MAX (1) –13.6 Source ≤ 50 μA, (VDD – VOUT) ≥ 200 mV –1 Sink ≤ 50 μA, VOUT ≥ 200 mV UNIT mV/°C –0.22 0.26 (4) IS TYP mV 1 mV μV/V 200 TA = 30°C to 150°C, (VDD – VOUT) ≥ 100 mV 5.4 8.1 μA TA = –50°C to 150°C, (VDD – VOUT) ≥ 100 mV 5.4 9 μA 1.9 ms 50 μA 1100 Power-on time (5) CL= 0 pF to 1100 pF Output drive TA = TJ = 25°C 0.7 –50 pF Limits are specific to TI's AOQL (Average Outgoing Quality Level). Typicals are at TJ = TA = 25°C and represent most likely parametric norm. Source currents are flowing out of the LMT87 and LMT87-Q1. Sink currents are flowing into the LMT87 and LMT87-Q1. Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in Output Voltage Shift. Specified by design and characterization. Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 LMT87, LMT87-Q1 www.ti.com SNIS170C – JAN 2014 – REVISED OCTOBER 2015 7.8 Typical Characteristics 4 TEMPERATURE ERROR (ºC) 3 2 1 0 -1 -2 -3 -4 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (ºC) Figure 1. Temperature Error vs Temperature Figure 2. Minimum Operating Temperature vs Supply Voltage Figure 3. Supply Current vs Temperature Figure 4. Supply Current vs Supply Voltage Figure 5. Load Regulation, Sourcing Current Figure 6. Load Regulation, Sinking Current Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 7 LMT87, LMT87-Q1 SNIS170C – JAN 2014 – REVISED OCTOBER 2015 www.ti.com Typical Characteristics (continued) Figure 7. Change in VOUT vs Overhead Voltage Figure 8. Supply-Noise Gain vs Frequency Figure 9. Output Voltage vs Supply Voltage 8 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 LMT87, LMT87-Q1 www.ti.com SNIS170C – JAN 2014 – REVISED OCTOBER 2015 8 Detailed Description 8.1 Overview The LMT87 and LMT87-Q1 are analog output temperature sensors. The temperature sensing element is comprised of a simple base emitter junction that is forward biased by a current source. The temperature sensing element is then buffered by an amplifier and provided to the OUT pin. The amplifier has a simple push-pull output stage thus providing a low impedance output source. 8.2 Functional Block Diagram VDD OUT Thermal Diodes GND 8.3 Feature Description 8.3.1 LMT87/LMT87-Q1 Transfer Function The output voltage of the LMT87 and LMT87-Q1, across the complete operating temperature range is shown in Table 1. This table is the reference from which the LMT87 and LMT87-Q1 accuracy specifications (listed in the Accuracy Characteristics section) are determined. This table can be used, for example, in a host processor lookup table. A file containing this data is available for download at LMT87 product folder under Tools and Software Models. Table 1. LMT87/LMT87-Q1 Transfer Table TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) -50 3277 -10 2767 30 2231 70 1679 110 1115 -49 3266 -9 2754 31 2217 71 1665 111 1101 -48 3254 -8 2740 32 2204 72 1651 112 1087 -47 3243 -7 2727 33 2190 73 1637 113 1073 -46 3232 -6 2714 34 2176 74 1623 114 1058 -45 3221 -5 2700 35 2163 75 1609 115 1044 -44 3210 -4 2687 36 2149 76 1595 116 1030 -43 3199 -3 2674 37 2136 77 1581 117 1015 -42 3186 -2 2660 38 2122 78 1567 118 1001 -41 3173 -1 2647 39 2108 79 1553 119 987 -40 3160 0 2633 40 2095 80 1539 120 973 -39 3147 1 2620 41 2081 81 1525 121 958 -38 3134 2 2607 42 2067 82 1511 122 944 -37 3121 3 2593 43 2054 83 1497 123 929 -36 3108 4 2580 44 2040 84 1483 124 915 -35 3095 5 2567 45 2026 85 1469 125 901 -34 3082 6 2553 46 2012 86 1455 126 886 -33 3069 7 2540 47 1999 87 1441 127 872 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 9 LMT87, LMT87-Q1 SNIS170C – JAN 2014 – REVISED OCTOBER 2015 www.ti.com Table 1. LMT87/LMT87-Q1 Transfer Table (continued) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) -32 3056 8 2527 48 1985 88 1427 128 858 -31 3043 9 2513 49 1971 89 1413 129 843 -30 3030 10 2500 50 1958 90 1399 130 829 -29 3017 11 2486 51 1944 91 1385 131 814 -28 3004 12 2473 52 1930 92 1371 132 800 -27 2991 13 2459 53 1916 93 1356 133 786 -26 2978 14 2446 54 1902 94 1342 134 771 -25 2965 15 2433 55 1888 95 1328 135 757 -24 2952 16 2419 56 1875 96 1314 136 742 -23 2938 17 2406 57 1861 97 1300 137 728 -22 2925 18 2392 58 1847 98 1286 138 713 -21 2912 19 2379 59 1833 99 1272 139 699 -20 2899 20 2365 60 1819 100 1257 140 684 -19 2886 21 2352 61 1805 101 1243 141 670 -18 2873 22 2338 62 1791 102 1229 142 655 -17 2859 23 2325 63 1777 103 1215 143 640 -16 2846 24 2311 64 1763 104 1201 144 626 -15 2833 25 2298 65 1749 105 1186 145 611 -14 2820 26 2285 66 1735 106 1172 146 597 -13 2807 27 2271 67 1721 107 1158 147 582 -12 2793 28 2258 68 1707 108 1144 148 568 -11 2780 29 2244 69 1693 109 1130 149 553 150 538 Although the LMT87 and LMT87-Q1 is very linear, its response does have a slight umbrella parabolic shape. This shape is very accurately reflected in Table 1. The Transfer Table can be calculated by using the parabolic equation. mV mV ª º ª VTEMP mV = 2230.8mV - «13.582 T - 30°C » - «0.00433 2 T - 30°C °C ¬ ¼ ¬ °C 2º » ¼ (1) The parabolic equation is an approximation of the transfer table and the accuracy of the equation degrades slightly at the temperature range extremes. Equation 1 can be solved for T resulting in: T 13 .582 13 .582 2 4 u 0.00433 u 2230 .8 VTEMP mV 2 u ( 0.00433 ) 30 (2) For an even less accurate linear transfer function approximation, a line can easily be calculated over the desired temperature range from the Table using the two-point equation: · ¹ V - V1 = V2 - V1 T2 - T1 · u (T - T1) ¹ (3) Where V is in mV, T is in °C, T1 and V1 are the coordinates of the lowest temperature, T2 and V2 are the coordinates of the highest temperature. For example, if we want to resolve this equation, over a temperature range of 20°C to 50°C, we would proceed as follows: 1958 mV - 2365 mV· u (T - 20oC) 50oC - 20oC ¹ · ¹ V - 2365 mV = o (4) o V - 2365 mV = (-13.6 mV / C) u (T - 20 C) (5) o V = (-13.6 mV / C) u T + 2637 mV (6) Using this method of linear approximation, the transfer function can be approximated for one or more temperature ranges of interest. 10 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 LMT87, LMT87-Q1 www.ti.com SNIS170C – JAN 2014 – REVISED OCTOBER 2015 8.4 Device Functional Modes 8.4.1 Mounting and Thermal Conductivity The LMT87 and LMT87-Q1 can be applied easily in the same way as other integrated-circuit temperature sensors. It can be glued or cemented to a surface. To ensure good thermal conductivity, the backside of the LMT87 and LMT87-Q1 die is directly attached to the GND pin (Pin 2 of the SC70 DCK package). The temperatures of the lands and traces to the other leads of the LMT87 and LMT87-Q1 will also affect the temperature reading. Alternatively, the LMT87 and LMT87-Q1 can be mounted inside a sealed-end metal tube, and can then be dipped into a bath or screwed into a threaded hole in a tank. As with any IC, the LMT87 and LMT87-Q1 and accompanying wiring and circuits must be kept insulated and dry, to avoid leakage and corrosion. This is especially true if the circuit may operate at cold temperatures where condensation can occur. If moisture creates a short circuit from the output to ground or VDD, the output from the LMT87 and LMT87-Q1 will not be correct. Printed-circuit coatings are often used to ensure that moisture cannot corrode the leads or circuit traces. The thermal resistance junction to ambient (RθJA or θJA) is the parameter used to calculate the rise of a device junction temperature due to its power dissipation. The equation used to calculate the rise in the LMT87 and LMT87-Q1's die temperature is: TJ = TA + TJA ¬ª(VDDIS ) + (VDD - VOUT ) IL ¼º (7) where TA is the ambient temperature, IS is the supply current, IL is the load current on the output, and Vout is the output voltage. For example, in an application where TA = 30°C, VDD = 5 V, IS = 5.4 μA, VOUT = 2231 mV, and IL = 2 μA, the junction temperature would be 30.014°C, showing a self-heating error of only 0.014°C. Since the junction temperature of the LMT87 and LMT87-Q1 is the actual temperature being measured, care should be taken to minimize the load current that the LMT87 and LMT87-Q1 is required to drive. Thermal Information shows the thermal resistance of the LMT87 and LMT87-Q1. 8.4.2 Output Noise Considerations A push-pull output gives the LMT87 and LMT87-Q1 the ability to sink and source significant current. This is beneficial when, for example, driving dynamic loads like an input stage on an analog-to-digital converter (ADC). In these applications the source current is required to quickly charge the input capacitor of the ADC. The LMT87 and LMT87-Q1 is ideal for this and other applications which require strong source or sink current. The LMT87 and LMT87-Q1 supply-noise gain (the ratio of the AC signal on VOUT to the AC signal on VDD) was measured during bench tests. Its typical attenuation is shown in Figure 8 found in the Typical Characteristics section. A load capacitor on the output can help to filter noise. For operation in very noisy environments, some bypass capacitance should be present on the supply within approximately 5 centimeters of the LMT87 and LMT87-Q1. 8.4.3 Capacitive Loads The LMT87 and LMT87-Q1 handles capacitive loading well. In an extremely noisy environment, or when driving a switched sampling input on an ADC, it may be necessary to add some filtering to minimize noise coupling. Without any precautions, the LMT87 and LMT87-Q1 can drive a capacitive load less than or equal to 1100 pF, as shown in Figure 10. For capacitive loads greater than 1100 pF, a series resistor may be required on the output, as shown in Figure 11. VDD LMT87 OPTIONAL BYPASS CAPACITANCE GND OUT CLOAD ” 1100 pF Figure 10. LMT87 No Decoupling Required for Capacitive Loads Less than 1100 pF Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 11 LMT87, LMT87-Q1 SNIS170C – JAN 2014 – REVISED OCTOBER 2015 www.ti.com Device Functional Modes (continued) VDD RS LMT87 OUT OPTIONAL BYPASS CAPACITANCE GND CLOAD > 1100 pF Figure 11. LMT87 with Series Resistor for Capacitive Loading Greater than 1100 pF CLOAD MINIMUM RS 1.1 nF to 99 nF 3 kΩ 100 nF to 999 nF 1.5 kΩ 1 μF 800 Ω 8.4.4 Output Voltage Shift The LMT87 and LMT87-Q1 is very linear over temperature and supply voltage range. Due to the intrinsic behavior of an NMOS/PMOS rail-to-rail buffer, a slight shift in the output can occur when the supply voltage is ramped over the operating range of the device. The location of the shift is determined by the relative levels of VDD and VOUT. The shift typically occurs when VDD- VOUT = 1 V. This slight shift (a few millivolts) takes place over a wide change (approximately 200 mV) in VDD or VOUT. Since the shift takes place over a wide temperature change of 5°C to 20°C, VOUT is always monotonic. The accuracy specifications in the Accuracy Characteristics table already include this possible shift. 9 Application and Implementation 9.1 Application Information The LMT87/LMT87-Q1 features make it suitable for many general temperature sensing applications. It can operate down to 2.7-V supply with 5.4-µA power consumption. Package options including through-hole TO-92 package also allows the LMT87 to be mounted on-board, off-board, to a heat sink, or on multiple unique locations in the same application. 9.2 Typical Applications 9.2.1 Connection to ADC Simplified Input Circuit of SAR Analog-to-Digital Converter +2.7V to +5.5V Reset Input Pin LMT87 VDD CBP RMUX RSS Sample OUT GND CFILTER CMUX CSAMPLE Figure 12. Suggested Connection to a Sampling Analog-to-Digital Converter Input Stage 12 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 LMT87, LMT87-Q1 www.ti.com SNIS170C – JAN 2014 – REVISED OCTOBER 2015 Typical Applications (continued) 9.2.1.1 Design Requirements Most CMOS ADCs found in microcontrollers and ASICs have a sampled data comparator input structure. When the ADC charges the sampling cap, it requires instantaneous charge from the output of the analog source such as the LMT87 and LMT87-Q1 temperature sensor and many op amps. This requirement is easily accommodated by the addition of a capacitor (CFILTER). 9.2.1.2 Detailed Design Procedure The size of CFILTER depends on the size of the sampling capacitor and the sampling frequency. Since not all ADCs have identical input stages, the charge requirements will vary. This general ADC application is shown as an example only. 9.2.1.3 Application Curves 3.5 OUTPUT VOLTAGE (V) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 ±50 0 50 100 150 TEMPERATURE (ƒC) C001 Figure 13. Analog Output Transfer Function 9.2.2 Conserving Power Dissipation with Shutdown VDD SHUTDOWN VOUT LMT87 Any logic device output Figure 14. Simple Shutdown Connection of the LMT87 9.2.2.1 Design Requirements Since the power consumption of the LMT87 is less than 9 µA, it can simply be powered directly from any logic gate output, thus not requiring a specific shutdown pin. The device can even be powered directly from a microcontroller GPIO. In this way it can easily be turned off for cases such as battery powered systems where power savings is critical. 9.2.2.2 Detailed Design Procedure Simply connect the VDD pin of the LMT87 directly to the logic shutdown signal from a microcontroller. Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 13 LMT87, LMT87-Q1 SNIS170C – JAN 2014 – REVISED OCTOBER 2015 www.ti.com Typical Applications (continued) 9.2.2.3 Application Curves Time: 500 μsec/div; Top trace: VDD 1 V/div; Bottom trace: OUT 1 V/div Figure 15. Output Turn-on Response Time without a Capacitive Load and VDD=3.3V Time: 500 μsec/div; Top trace: VDD 1 V/div; Bottom trace: OUT 1 V/div Figure 16. Output Turn-on Response Time with a 1.1 nF Capacitive Load and VDD=3.3V Time: 500 μsec/div; Top trace: VDD 2 V/div; Bottom trace: OUT 1 V/div Figure 17. Output Turn-on Response Time without a Capacitive Load and VDD=5V Time: 500 μsec/div; Top trace: VDD 2 V/div; Bottom trace: OUT 1 V/div Figure 18. Output Turn-on Response Time with a 1.1 nF Capacitive Load and VDD=5V 10 Power Supply Recommendations The low supply current and supply range of 2.7 V to 5.5 V allow the device to easily be powered from many sources. Power supply bypassing is optional and is mainly dependent on the noise on the power supply used. In noisy systems it may be necessary to add bypass capacitors to lower the noise that is coupled to the output of the LMT87. 11 Layout 11.1 Layout Guidelines The LMT87 is extremely simple to layout. If a power supply bypass capacitor is used, it should be connected as shown in the Layout Example. 14 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 LMT87, LMT87-Q1 www.ti.com SNIS170C – JAN 2014 – REVISED OCTOBER 2015 11.2 Layout Example VIA to ground plane VIA to power plane VDD VDD VDD GND 0.01 µ F OUT VDD Figure 19. SC70 Package Recommended Layout GND OUT VDD Figure 20. TO-92 LP Package Recommended Layout GND OUT VDD Figure 21. TO-92 LPM Package Recommended Layout Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 15 LMT87, LMT87-Q1 SNIS170C – JAN 2014 – REVISED OCTOBER 2015 www.ti.com 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LMT87 Click here Click here Click here Click here Click here LMT87-Q1 Click here Click here Click here Click here Click here 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 16 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: LMT87 LMT87-Q1 PACKAGE OPTION ADDENDUM www.ti.com 25-May-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMT87DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -50 to 150 BUA LMT87DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -50 to 150 BUA LMT87LP ACTIVE TO-92 LP 3 1800 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -50 to 150 LMT87 LMT87LPG PREVIEW TO-92 LPG 3 1000 TBD Call TI Call TI -50 to 150 LMT87LPM ACTIVE TO-92 LP 3 2000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -50 to 150 LMT87 LMT87QDCKRQ1 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -50 to 150 BVA LMT87QDCKTQ1 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -50 to 150 BVA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-May-2017 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LMT87, LMT87-Q1 : • Catalog: LMT87 • Automotive: LMT87-Q1 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 28-Jul-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing LMT87DCKR SC70 DCK 5 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMT87DCKT SC70 DCK 5 250 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMT87QDCKRQ1 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMT87QDCKTQ1 SC70 DCK 5 250 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 28-Jul-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMT87DCKR SC70 DCK 5 3000 210.0 185.0 35.0 LMT87DCKT SC70 DCK 5 250 210.0 185.0 35.0 LMT87QDCKRQ1 SC70 DCK 5 3000 210.0 185.0 35.0 LMT87QDCKTQ1 SC70 DCK 5 250 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE LPG0003A TO-92 - 5.05 mm max height SCALE 1.300 TO-92 4.1 3.9 3.25 3.05 3X 0.55 0.40 5.05 MAX 3 1 3X (0.8) 3X 15.5 15.1 3X 0.48 0.35 3X 2X 1.27 0.05 0.51 0.36 2.64 2.44 2.68 2.28 1.62 1.42 2X (45 ) 1 (0.5425) 2 3 0.86 0.66 4221343/B 09/2016 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com EXAMPLE BOARD LAYOUT LPG0003A TO-92 - 5.05 mm max height TO-92 0.05 MAX ALL AROUND TYP FULL R TYP METAL TYP (1.07) 3X ( 0.75) VIA 2X METAL (1.7) 2X (1.7) 2 1 2X SOLDER MASK OPENING 3 2X (1.07) (R0.05) TYP (1.27) SOLDER MASK OPENING (2.54) LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE:20X 4221343/B 09/2016 www.ti.com PACKAGE OUTLINE LP0003A TO-92 - 5.34 mm max height SCALE 1.200 SCALE 1.200 TO-92 5.21 4.44 EJECTOR PIN OPTIONAL 5.34 4.32 (1.5) TYP SEATING PLANE (2.54) NOTE 3 2X 4 MAX (0.51) TYP 6X 0.076 MAX SEATING PLANE 2X 2.6 0.2 3X 12.7 MIN 3X 3X 0.55 0.38 0.43 0.35 2X 1.27 0.13 FORMED LEAD OPTION STRAIGHT LEAD OPTION OTHER DIMENSIONS IDENTICAL TO STRAIGHT LEAD OPTION 3X 2.67 2.03 4.19 3.17 3 2 1 3.43 MIN 4215214/B 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Lead dimensions are not controlled within this area. 4. Reference JEDEC TO-226, variation AA. 5. Shipping method: a. Straight lead option available in bulk pack only. b. Formed lead option available in tape and reel or ammo pack. c. Specific products can be offered in limited combinations of shipping medium and lead options. d. Consult product folder for more information on available options. www.ti.com EXAMPLE BOARD LAYOUT LP0003A TO-92 - 5.34 mm max height TO-92 0.05 MAX ALL AROUND TYP FULL R TYP METAL TYP (1.07) 3X ( 0.85) HOLE 2X METAL (1.5) 2X (1.5) 2 1 (R0.05) TYP 3 2X (1.07) (1.27) SOLDER MASK OPENING 2X SOLDER MASK OPENING (2.54) LAND PATTERN EXAMPLE STRAIGHT LEAD OPTION NON-SOLDER MASK DEFINED SCALE:15X 0.05 MAX ALL AROUND TYP ( 1.4) 2X ( 1.4) METAL 3X ( 0.9) HOLE METAL (R0.05) TYP 2 1 (2.6) SOLDER MASK OPENING 3 2X SOLDER MASK OPENING (5.2) LAND PATTERN EXAMPLE FORMED LEAD OPTION NON-SOLDER MASK DEFINED SCALE:15X 4215214/B 04/2017 www.ti.com TAPE SPECIFICATIONS LP0003A TO-92 - 5.34 mm max height TO-92 13.7 11.7 32 23 (2.5) TYP 0.5 MIN 16.5 15.5 11.0 8.5 9.75 8.50 19.0 17.5 6.75 5.95 2.9 TYP 2.4 3.7-4.3 TYP 13.0 12.4 FOR FORMED LEAD OPTION PACKAGE 4215214/B 04/2017 www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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