LT1457 Dual, Precision JFET Input Op Amp U DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ Handles 10,000pF Capacitive Load 450µV Max Offset Voltage 1200µV Max Offset Voltage in S8 Package 50pA Bias Current at 70°C 13nV/√Hz Voltage Noise 4V/µs Slew Rate 4µV/°C Drift 130dB Channel Separation U APPLICATIONS ■ ■ ■ Sample-and-Hold (Drives Large Hold Capacitors) A/D and D/A Converters Photodiode Amplifiers Voltage-to-Frequency Converters Precision specifications include 220µV offset voltage in plastic and surface mount packages. At 70°C input bias current is 50pA, input offset current is 20pA. Channel separation is 130dB. Other dual JFET input op amps from Linear Technology include the LT1057, which is three times faster than the LT1457 but at the expense of significantly lower capacitive load handling capability; and the LT1113 with 4.5nV/√Hz voltage noise. U W ■ The LT1457 is a dual, JFET input op amp optimized for handling large capacitive loads in combination with precision performance. TYPICAL PERFORMANCE CHARACTERISTICS Capacitive Load Handling Input Offset Voltage Distribution S8 Package 21 100 18 PERCENT OF UNITS OVERSHOOT (%) 80 VS = ±15V TA = 25°C AV = +1 60 40 15 VS = ±15V TA = 25°C 400 DUALS (800 OP AMPS) TESTED FROM 3 RUNS 12 9 6 20 3 0 0.1 1 10 CAPACITIVE LOAD (nF) 100 LT11457• TA01 0 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 INPUT OFFSET VOLTAGE (mV) LT1457 • TA02 1 LT1457 W U U W W W Supply Voltage ...................................................... ±20V Differential Input Voltage ....................................... ±40V Input Voltage .......................... Equal to Supply Voltages Output Short-Circuit Duration .......................... Indefinite Operating Temperature Range ................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION ORDER PART NUMBER TOP VIEW + OUT A 1 8 V –IN A 2 7 OUT B +IN A 3 6 –IN B V– 4 5 +IN B LT1457ACN8 LT1457CN8 A B N8 PACKAGE 8-LEAD PLASTIC DIP TJMAX = 115°C, θJA = 130°C/ W TOP VIEW +IN A 1 V– 2 +IN B 3 –IN B A B 4 8 –IN A 7 OUT A 6 V+ 5 OUT B LT1457S8 S8 PART MARKING S8 PACKAGE 8-LEAD PLASTIC SOIC 1457 NOTE: THIS PIN CONFIGURATION DIFFERS FROM THE 8-LEAD DIP PIN LOCATIONS. INSTEAD, IT FOLLOWS THE INDUSTRY STANDARD LT1013DS8 SO PACKAGE CONFIGURATION. TJMAX = 130°C, θJA = 190°C/ W Consult factory for Industrial and Military grade parts. ELECTRICAL CHARACTERISTICS VS = ±15V, TA = 25°C,VCM = 0V unless otherwise noted. (Note 1) SYMBOL PARAMETER VOS Input Offset Voltage CONDITIONS LT1457AC/C LT1457S8 IOS Input Offset Current Fully Warmed Up IB Input Bias Current Input Resistance-Differential -Common-Mode MIN LT1457AC TYP MAX 150 450 LT1457C/LT1457S8 MIN TYP MAX 200 800 220 1200 UNITS µV µV 3 40 Fully Warmed Up ±5 ±50 VCM = –11V to 8V VCM = 8V to 11V 1012 1012 1011 1012 1012 1011 Ω Ω Ω 4 4 pF Input Capacitance 4 50 pA ±7 ±75 pA en Input Noise Voltage 0.1Hz to 10Hz 2.0 2.1 µVP–P en Input Noise Voltage Density fO = 10Hz fO = 1kHz (Note 2) 26 13 22 28 14 24 nV/√Hz nV/√Hz 1.5 4 1.8 6 fA/√Hz in Input Noise Current Density fO = 10Hz, 1kHz (Note 3) AVOL Large-Signal Voltage Gain VO = ±10V, RL = 2k VO = ±10V, RL = 1k Input Voltage Range 150 120 350 250 100 80 300 220 ±10.5 14.3 –11.5 ±10.5 14.3 –11.5 V/mV V/mV V V CMRR Common-Mode Rejection Ratio VCM = ±10.5V 86 100 82 98 dB PSRR Power Supply Rejection Ratio VS = ±4.5V to ±18V 88 103 86 102 dB VOUT Output Voltage Swing RL = 2k ±12 ±13 ±12 ±13 SR Slew Rate 2 4 2 4 2 V V/µs LT1457 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS GBW Gain-Bandwidth Product (Note 5) IS Supply Current Per Amplifier Channel Separation IOS IB AVOL CMRR PSRR VOUT IS Average Temperature Coefficient of Input Offset Voltage (Note 4) Input Offset Current Input Bias Current Large-Signal Voltage Gain Common-Mode Rejection Ratio Power Supply Rejection Ratio Output Voltage Swing Supply Current Per Amplifier MIN 1.0 DC to 5kHz, VIN = ±10V IOS IB AVOL CMRR PSRR VOUT IS 1.0 3.0 1.7 1.8 UNITS MHz 3.0 130 mA dB VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, unless otherwise noted. CONDITIONS LT1457AC/C LT1457S8 MIN ● ● ● Warmed Up, TA = 70°C Warmed Up, TA = 70°C VO = ±10V, RL = 2k VCM = ±10.4V VS = ±4.5V to ±18V RL = 2k ● ● ● ● 70 85 87 ±12 LT1457AC TYP MAX 250 900 3 10 18 ±50 220 98 102 ±12.8 150 ±250 LT1457C/LT1457S8 MIN TYP MAX 330 1500 400 1900 4 16 50 80 84 ±12 20 ±60 200 96 100 ±12.8 3.2 ● ELECTRICAL CHARACTERISTICS Average Temperature Coefficient of Input Offset Voltage Input Offset Current Input Bias Current Large-Signal Voltage Gain Common-Mode Rejection Ratio Power Supply Rejection Ratio Output Voltage Swing Supply Current Per Amplifier 1.7 LT1457C/LT1457S8 MIN TYP MAX 132 TA = 70°C SYMBOL PARAMETER Input Offset Voltage VOS LT1457AC TYP MAX 1.8 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER Input Offset Voltage VOS VS = ±15V, TA = 25°C,VCM = 0V unless otherwise noted. (Note 1) 250 ±350 3.2 1.7 1.7 UNITS µV µV µV/°C pA pA V/mV dB dB V mA mA VS = ±15V, VCM = 0V, –40°C ≤ TA ≤ 85°C, unless otherwise noted. (Note 6) CONDITIONS LT1457AC/C LT1457S8 MIN ● ● ● Warmed Up, TA = 85°C Warmed Up, TA = 85°C VO = ±10V, RL = 2k VCM = ±10.4V VS = ±5V to ±17V RL = 2k TA = – 40°C TA = 85°C The ● denotes the specifications which apply over the full operating temperature range. Note 1: Typical parameters are defined as the 60% yield of distributions of individual amplifiers; i.e., out of 100 LT1457s (200 op amps) typically 120 will be better than the indicated specification. Note 2: This parameter is tested on a sample basis only. Note 3: Current noise is calculated from the formula: in = (2qIb)1/2, where q = 1.6 x 10 –19 coulomb. The noise of source resistors up to 1GΩ swamps the contribution of current noise. ● ● ● ● 40 84 86 ±12 LT1457AC TYP MAX 350 1100 3 10 0.1 ± 0.2 120 97 100 ±12.7 0.5 ± 0.7 LT1457C/LT1457S8 MIN TYP MAX 400 1800 500 2300 4 16 30 80 83 ±12 0.1 ±0.2 110 95 98 ±12.6 3.8 1.7 0.6 ±0.9 3.8 1.7 UNITS µV µV µV/°C nA nA V/mV dB dB V mA mA Note 4: This parameter is not 100% tested. Note 5: Gain-Bandwidth product is not tested. It is guaranteed by design and by inference from the slew rate measurement. Note 6: The LT1457 is not tested and not quality-assurance-sampled at – 40°C and at 85°C. These specifications are guaranteed by design, correlation, and/or inference from 0°C, 25°C, and 70°C tests. 3 LT1457 U W TYPICAL PERFORMANCE CHARACTERISTICS Input Bias and Offset Current vs Temperature Input Bias Current Over the Common-Mode Range 100 BIAS CURRENT 30 10 OFFSET CURRENT 0 25 50 75 AMBIENT TEMPERATURE (°C) 120 100 TA = 70°C 80 60 40 20 0 –20 –15 100 18 15 12 9 6 0 5 Long Term Drift of Representative Units 50 RL = 2k VS = ±15V VO = ±10V VS = ±15V TA = 25°C 40 300 RL = 1k 100 30 30 20 10 0 –10 –20 –30 –40 10 –50 0 0.2 0.4 0.6 0.8 –0.8 –0.6 –0.4 –0.2 0 INPUT OFFSET VOLTAGE (mV) –50 –25 0 25 50 TEMPERATURE (°C) 75 100 0 1 2 3 TIME (MONTHS) 4 LT1457 • TPC05 LT1457 • TPC04 Voltage Noise vs Frequency 5 LT1457 • TPC06 0.1Hz to 10Hz Noise Channel Separation vs Frequency 100 160 VS = ±15V TA = 25°C CHANNEL SEPARATION (dB) VS = ±15V TA = 25°C NOISE VOLTAGE (1µV/DIV) 70 50 30 20 140 LIMITED BY THERMAL INTERACTION AT DC = 132dB 120 10 RS = 10Ω LIMITED BY PIN TO PIN CAPACITANCE 100 VS = ±15V TA = 25°C VIN = 20VP-P TO 5kHz RL = 2k 80 1/f CORNER = 28Hz RS = 1k 60 3 10 30 100 300 1k FREQUENCY (Hz) 3k 10k LT1457 • TPC07 4 1 2 3 4 TIME AFTER POWER ON (MINUTES) LT1457 • TPC03 3 RMS VOLTAGE NOISE DENSITY (nV/√Hz) N8 PACKAGE 30 15 1000 VOLTAGE GAIN (V/mV) 21 60 Voltage Gain vs Temperature 900 DUALS (1800 OP AMPS) TESTED FROM 3 RUNS S8 PACKAGE 90 LT1457 • TPC02 Input Offset Voltage Distribution N8 Package VS = ±15V TA = 25°C 120 0 –10 –5 0 5 10 COMMON-MODE INPUT VOLTAGE (V) LT1457 • TPC01 24 VS = ±15V TA = 25°C TA = 25°C OFFSET VOLTAGE CHANGE (µV) 300 VS = ±15V 140 CHANGE IN OFFSET VOLTAGE (µV) VS = ±15V VCM = 0V WARMED UP 3 PERCENT OF UNITS Warm-Up Drift 150 160 INPUT BIAS CURRENT (pA) INPUT BIAS AND OFFSET CURRENT (pA) 1000 0 2 4 6 TIME (SECONDS) 8 10 LT1457 • TPC08 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M LT1457 • TPC09 LT1457 U W TYPICAL PERFORMANCE CHARACTERISTICS Common-Mode Rejection Ratio vs Frequency Common-Mode Range vs Temperature 15 120 VS = ±15V TA = 25°C VS = ±5V TO ±17V FOR PSRR VS = ±15V, VCM = ±10.5V FOR CMRR 60 40 20 13 12 CMRR, PSRR (dB) 80 11 ±10 –11 –12 –14 0 10 100 1k 10k 100k FREQUENCY (Hz) 1M –25 0 25 50 TEMPERATURE (°C) LT1457• TPC10 90 –50 100 8 2.0 1.5 GBW (MHz) GBW 4 1.0 SLEW RISE 2 –25 0 25 50 TEMPERATURE (°C) 75 SUPPLY CURRENT PER AMPLIFIER (mA) 2.5 SLEW FALL 2 VS = ±15V VS = ±5V 1 0 25 50 TEMPERATURE (°C) 80 60 CL = 1000pF GAIN 0 –15 0.1 40 20 0 –5 –10 VS = ±15V TA = 25°C CL = 1000pF –20 CL = 10pF 1.0 FREQUENCY (MHz) 75 100 10 LT1457 • TPC16 TA = 25°C TA = 85°C TA = 25°C TA = 85°C 0 –10 –20 –30 TA = – 40°C VS = ±15V 0 1 2 3 TIME FROM OUTPUT SHORT TO GROUND (MINUTES) LT1457 • TPC15 Power Supply Rejection Ratio vs Frequency 140 VS = ±15V TA = 25°C TA = 25°C 120 24 100 18 PSRR (dB) 100 PHASE 5 10 – 50 –25 30 CL = 10pF 10 20 Undistorted Output Swing vs Frequency PHASE MARGIN (DEG) 15 TA = – 40°C LT1457 • TPC14 PEAK TO PEAK OUTPUT SWING (V) 20 100 30 – 40 Gain, Phase vs Frequency 75 Short-Circuit Current vs Time (One Output Shorted to Ground) 40 0 –50 100 PHASE MARGIN = 80°, CL = 10pF PHASE MARGIN = 51°, CL = 1000pF 0 25 50 TEMPERATURE (°C) 50 LT1457 • TPC18 25 –25 LT1457 • TPC12 3 VS = ±15V SLEW RATE (V/µs) 75 Supply Current vs Temperature 10 –50 CMRR 100 LT1457 • TPC11 Slew Rate, Gain-Bandwidth Product vs Temperature 6 PSRR VS = ±15V –15 – 50 10M 110 –13 SHORT-CIRCUIT CURRENT (mA) CMRR (dB) 120 14 COMMON -MODE RANGE (V) 100 VOLTAGE GAIN (dB) Common-Mode and Power Supply Rejections vs Temperature 12 POSITIVE SUPPLY 80 60 NEGATIVE SUPPLY 40 6 20 0 10k 0 100k 1M FREQUENCY (Hz) 10M LT11457• TPC17 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M LT1457• TPC13 5 LT1457 U W TYPICAL PERFORMANCE CHARACTERISTICS Large-Signal Response AV = 1, CL = 100pF Small-Signal Response AV = 1, CL = 1000pF LT1457 TPC19 Small-Signal Response AV = 1, CL = 10,000pF LT1457 TPC20 LT1457 TPC21 U W U U APPLICATIONS INFORMATION Phase Reversal Protection Most industry standard JFET input single, dual, and quad op amps (e.g., LF156, LF351, LF353, LF411, LF412, OP-15, OP-16, OP-215, and TL084) exhibit phase reversal at the output when the negative common-mode limit at the input is exceeded (i.e., below –12V with ±15V supplies). The photos show a ±16V sine wave input (A), the response of an LF412A in the unity gain follower mode (B), and the response of the LT1457 (C). The phase reversal of photo (B) can cause lock-up in servo systems. The LT1457 does not phase-reverse due to a unique phase reversal protection circuit. LT1457 AI01 (A) ±16V Sine Wave Input LT1457 AI02 (B) LF412A Output All Photos 5V/Div Vertical Scale, 50µs/Div Horizontal Scale 6 LT1457 AI03 (C) LT1457 Output LT1457 U U W U APPLICATIONS INFORMATION High Speed Operation When the feedback around the op amp is resisitive (RF), a pole will be created with RF, the source resistance and capacitance (RS, CS), and the amplifier input capacitance (CIN ≈ 4pF). In low closed loop gain configurations and with RS and RF in the kilohm range, this pole can create excess phase shift and even oscillation on high speed amplifiers. Because the LT1457’s phase margin is very high, this problem is minimal. However, a small capacitor (CF) in parallel with RF eliminates this problem. With RS(CS + CIN) = RFCF, the effect of the feedback pole is completely removed. U PACKAGE DESCRIPTION CF RF – CIN CS RS OUTPUT + LT1457 AI04 Dimension in inches (millimeters) unless otherwise noted. N8 Package 8-Lead Plastic DIP 0.300 – 0.320 (7.620 – 8.128) 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 0.400 (10.160) MAX 8 0.009 – 0.015 (0.229 – 0.381) ( +0.025 0.325 –0.015 8.255 +0.635 –0.381 7 0.045 ± 0.015 (1.143 ± 0.381) ) 0.100 ± 0.010 (2.540 ± 0.254) 0.125 (3.175) MIN 0.010 – 0.020 × 45° (0.254 – 0.508) 0.250 ± 0.010 (6.350 ± 0.254) 1 0.018 ± 0.003 (0.457 ± 0.076) 2 4 3 N8 0392 0.189 – 0.197 (4.801 – 5.004) 8 0.053 – 0.069 (1.346 – 1.752) 7 6 5 0.004 – 0.010 (0.101 – 0.254) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP 5 0.020 (0.508) MIN S8 Package 8-Lead Plastic SOIC 0.016 – 0.050 0.406 – 1.270 6 0.065 (1.651) TYP 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) BSC 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157 (3.810 – 3.988) 1 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 2 3 4 SO8 0392 7 LT1457 U.S. Area Sales Offices NORTHEAST REGION Linear Technology Corporation One Oxford Valley 2300 E. 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The Coliseum, Riverside Way Camberley, Surrey GU15 3YL United Kingdom Phone: 44-276-677676 FAX: 44-276-64851 JAPAN Linear Technology KK 5F YZ Bldg. 4-4-12 Iidabashi, Chiyoda-Ku Tokyo, 102 Japan Phone: 81-3-3237-7891 FAX: 81-3-3237-8010 World Headquarters Linear Technology Corporation 1630 McCarthy Blvd. Milpitas, CA 95035-7487 Phone: (408) 432-1900 FAX: (408) 434-0507 0294 8 Linear Technology Corporation LT/GP 0594 10K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977 LINEAR TECHNOLOGY CORPORATION 1994