LINER LT1949IS8

LT1949
600kHz, 1A Switch
PWM DC/DC Converter
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FEATURES
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DESCRIPTIO
The LT ®1949 is a fixed frequency step-up DC/DC converter with a 1A, 0.5Ω internal switch. Capable of generating 10V at 175mA from a 3.3V input, the LT1949 is ideal
for generating bias voltages for large screen LCD panels.
Constant frequency 600kHz operation results in a low
noise output that is easy to filter and the 30V switch rating
allows output voltage up to 28V using a single inductor. An
external compensation pin gives the user flexibility in
optimizing loop compensation, allowing small low ESR
ceramic capacitors to be used at the output. The 8-lead
MSOP and SO packages ensure a low profile overall
solution.
1A, 0.5Ω, 30V Internal Switch
Operates with VIN as Low as 1.5V
600kHz Fixed Frequency Operation
Low-Battery Detector Stays Active in Shutdown
Low VCESAT Switch: 410mV at 800mA
Pin-for-Pin Compatible with the LT1317B
Small 8-Lead MSOP and SO Packages
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APPLICATIO S
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LCD Bias Supplies
GPS Receivers
Battery Backup
Portable Electronic Equipment
Diagnostic Medical Instrumentation
The LT1949 includes a low-battery detector that stays
alive when the device goes into shutdown. Quiescent
current in shutdown is 25µA, while operating current is
4.5mA.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
VIN
3.3V
90
L1
10µH
C1
22µF
SW
VIN
3.6VIN 4.2VIN 3VIN
70
R1
1M
LT1949
SHUTDOWN
VOUT = 10V
80
FB
SHDN
GND
VC
68k
R2
140k
VOUT
10V
175mA
C2
10µF
CERAMIC
330pF
C1: AVX TAJA226M006R
C2: TAIYO YUDEN LMK325BJ106MN
D1: MBRM120LT3
L1: SUMIDA CDRH62B-100
Figure 1. 3.3V to 10V/175mA DC/DC Converter
EFFICIENCY (%)
+
D1
60
50
40
30
1949 F01
20
5
10
50
100
LOAD CURRENT (mA)
300
1949 F02
Figure 2. 3.3V to 10V Converter Efficiency
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LT1949
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AXI U
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ABSOLUTE
RATI GS
(Note 1)
VIN, LBO Voltage ..................................................... 12V
SW Voltage ............................................... – 0.4V to 30V
FB Voltage .................................................... VIN + 0.3V
VC Voltage ................................................................ 2V
LBI Voltage ............................................ 0V ≤ VLBI ≤ 1V
SHDN Voltage ........................................................... 6V
Junction Temperature .......................................... 125°C
Operating Temperature Range (Note 2)
LT1949EMS8 .......................................–40°C to 85°C
LT1949ES8/LT1949IS8 .......................–40°C to 85°C
Storage Temperature ........................... – 65°C to 150°C
Lead Temperature (Soldering, 10sec).................. 300°C
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
VC
FB
SHDN
GND
1
2
3
4
8
7
6
5
LBO
LBI
VIN
SW
LT1949EMS8
MS8 PACKAGE
8-LEAD PLASTIC MSOP
MS8 PART MARKING
TJMAX = 125°C, θJA = 120°C/W
LTJC
TOP VIEW
VC 1
8
LBO
FB 2
7
LBI
SHDN 3
6
VIN
5
SW
GND 4
ORDER PART
NUMBER
LT1949ES8
LT1949IS8
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 120°C/W
1949E
1949I
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 2V, VSHDN = 2V unless otherwise noted.
SYMBOL
PARAMETER
IQ
Quiescent Current
CONDITIONS
VSHDN = 0V
VFB
MIN
●
●
Feedback Voltage
●
IB
UNITS
4.5
25
7.5
40
mA
µA
1.24
1.24
1.26
1.26
V
V
●
Input Voltage Range
●
1.7
●
70
700
V/V
●
80
85
%
1
0.95
1.13
●
1.5
1.5
A
A
●
500
600
750
kHz
0.015
– 2.3
0.1
–7
µA
µA
200
200
210
220
mV
mV
V
Error Amp Transconductance
AV
Error Amp Voltage Gain
∆I = 5µA
Maximum Duty Cycle
Switch Current Limit (Note 4)
VIN = 2.5V, Duty Cycle = 30%
VIN = 2.5V, Duty Cycle = 30%
Switching Frequency
Shutdown Pin Current
VSHDN = VIN
VSHDN = 0V
12
●
●
LBI Threshold Voltage
●
2
MAX
FB Pin Bias Current (Note 3)
gm
fOSC
1.22
1.20
TYP
190
180
140
80
nA
12
V
240
µmhos
LBO Output Low
ISINK = 10µA
●
0.15
0.25
LBO Leakage Current
VLBI = 250mV, VLBO = 5V
●
0.02
0.1
µA
LBI Input Bias Current (Note 5)
VLBI = 150mV
●
5
60
nA
Low-Battery Detector Gain
1MΩ Pull-Up
Switch Leakage Current
VSW = 5V
2000
●
0.01
V/V
3
µA
LT1949
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 2V, VSHDN = 2V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
Switch VCESAT
ISW = 800mA
ISW = 500mA
●
1.8V ≤ VIN ≤ 12V
●
Reference Line Regulation
MIN
MAX
UNITS
400
mV
mV
0.15
%/V
410
SHDN Input Voltage High
●
SHDN Input Voltage Low
●
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT1949E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
TYP
0.08
1.4
6
V
0.4
V
Note 3: Bias current flows into FB pin.
Note 4: Switch current limit guaranteed by design and/or correlation to
static tests. Duty cycle affects current limit due to ramp generator.
Note 5: Bias current flows out of LBI pin.
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TYPICAL PERFOR A CE CHARACTERISTICS
–40°C
25°C
85°C
550
500
1.3
1.3
1.2
1.2
SWITCH CURRENT (A)
650
SWITCH CURRENT (A)
OSCILLATOR FREQUENCY (kHz)
700
600
Switch Current Limit,
Duty Cycle = 30%
Switch Current Limit
Oscillator Frequency
1.1
1.0
0.8
–50
0.8
2
10
4
6
8
INPUT VOLTAGE
0
12
1.0
0.9
0.9
0
1.1
20
60
40
DUTY CYCLE (%)
80
100
–25
0
25
50
TEMPERATURE (°C)
75
1949 G03
1949 G02
1949 G01
Switch Voltage Drop (VCESAT)
Quiescent Current, SHDN = 2V
Feedback Voltage
1.0
1.25
0.8
1.24
100
4.6
85°C
0.6
25°C
0.4
–40°C
0.2
QUIESCENT CURRENT (mA)
FEEDBACK VOLTAGE (V)
SWITCH VOLTAGE (V)
4.5
1.23
1.22
1.21
4.4
4.3
4.2
4.1
4.0
3.9
0
0
0.2
0.4
0.6
0.8
SWITCH CURRENT (A)
1.0
1.2
1949 G04
1.20
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
1949 G05
3.8
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
1949 G06
3
LT1949
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TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current, SHDN = 0V
SHDN Pin Current
FB Pin Bias Current
26
40
2
36
24
23
22
21
32
SHDN PIN CURRENT (µA)
FB PIN BIAS CURRENT (nA)
QUIESCENT CURRENT (µA)
25
28
24
20
16
12
1
0
–1
–2
8
4
20
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
0
–50
–3
–25
0
25
50
TEMPERATURE (°C)
1317 TPC10
75
100
0
2
4
3
SHDN PIN VOLTAGE (V)
5
6
1317 TPC12
1317 TPC11
Load Regulation
Load Regulation
Transient Response
VOUT
100mV/DIV
AC COUPLED
VOUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
VOUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
1
IL
500mA/DIV
ILOAD 200mA
100mA
ILOAD 25mA/DIV
VIN = 3V
VOUT = 10V
L1 = 10µH, SUMIDA CD54
COUT = 10µF CERAMIC
1949 G10
ILOAD 50mA/DIV
VIN = 4V
VOUT = 10V
L1 = 10µH, SUMIDA CD54
COUT = 10µF CERAMIC
50µs/DIV
VIN = 3.3V
VOUT = 10V
CIRCUIT OF FIGURE 1
1949 G12
1949 G11
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PI FU CTIO S
VC (Pin 1): Compensation Pin for Error Amplifier. Connect a series RC network from this pin to ground. Typical
values for compensation are a 68k/330pF combination
when using ceramic output capacitors. Minimize trace
area at VC.
FB (Pin 2): Feedback Pin. Reference voltage is 1.24V.
Connect resistor divider tap here. Minimize trace area at
FB. Set VOUT according to: VOUT = 1.24V(1 + R1/R2).
SHDN (Pin 3): Shutdown. Pull this pin low for shutdown
mode (only the low-battery detector remains active).
Leave this pin floating or tie to a voltage between 1.4V and
6V to enable the device. SHDN pin is logic level and need
only meet the logic specification (1.4V for high, 0.4V for
low).
4
GND (Pin 4): Ground. Connect directly to local ground
plane.
SW (Pin 5): Switch Pin. Connect inductor/diode here.
Minimize trace area at this pin to keep EMI down.
VIN (Pin 6): Supply Pin. Must be bypassed close to the
pin.
LBI (Pin 7): Low-Battery Detector Input. 200mV reference. Voltage on LBI must stay between ground and
700mV. Low-battery detector remains active in shutdown
mode.
LBO (Pin 8): Low-Battery Detector Output. Open collector, can sink 10µA. A 1MΩ pull-up is recommended.
LT1949
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BLOCK DIAGRA
LBI
1.24V
REFERENCE
+
FB
2
1
ERROR
AMPLIFIER
+
–
+
7
VC
gm
LBO
8
–
200mV
A4
ENABLE
SHDN
VOUT
BIAS
R1
(EXTERNAL)
–
SHUTDOWN
SW
FB
R2
(EXTERNAL)
3
A1
COMPARATOR
5
–
RAMP
GENERATOR
+
Σ
+
+
FF
Q3
Q
R
A2
COMPARATOR
DRIVER
S
+
A=2
600kHz
OSCILLATOR
0.06Ω
–
4
GND
1949 BD
Figure 3. LT1949 Block Diagram
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OPERATIO
The LT1949 is a current mode, fixed frequency step-up
DC/DC converter with an internal 1A NPN power transistor. Operation can best be understood by referring to the
Block Diagram.
At the beginning of each oscillator cycle, the flip-flop is set
and the switch is turned on. Current in the switch ramps
up until the voltage at A2’s positive input reaches the VC
pin voltage, causing A2’s output to change state and the
switch to be turned off. The signal at A2’s positive input is
a summation of a signal representing switch current and
a ramp generator (introduced to avoid subharmonic oscillations at duty factors greater than 50%). If the load
increases, VOUT (and FB) will drop slightly and the error
amplifier will drive VC to a higher voltage, causing current
in the switch to increase. In this way, the error amplifier
drives the VC pin to the voltage necessary to satisfy the
load. Frequency compensation is provided by an external
series RC network connected between the VC pin and
ground.
Layout Hints
The LT1949 switches current at high speed, mandating
careful attention to layout for proper performance. You
will not get advertised performance with careless layouts.
Figure 4 shows recommended component placement for
a boost (step-up) converter. Follow this closely in your PC
layout. Note the direct path of the switching loops. Input
capacitor C1 must be placed close (< 5mm) to the IC
package. As little as 10mm of wire or PC trace from CIN to
VIN will cause problems such as inability to regulate or
oscillation.
The ground terminal of output capacitor C2 should tie
close to Pin 4 of the LT1949. Doing this reduces dI/dt in the
ground copper which keeps high frequency spikes to a
minimum. The DC/DC converter ground should tie to the
PC board ground plane at one place only, to avoid introducing dI/dt in the ground plane.
5
LT1949
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OPERATIO
LBI LBO
GROUND PLANE
C1
1
+
VIN
8
R1
2
R2
SHUTDOWN
LT1949
7
3
6
4
5
L1
MULTIPLE
VIAs
C2
GND
VOUT
1949 F04
Figure 4. Recommended Component Placement for Boost
Converter. Note Direct High Current Paths Using Wide PC
Traces. Minimize Trace Area at Pin 1 (VC) and Pin 2 (FB).
Use Multiple Vias to Tie Pin 4 Copper to Ground Plane. Use
Vias at One Location Only to Avoid Introducing Switching
Currents into the Ground Plane
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APPLICATIONS INFORMATION
Low-Battery Detector
The LT1949’s low-battery detector is a simple PNP input
gain stage with an open collector NPN output. The negative input of the gain stage is tied internally to a 200mV
±5% reference. The positive input is the LBI pin. Arrangement as a low-battery detector is straightforward.
Figure␣ 5 details hookup. R1 and R2 need only be low
enough in value so that the bias current of the LBI pin
doesn’t cause large errors. For R2, 100k is adequate. The
200mV reference can also be accessed as shown in
Figure␣ 6. The low-battery detector remains active in
shutdown.
3.3V
R1
VIN
LBI
LT1949
1M
+
LBO
R2
100k
200k
TO PROCESSOR
–
2N3906
LT1949
VREF
200mV
200mV
INTERNAL
REFERENCE
GND
V – 200mV
R1 = LB
2µA
VIN
LBO
LBI
+
10k
10µF
GND
1949 F06
1949 F05
Figure 6. Accessing 200mV Reference
Figure 5. Setting Low-Battery Detector Trip Point
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LT1949
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TYPICAL APPLICATIO
4 Cell to 5V SEPIC Converter
C2
4.7µF
16V
L1
10µH
VIN
4V TO 9V
SW
VIN
1M
D1
L2
10µH
VOUT
5V
250mA
1M
1%
LT1949
C1
4.7µF
16V
GND
VC
1M
C3
10µF
6.3V
FB
SHDN
332k
1%
33k
3.3nF
C1, C2: TAIYO YUDEN EMK316BJ475ML
C3: TAIYO YUDEN JMK316BJ106ML
D1: MOTOROLA MBRM120LT3
L1, L2: SUMIDA CR32-100KC
1949 TA02
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.040 ± 0.006
(1.02 ± 0.15)
0.007
(0.18)
0.118 ± 0.004*
(3.00 ± 0.102)
0.034 ± 0.004
(0.86 ± 0.102)
8
7 6
5
0° – 6° TYP
SEATING
PLANE 0.012
(0.30)
0.0256
REF
(0.65)
BSC
0.021 ± 0.006
(0.53 ± 0.015)
0.118 ± 0.004**
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
0.006 ± 0.004
(0.15 ± 0.102)
MSOP (MS8) 1098
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* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
2 3
4
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
8
7
6
5
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
SO8 1298
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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4
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LT1949
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TYPICAL APPLICATIO
Low Profile Triple Output LCD Bias Generator
D1
D2
C7
0.1µF
L1
10µH
VIN
3.3V
SHUTDOWN
+
23V
5mA
C9
0.1µF
8V
200mA
R2
40.2k
1%
SHDN
LBI
C1
22µF
C8
0.1µF
D4
D7
SW
VIN
D3
LT1949
C2
10µF
FB
LB0
VC
GND
R3
7.5k
1%
R1
47k
C3
680pF
C6
4.7µF
C1: AVX TAJB226M010
C2: TAIYO YUDEN TMK432BJ106MN X7R 1210
C4, C5, C6: TAIYO YUDEN LMK316BJ475ML X5R1206
C7, C8, C9: 0.1µF CERAMIC, 50V
D1 TO D6: FMMD7000, DUAL DIODE
D7: MBRM120LT3
L1: SUMIDA CDRH62B-100
C4
4.7µF
D5
C5
4.7µF
D6
–8V
10mA
1949 TA01
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Linear Technology Corporation
1949f LT/TP 0300 4K • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1999